llvm dev - Jun 2017

Friday June 30 2017
TimeRepliesSubject
11:46PM 1 [LLD] Adding WebAssembly support to lld
11:11PM 1 KNL Assembly Code for Matrix Multiplication
10:58PM 1 [cfe-dev] Just a quick heads up -- removing BBVectorize from LLVM (and Clang)
10:47PM 0 Fwd: KNL Assembly Code for Matrix Multiplication
9:47PM 2 "Beginner" keyword for LLVM Bugzilla?
6:54PM 2 LoopSimplify pass prevents loop unrolling
6:38PM 1 LoopSimplify pass prevents loop unrolling
5:59PM 1 LoopSimplify pass prevents loop unrolling
4:24PM 0 Optimization Barrier in LLVM Backends
4:16PM 2 The undef story
3:35PM 1 About the concept of "materialization"
2:48PM 1 LoopSimplify pass prevents loop unrolling
2:46PM 1 LoopSimplify pass prevents loop unrolling
1:57PM 1 Zen arch in 5.0?
1:14PM 1 About the concept of "materialization"
12:28PM 1 KNL Assembly Code for Matrix Multiplication
8:41AM 1 The doubt to LLVM.org-How to add the new type?
8:28AM 3 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
8:02AM 5 An issue with new PM's requirements on call graph changes
6:14AM 1 Zen arch in 5.0?
3:47AM 1 CGP: Break use-def graph loops in optimizeMemoryInst
3:37AM 0 Fixing bugs in llvm-diff
3:10AM 1 llvm-profdata determinism
2:26AM 1 llvm-profdata determinism
2:03AM 1 llvm-profdata determinism
1:27AM 1 llvm-profdata determinism
12:49AM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
12:48AM 1 The undef story
12:26AM 2 The undef story
 
Thursday June 29 2017
TimeRepliesSubject
10:42PM 2 Just a quick heads up -- removing BBVectorize from LLVM (and Clang)
9:56PM 1 The undef story
9:54PM 2 Polyhedral model Polly in llvm
9:49PM 2 The undef story
9:32PM 2 The undef story
9:09PM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
7:55PM 1 The undef story
7:35PM 2 The undef story
7:18PM 1 The undef story
6:34PM 1 Any places I could start contributing to?
6:28PM 1 The undef story
5:43PM 3 The undef story
5:38PM 1 The undef story
5:16PM 2 Understanding Chains
4:32PM 3 The undef story
4:09PM 0 Optimization Barrier in LLVM Backends
3:41PM 4 The undef story
3:21PM 0 .bc file from llvmlite
2:49PM 1 Any places I could start contributing to?
2:21PM 2 The undef story
2:18PM 1 The undef story
2:11PM 1 The undef story
11:53AM 1 the Univac 2200, LLVM, and national security
11:39AM 1 The undef story
7:08AM 2 The undef story
6:53AM 1 The undef story
6:53AM 2 The undef story
6:35AM 2 the Univac 2200, LLVM, and national security
6:26AM 1 The undef story
6:26AM 1 The undef story
6:11AM 1 The undef story
6:03AM 2 The undef story
5:53AM 2 The undef story
5:50AM 1 Next steps for optimization remarks?
5:32AM 2 The undef story
5:32AM 1 The undef story
4:58AM 2 The undef story
4:46AM 2 The undef story
3:14AM 3 Definitive list of optimisations at each optimisation level
2:48AM 1 The undef story
2:13AM 1 The undef story
1:47AM 1 Testing utility for building and updating CFG
1:47AM 2 The undef story
1:46AM 1 Multiple Inheritance with dyn_cast
1:07AM 1 The nsw story revisited
12:26AM 1 Enabling EarlyCSE w/ MemorySSA by default
12:13AM 2 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
12:10AM 1 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
 
Wednesday June 28 2017
TimeRepliesSubject
11:06PM 1 Multiple Inheritance with dyn_cast
11:01PM 1 The undef story
10:33PM 4 The undef story
9:40PM 1 Enabling EarlyCSE w/ MemorySSA by default
7:53PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
7:48PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
7:42PM 1 The nsw story revisited
7:41PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
7:34PM 1 The nsw story revisited
7:18PM 1 The nsw story revisited
7:16PM 1 The undef story
7:09PM 1 The nsw story revisited
7:02PM 1 Next steps for optimization remarks?
7:01PM 1 The nsw story revisited
6:56PM 2 Next steps for optimization remarks?
6:48PM 1 Override TargetOptions for block of code?
6:08PM 1 About the concept of "materialization"
6:04PM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
5:59PM 1 About the concept of "materialization"
5:56PM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
5:55PM 1 About the concept of "materialization"
5:53PM 1 Override TargetOptions for block of code?
5:36PM 2 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
5:29PM 1 Override TargetOptions for block of code?
5:14PM 1 RFC: FileEdit utility
4:58PM 1 Question about ISD::SUBCARRY
4:39PM 1 The undef story
4:39PM 1 The nsw story revisited
4:36PM 2 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
4:31PM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
4:15PM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
4:09PM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
3:13PM 1 Next steps for optimization remarks?
2:39PM 1 Testing utility for building and updating CFG
2:03PM 1 LLVM docs links broken
1:35PM 1 Videos from past Dev meetings gone?
1:19PM 1 Wide load/store optimization question
1:12PM 1 Videos from past Dev meetings gone?
12:20PM 1 LLVM Matrix Multiplication Loop Vectorizer
11:50AM 1 About the concept of "materialization"
11:37AM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
11:33AM 1 INTRINSIC SELECTION
10:40AM 1 Videos from past Dev meetings gone?
9:43AM 1 Wide load/store optimization question
9:28AM 2 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
9:18AM 0 llvm CN domain and keyword
7:22AM 3 LNT Server offline
5:34AM 1 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
4:41AM 1 LLVM docs links broken
4:36AM 1 LLVM Matrix Multiplication Loop Vectorizer
3:40AM 1 OpenCL toolset (for AMD GPU)
3:33AM 2 LLVM docs links broken
2:11AM 1 LLVM docs links broken
1:40AM 2 LLVM docs links broken
 
Tuesday June 27 2017
TimeRepliesSubject
10:53PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
10:50PM 2 IMPORTANT: LLVM.org server move complete (SVN impact please read)
10:31PM 2 Testing utility for building and updating CFG
10:26PM 1 Enabling EarlyCSE w/ MemorySSA by default
10:25PM 0 LLVM buildmaster will be updated and restarted tonight
10:20PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
10:01PM 1 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
9:52PM 2 LNT Server offline
9:51PM 1 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
9:48PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
9:44PM 3 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
9:41PM 2 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
9:40PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
9:38PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
9:35PM 2 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
9:32PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
9:23PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
9:10PM 1 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
9:09PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
8:47PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
7:54PM 2 LLVM Matrix Multiplication Loop Vectorizer
6:48PM 1 Next steps for optimization remarks?
5:21PM 1 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
4:57PM 1 Verifying Backend Schedule (Over)Coverage
4:00PM 2 Using TSAN along with custom llvm IR pass
4:00PM 0 Question about ISD::SUBCARRY
12:56PM 1 Some questions about software pipeline in LLVM 4.0.0
12:25PM 2 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
11:55AM 2 Ok with mismatch between dead-markings in BUNDLE and bundled instructions?
10:47AM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
8:53AM 2 Question about ISD::SUBCARRY
8:17AM 1 VC C++ demangler
6:49AM 1 Old API documentation
6:26AM 0 Support for global variables in backend
6:09AM 1 [llvm] r305938 - [BasicAA] Use MayAlias instead of PartialAlias for fallback.
5:53AM 1 VC C++ demangler
3:12AM 2 IMPORTANT: LLVM.org server move complete (SVN impact please read)
2:24AM 2 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
2:01AM 0 LLVM Auto Vectorization Benchmark PolyBench
12:32AM 0 IMPORTANT: LLVM.org server move complete (SVN impact please read)
 
Monday June 26 2017
TimeRepliesSubject
11:40PM 1 Verifying Backend Schedule (Over)Coverage
10:38PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
10:22PM 1 Some questions about software pipeline in LLVM 4.0.0
9:34PM 0 LLVM Weekly - #182, Jun 26th 2017
9:27PM 0 Few builders are off-line for maintenance
9:07PM 1 About the concept of "materialization"
8:48PM 0 Question
4:22PM 0 Caller callee calling convention enforcing on C++ code
3:25PM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
2:50PM 1 the root cause is copy propagation of undef
2:33PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
2:01PM 1 [RFC][SVE] Supporting Scalable Vector Architectures in LLVM IR (take 2)
1:11PM 1 Question about legal integer type
12:04PM 1 Definitive list of optimisations at each optimisation level
9:23AM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
8:41AM 0 OpenCL toolset (for AMD GPU)
1:52AM 1 Zen arch in 5.0?
 
Sunday June 25 2017
TimeRepliesSubject
10:39PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
10:36PM 1 Zen arch in 5.0?
10:15PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
8:47PM 1 Zen arch in 5.0?
7:32PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
7:28PM 1 IMPORTANT: LLVM.org server move complete (SVN impact please read)
2:23PM 1 AVX Scheduling and Parallelism
1:40PM 1 Building llvm with clang and lld on arm and the llvm arm backend relocation on position independent code
1:36PM 0 Building llvm with clang and lld on arm and libcxx abilist files
12:14PM 1 AVX Scheduling and Parallelism
1:59AM 1 Definitive list of optimisations at each optimisation level
12:44AM 1 Definitive list of optimisations at each optimisation level
12:38AM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
12:24AM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
 
Saturday June 24 2017
TimeRepliesSubject
11:02PM 4 IMPORTANT: LLVM.org server move complete (SVN impact please read)
10:20PM 0 Buildbot is back to normal work
8:22PM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
7:54PM 1 Definitive list of optimisations at each optimisation level
7:52PM 1 Definitive list of optimisations at each optimisation level
4:58PM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
4:57PM 2 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
3:56PM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
3:21PM 1 musttail & alwaysinline interaction
2:10PM 2 Definitive list of optimisations at each optimisation level
8:07AM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
4:59AM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
3:32AM 1 Linking against LLVM and conflicting with system mesa
2:39AM 1 loop unroll factor
2:30AM 0 loop unroll factor
2:25AM 1 Fwd: AVX Scheduling and Parallelism
2:16AM 1 AVX Scheduling and Parallelism
2:02AM 1 AVX Scheduling and Parallelism
12:52AM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
12:25AM 1 VC C++ demangler
 
Friday June 23 2017
TimeRepliesSubject
11:10PM 0 Linking with debug version LLVM library crashes, linking with release version LLVM library fine
7:53PM 0 Two builders are off-line for maintenance
6:07PM 0 GSoC evaluations #1
5:09PM 1 VC C++ demangler
4:14PM 0 Fulltime Job AD: Compiler engineer @ Xilinx (San Jose, CA)
10:52AM 1 A bug in DependenceAnalysis?
7:49AM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
2:06AM 0 the root cause is CP
1:57AM 1 AVX-512 foldable instructions Pattern Matching VMOVDQU32Zm
 
Thursday June 22 2017
TimeRepliesSubject
10:00PM 1 lld extra program headers
9:01PM 1 lld extra program headers
8:05PM 1 [lldb-dev] RFC: Cleaning up the Itanium demangler
8:03PM 1 Legal names for Functions and other Identifiers
7:00PM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
6:31PM 3 How to prevent optimizing away a call + its arguments
6:11PM 1 [lldb-dev] RFC: Cleaning up the Itanium demangler
6:10PM 1 How to prevent optimizing away a call + its arguments
6:07PM 1 [lldb-dev] RFC: Cleaning up the Itanium demangler
6:03PM 2 How to prevent optimizing away a call + its arguments
5:58PM 1 AVX 512 Assembly Code Generation issues
5:45PM 1 How to prevent optimizing away a call + its arguments
5:35PM 3 How to prevent optimizing away a call + its arguments
5:27PM 1 How to use the VLIW Packetizer
5:13PM 1 re: How to deal with UNDEF SDNode?
3:47PM 1 RFC: Cleaning up the Itanium demangler
3:34PM 1 RFC: Cleaning up the Itanium demangler
3:27PM 1 Semantics of fdiv division by zero
3:08PM 2 RFC: Cleaning up the Itanium demangler
3:04PM 2 Semantics of fdiv division by zero
2:50PM 1 RFC: Cleaning up the Itanium demangler
2:37PM 1 Legal names for Functions and other Identifiers
2:35PM 2 How to prevent optimizing away a call + its arguments
2:29PM 1 Legal names for Functions and other Identifiers
2:21PM 1 RFC: Cleaning up the Itanium demangler
1:21PM 0 How to deal with UNDEF SDNode?
12:51PM 1 RFC: Cleaning up the Itanium demangler
12:44PM 1 Legal names for Functions and other Identifiers
12:34PM 1 Legal names for Functions and other Identifiers
11:59AM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
11:51AM 1 Legal names for Functions and other Identifiers
9:51AM 0 CodeExtractor with phinode
8:59AM 1 A bug in DependenceAnalysis?
8:35AM 1 Legal names for Functions and other Identifiers
7:32AM 2 LLVM Assembly Instructions Generation Syntax
1:49AM 1 RFC: Dynamic dominators
1:03AM 2 RFC: Cleaning up the Itanium demangler
1:00AM 1 RFC: Dynamic dominators
12:42AM 1 RFC: Cleaning up the Itanium demangler
12:37AM 1 NOTICE: Server Maintenance This Evening (Mail List Impact)
12:25AM 1 How to prevent optimizing away a call + its arguments
 
Wednesday June 21 2017
TimeRepliesSubject
11:42PM 4 RFC: Cleaning up the Itanium demangler
11:40PM 2 LLVM-HPC2017 Workshop at SC17 - Call for papers
11:16PM 1 How to prevent optimizing away a call + its arguments
9:08PM 1 Verifying Backend Schedule (Over)Coverage
8:04PM 1 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
7:22PM 3 IMPORTANT: LLVM.org server move on June 24th! (SVN impact)
7:17PM 1 reviving LLVM on Solaris x86/SPARC platform
6:57PM 1 reviving LLVM on Solaris x86/SPARC platform
6:43PM 1 reviving LLVM on Solaris x86/SPARC platform
6:21PM 1 A bug in DependenceAnalysis?
6:06PM 3 [SPIR-V] SPIR-V in LLVM
4:58PM 1 A bug in DependenceAnalysis?
4:54PM 2 CloneFunctionInto produces invalid debug info
4:40PM 1 A bug in DependenceAnalysis?
3:56PM 1 A bug in DependenceAnalysis?
3:37PM 0 the root cause is CP, was: A tagged architecture, the elephant in the undef / poison room
3:10PM 1 [LLD][COFF] Zero linker-version header field breaks Authenticode on Windows 7
3:04PM 1 [LLD][COFF] Zero linker-version header field breaks Authenticode on Windows 7
2:44PM 1 question about llvmlite
2:36PM 1 [LLD][COFF] Zero linker-version header field breaks Authenticode on Windows 7
2:23PM 1 [LLD][COFF] Zero linker-version header field breaks Authenticode on Windows 7
1:57PM 1 question about llvmlite
1:18PM 3 [SPIR-V] SPIR-V in LLVM
1:16PM 1 AVX 512 Assembly Code Generation issues
11:10AM 3 LLVM 4.0.1 -final has been tagged
9:03AM 0 Predication for instruction selection
8:25AM 1 [LLD][COFF] Zero linker-version header field breaks Authenticode on Windows 7
12:54AM 1 LoopVectorize fails to vectorize loops with induction variables with PtrToInt/IntToPtr conversions
12:21AM 1 AVX 512 Assembly Code Generation
12:20AM 2 [SPIR-V] SPIR-V in LLVM
 
Tuesday June 20 2017
TimeRepliesSubject
11:33PM 1 Basic AA fail. Bug or feature?
11:04PM 1 JIT, LTO and @llvm.global_ctors: Looking for advise
10:45PM 1 JIT, LTO and @llvm.global_ctors: Looking for advise
9:41PM 2 [SPIR-V] SPIR-V in LLVM
6:41PM 2 LoopVectorize fails to vectorize loops with induction variables with PtrToInt/IntToPtr conversions
6:10PM 1 How Register allocator called in LLVM
6:07PM 1 VC C++ demangler
5:51PM 1 JIT, LTO and @llvm.global_ctors: Looking for advise
5:51PM 1 VC C++ demangler
5:38PM 1 VC C++ demangler
5:36PM 2 VC C++ demangler
5:17PM 1 VC C++ demangler
4:21PM 1 CloneFunctionInto produces invalid debug info
4:06PM 0 Why is this block of instructions generated?
3:38PM 1 JIT, LTO and @llvm.global_ctors: Looking for advise
3:12PM 1 JIT, LTO and @llvm.global_ctors: Looking for advise
3:11PM 1 VC C++ demangler
3:05PM 1 CloneFunctionInto produces invalid debug info
2:52PM 1 CloneFunctionInto produces invalid debug info
1:50PM 1 the root cause is CP, was: A tagged architecture, the elephant in the undef / poison room
11:47AM 1 Wide load/store optimization question
11:00AM 0 Support for MSVC v141 toolset
8:50AM 1 Next steps for optimization remarks?
7:17AM 1 the root cause is CP, was: A tagged architecture, the elephant in the undef / poison room
6:59AM 1 the root cause is CP, was: A tagged architecture, the elephant in the undef / poison room
6:15AM 0 question about clang ast for tsan
4:28AM 1 the root cause is CP, was: A tagged architecture, the elephant in the undef / poison room
2:36AM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
2:29AM 2 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
1:26AM 1 LoopVectorize fails to vectorize loops with induction variables with PtrToInt/IntToPtr conversions
 
Monday June 19 2017
TimeRepliesSubject
11:32PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
11:28PM 1 Next steps for optimization remarks?
11:13PM 3 Next steps for optimization remarks?
10:00PM 1 CloneFunctionInto produces invalid debug info
9:59PM 1 CloneFunctionInto produces invalid debug info
7:55PM 1 VC C++ demangler
7:50PM 0 LLVM Weekly - #181, Jun 19th 2017
7:48PM 2 VC C++ demangler
7:34PM 1 VC C++ demangler
6:57PM 0 question
6:42PM 1 Enabling EarlyCSE w/ MemorySSA by default
6:38PM 0 Alias analysis results
6:27PM 1 Enabling EarlyCSE w/ MemorySSA by default
6:22PM 1 Enabling EarlyCSE w/ MemorySSA by default
5:59PM 1 VC C++ demangler
5:53PM 1 VC C++ demangler
5:22PM 0 Equation Function
5:06PM 1 [CFI] Manually linking classes that have no inheritance link
5:02PM 2 the root cause is CP, was: A tagged architecture, the elephant in the undef / poison room
4:47PM 1 LLVM behavior different depending on function symbol name
4:43PM 1 killing undef and spreading poison
4:36PM 0 Update on Clang/LLVM integration with VS2017
4:35PM 1 the root cause is CP, was: A tagged architecture, the elephant in the undef / poison room
4:34PM 1 LLVM behavior different depending on function symbol name
4:27PM 1 LLVM behavior different depending on function symbol name
4:26PM 1 LLVM behavior different depending on function symbol name
4:15PM 1 JIT, LTO and @llvm.global_ctors: Looking for advise
4:06PM 1 LLVM behavior different depending on function symbol name
4:00PM 0 Integrating Clang/LLVM with Microsoft Visual Studio 2017
3:58PM 1 LLVM behavior different depending on function symbol name
3:45PM 2 LLVM behavior different depending on function symbol name
3:36PM 2 the root cause is CP, was: A tagged architecture, the elephant in the undef / poison room
3:25PM 1 beneficial optimization of undef examples needed
3:16PM 1 [CFI] Manually linking classes that have no inheritance link
2:36PM 2 beneficial optimization of undef examples needed
2:15PM 1 ADDING A CUSTOM INSTRINSIC
2:14PM 2 killing undef and spreading poison
10:32AM 0 Possible missing DAGCombine opportunity?
9:37AM 2 Separate compilation of CUDA code?
8:43AM 1 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
8:07AM 1 Separate compilation of CUDA code?
6:55AM 1 Some questions about software pipeline in LLVM 4.0.0
2:31AM 0 Buildbot: sanitizer-windows BUG?
 
Sunday June 18 2017
TimeRepliesSubject
10:51PM 1 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
6:48PM 0 hobbes: a new project built on LLVM
4:12AM 1 DYLD implicit interposition
 
Saturday June 17 2017
TimeRepliesSubject
11:07PM 1 LoopVectorize fails to vectorize loops with induction variables with PtrToInt/IntToPtr conversions
10:41PM 3 LoopVectorize fails to vectorize loops with induction variables with PtrToInt/IntToPtr conversions
6:26PM 1 Wrong description about getelementptr arguments?
6:20PM 1 Wrong description about getelementptr arguments?
4:46PM 1 LLD support for mach-o aliases (weak or otherwise)
3:08PM 0 LLVM 4.0.1 -rc3 has been tagged
2:09PM 1 Wrong description about getelementptr arguments?
1:09PM 1 Wrong description about getelementptr arguments?
10:49AM 0 beneficial optimization of undef examples needed
7:37AM 1 Separate compilation of CUDA code?
7:31AM 1 Wide load/store optimization question
3:23AM 1 A tagged architecture, the elephant in the undef / poison room
2:45AM 1 Separate compilation of CUDA code?
2:45AM 1 beneficial optimization of undef examples needed
2:39AM 1 killing undef and spreading poison
1:25AM 0 LLVM buildmaster will be updated and restarted tonight
1:08AM 2 My experience using -DLLVM_BUILD_INSTRUMENTED_COVERAGE to generate coverage
12:32AM 2 killing undef and spreading poison
12:17AM 1 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
12:11AM 1 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
12:05AM 1 Wide load/store optimization question
 
Friday June 16 2017
TimeRepliesSubject
11:58PM 1 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
11:43PM 3 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
10:19PM 1 beneficial optimization of undef examples needed
10:06PM 1 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
10:03PM 2 beneficial optimization of undef examples needed
9:48PM 1 How does sanitizers in compiler-rt work?
9:43PM 1 Wide load/store optimization question
9:24PM 1 Execution
9:13PM 1 Execution
9:00PM 1 CloneFunctionInto produces invalid debug info
8:54PM 1 CloneFunctionInto produces invalid debug info
8:36PM 1 Wide load/store optimization question
8:29PM 1 Using LLD to create a .lib from a .def
8:05PM 1 a tagged architecture, the elephant in the undef / poison room
7:35PM 1 About CodeGen quality
7:31PM 1 a tagged architecture, the elephant in the undef / poison room
7:19PM 2 Execution
7:19PM 1 About CodeGen quality
6:55PM 1 [CFI] Manually linking classes that have no inheritance link
6:53PM 1 Using LLD to create a .lib from a .def
6:49PM 0 a tagged architecture, the elephant in the undef / poison room
6:44PM 1 About CodeGen quality
6:06PM 1 [CFI] Manually linking classes that have no inheritance link
6:05PM 1 [CFI] Manually linking classes that have no inheritance link
5:49PM 1 About CodeGen quality
5:29PM 1 simplify CFG Pass in llvm
4:41PM 0 Llvm lab resent network issues are resolved
4:24PM 1 simplify CFG Pass in llvm
3:41PM 1 a tagged architecture, the elephant in the undef / poison room
3:36PM 2 a tagged architecture, the elephant in the undef / poison room
3:01PM 2 a tagged architecture, the elephant in the undef / poison room
2:58PM 1 Bug in __sync_bool_compare_and_swap at O0
2:47PM 0 lab.llvm.org buildbots down?
2:33PM 1 function inlining and undef / poison question
11:46AM 1 [Release-testers] LLVM 4.0.1 -rc3 has been tagged
11:11AM 1 How does sanitizers in compiler-rt work?
11:00AM 1 Wide load/store optimization question
8:04AM 0 2017 US LLVM Developers' Meeting - Registration Opening!
6:13AM 2 About CodeGen quality
5:39AM 1 [CFI] Manually linking classes that have no inheritance link
12:09AM 1 Linker error while linking DataFlowSanitizer to LLVM IR
 
Thursday June 15 2017
TimeRepliesSubject
11:42PM 1 Function Inlining and undef / poison question
11:35PM 1 Function Inlining and undef / poison question
11:29PM 1 Function Inlining and undef / poison question
10:38PM 1 [RFC] Profile guided section layout
10:24PM 2 CloneFunctionInto produces invalid debug info
10:12PM 1 Function Inlining and undef / poison question
9:56PM 0 Implementing cross-thread reduction in the AMDGPU backend
9:39PM 1 [RFC] Profile guided section layout
9:33PM 1 [RFC] Profile guided section layout
9:30PM 1 [RFC] Profile guided section layout
9:23PM 1 CloneFunctionInto produces invalid debug info
9:12PM 1 [Openmp-dev] [5.0.0 Release] Schedule and call for testers
8:51PM 1 [CFI] Manually linking classes that have no inheritance link
8:41PM 1 LLC does not do proper copy propagation (or copy coalescing)
8:37PM 1 About CodeGen quality
8:26PM 1 LLC does not do proper copy propagation (or copy coalescing)
7:03PM 1 About CodeGen quality
6:25PM 1 CloneFunctionInto produces invalid debug info
6:23PM 1 CloneFunctionInto produces invalid debug info
6:09PM 1 [RFC] Profile guided section layout
6:01PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
5:58PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
5:55PM 2 [RFC] Profile guided section layout
5:44PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
5:27PM 1 Function Inlining and undef / poison question
5:20PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
5:08PM 1 [RFC] Profile guided section layout
4:51PM 2 [RFC] Profile guided section layout
4:29PM 1 Using LLD to create a .lib from a .def
4:25PM 1 CloneFunctionInto produces invalid debug info
3:31PM 2 CloneFunctionInto produces invalid debug info
2:33PM 1 Using LLD to create a .lib from a .def
2:31PM 1 killing undef and spreading poison
1:32PM 2 killing undef and spreading poison
12:08PM 1 [CFI] Manually linking classes that have no inheritance link
11:44AM 1 About CodeGen quality
11:17AM 1 [Release-testers] LLVM 4.0.1 -rc3 has been tagged
11:06AM 3 About CodeGen quality
9:01AM 0 Fwd: [Release-testers] LLVM 4.0.1 -rc3 has been tagged
8:14AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
1:15AM 2 [cfe-dev] RFC: ODR checker for Clang and LLD
1:14AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
1:12AM 2 Implementing cross-thread reduction in the AMDGPU backend
1:00AM 2 [cfe-dev] RFC: ODR checker for Clang and LLD
12:51AM 1 LLD support for mach-o aliases (weak or otherwise)
12:23AM 1 Implementing cross-thread reduction in the AMDGPU backend
12:00AM 1 Linker error while linking DataFlowSanitizer to LLVM IR
 
Wednesday June 14 2017
TimeRepliesSubject
11:37PM 1 Using LLD to create a .lib from a .def
11:35PM 1 LLD support for mach-o aliases (weak or otherwise)
11:24PM 1 Using LLD to create a .lib from a .def
11:03PM 1 [RFC] Pagerando: Page-granularity code randomization
10:25PM 0 Need Volunteers for 2017 Grace Hopper Conference
10:13PM 1 the nsw story, revisited
10:07PM 0 LLVM buildmaster will be updated and restarted tonight
9:47PM 2 LLD support for mach-o aliases (weak or otherwise)
9:12PM 1 killing undef and spreading poison
9:05PM 1 Implementing cross-thread reduction in the AMDGPU backend
8:41PM 2 [cfe-dev] RFC: ODR checker for Clang and LLD
8:37PM 0 Reserve ARM register for only section of the program
8:34PM 0 Code Execution
8:26PM 1 killing undef and spreading poison
8:23PM 1 the nsw story, revisited
7:47PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
5:18PM 1 Separate compilation of CUDA code?
4:10PM 1 About CodeGen quality
3:33PM 1 [CUDA] Lost debug information when compiling CUDA code
3:22PM 1 What is HexagonCommonGEP.cpp for?
3:08PM 1 Default FPENV state
2:44PM 1 What is HexagonCommonGEP.cpp for?
2:36PM 0 Implementing cross-thread reduction in the AMDGPU backend
2:35PM 0 Implementing cross-thread reduction in the AMDGPU backend
2:27PM 1 What is HexagonCommonGEP.cpp for?
2:27PM 1 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
2:23PM 1 What is HexagonCommonGEP.cpp for?
2:05PM 1 What is HexagonCommonGEP.cpp for?
1:51PM 1 What is HexagonCommonGEP.cpp for?
1:34PM 1 Default FPENV state
1:16PM 1 What is HexagonCommonGEP.cpp for?
1:11PM 1 What is HexagonCommonGEP.cpp for?
1:06PM 1 [CUDA] Lost debug information when compiling CUDA code
12:57PM 1 About CodeGen quality
12:44PM 1 What is HexagonCommonGEP.cpp for?
11:05AM 1 [CUDA] Lost debug information when compiling CUDA code
10:06AM 1 Default FPENV state
8:33AM 1 [CUDA] Lost debug information when compiling CUDA code
8:04AM 0 RFC: Adding Dockerfiles to build clang into llvm/utils
7:41AM 1 LLVM coverage report
7:28AM 2 LLVM coverage report
6:59AM 2 [CUDA] Lost debug information when compiling CUDA code
6:52AM 0 LLVM Social - Paris: June 14th, 2017
6:30AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
6:06AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
6:03AM 1 Refining which symbols are preemptable with lto
5:05AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
4:43AM 1 Refining which symbols are preemptable with lto
3:48AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
3:43AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
2:54AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
1:34AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
1:13AM 4 Implementing cross-thread reduction in the AMDGPU backend
1:06AM 3 LLVM 4.0.1 -rc3 has been tagged
 
Tuesday June 13 2017
TimeRepliesSubject
11:33PM 1 Implementing cross-thread reduction in the AMDGPU backend
9:54PM 0 the nsw story, revisited
9:29PM 1 [5.0.0 Release] Schedule and call for testers
6:44PM 1 RFC: Dynamic dominators
6:31PM 1 Which PM preferred for llvm 4.0 out-of-source passes?
6:29PM 2 RFC: Dynamic dominators
6:14PM 1 RFC: Dynamic dominators
5:46PM 1 Making an analysis availble during call lowering
5:28PM 1 DICompileUnit duplication in LLVM 4.0.0?
5:27PM 3 A tagged architecture, the elephant in the undef / poison room
3:44PM 2 Wide load/store optimization question
3:13PM 0 JIT - Resolve obj file without a main
2:49PM 0 [lldb-dev] JIT debugging on Mac OSX
2:44PM 1 Which PM preferred for llvm 4.0 out-of-source passes?
8:27AM 1 RFC: Dynamic dominators
7:22AM 1 RFC: Dynamic dominators
7:05AM 1 RFC: Dynamic dominators
6:47AM 1 RFC: Dynamic dominators
6:24AM 2 RFC: Dynamic dominators
6:23AM 1 Implementing cross-thread reduction in the AMDGPU backend
5:09AM 1 Change undef to poison in a few operations
2:54AM 2 Reserve ARM register for only section of the program
12:58AM 2 RFC: Dynamic dominators
12:48AM 1 [RFC] Pagerando: Page-granularity code randomization
12:43AM 1 Enable vectorizer-maximize-bandwidth by default?
12:23AM 1 Implementing cross-thread reduction in the AMDGPU backend
12:12AM 4 RFC: Dynamic dominators
12:03AM 1 Implementing cross-thread reduction in the AMDGPU backend
 
Monday June 12 2017
TimeRepliesSubject
11:56PM 1 Implementing cross-thread reduction in the AMDGPU backend
11:15PM 1 Implementing cross-thread reduction in the AMDGPU backend
10:41PM 2 [RFC] Pagerando: Page-granularity code randomization
10:31PM 1 [RFC] Pagerando: Page-granularity code randomization
9:58PM 2 Implementing cross-thread reduction in the AMDGPU backend
9:27PM 1 Open bug count passes 10,000 mark
9:16PM 1 Open bug count passes 10,000 mark
9:13PM 1 [RFC] Pagerando: Page-granularity code randomization
8:23PM 1 Open bug count passes 10,000 mark
8:18PM 1 Open bug count passes 10,000 mark
8:03PM 1 [RFC] Pagerando: Page-granularity code randomization
6:54PM 1 Question about Prolog/Epilog Code Insertion
6:32PM 0 LLVM Weekly - #180, Jun 12th 2017
6:24PM 0 function
5:56PM 1 function
5:31PM 1 Get segfault with ModulePass
4:54PM 3 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
4:53PM 1 DICompileUnit duplication in LLVM 4.0.0?
4:41PM 1 Adding the some static buffer content to the beginning and end of C file .
4:39PM 1 Building compiler front-end from GitHub source
3:59PM 0 deleting a range of instructions
3:50PM 0 pyvex to LLVM IR
1:50PM 1 Building compiler front-end from GitHub source
1:44PM 1 using the new PassManager
1:40PM 1 Fusing contract fadd/fsub with normal fmul
10:41AM 1 Enable vectorizer-maximize-bandwidth by default?
6:35AM 1 How to know the sub-class of a Value class?
6:34AM 1 How to know the sub-class of a Value class?
6:25AM 1 How to know the sub-class of a Value class?
6:20AM 1 How to know the sub-class of a Value class?
6:12AM 2 How to know the sub-class of a Value class?
6:09AM 1 How to know the sub-class of a Value class?
6:06AM 1 How to know the sub-class of a Value class?
6:03AM 1 How to know the sub-class of a Value class?
5:54AM 2 How to know the sub-class of a Value class?
5:49AM 3 How do I understand LLVM class abstraction better?
5:07AM 1 Cannot build Clang/LLVM on Windows with LLVM_BUILD_LLVM_DYLIB
1:36AM 1 Force casting a Value*
1:22AM 1 Force casting a Value*
1:05AM 1 Force casting a Value*
 
Sunday June 11 2017
TimeRepliesSubject
9:04PM 1 Force casting a Value*
8:16PM 1 Force casting a Value*
7:05PM 1 Force casting a Value*
6:56PM 1 Force casting a Value*
6:32PM 1 Force casting a Value*
4:49PM 1 Force casting a Value*
4:14PM 1 Get segfault with ModulePass
2:53PM 1 Force casting a Value*
2:29PM 1 Cannot build Clang/LLVM on Windows with LLVM_BUILD_LLVM_DYLIB
10:05AM 1 Force casting a Value*
6:17AM 0 bugpoint, LLVM tools (opt, llc, etc), and symbolizing costs
4:04AM 2 Cannot build Clang/LLVM on Windows with LLVM_BUILD_LLVM_DYLIB
3:39AM 1 [RFC] Pagerando: Page-granularity code randomization
12:16AM 1 Get segfault with ModulePass
 
Saturday June 10 2017
TimeRepliesSubject
11:09PM 1 [RFC] Pagerando: Page-granularity code randomization
10:38PM 1 Enabling EarlyCSE w/ MemorySSA by default
10:36PM 1 Enabling EarlyCSE w/ MemorySSA by default
9:45PM 1 Enabling EarlyCSE w/ MemorySSA by default
6:51PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
6:39PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
6:00PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
3:21PM 1 Enabling EarlyCSE w/ MemorySSA by default
2:39PM 1 Difference between AllocaInst::getType() vs AllocaInst::getAllocatedType()
2:22PM 0 [CUDA] Error when compiling CUDA kernel with new/delete
1:48PM 1 [CUDA] Link .bc file with libdevice.bc
1:21PM 0 Get the variable size and count from AllocaInst IR instruction
12:03PM 0 Get the variable size and count from AllocaInst IR instruction
6:49AM 0 Get the variable size and count from AllocaInst IR instruction
4:43AM 1 Instruction does not dominate all uses!
4:14AM 1 Instruction does not dominate all uses!
4:00AM 1 Instruction does not dominate all uses!
3:04AM 2 Fusing contract fadd/fsub with normal fmul
 
Friday June 9 2017
TimeRepliesSubject
11:54PM 1 Get segfault with ModulePass
11:23PM 1 Subclassing LLVM Type
11:17PM 1 Subclassing LLVM Type
11:08PM 1 Subclassing LLVM Type
10:29PM 1 Subclassing LLVM Type
9:14PM 1 [Newbie Question] Compute a schedule region's scheduled cycles.
9:06PM 1 [Newbie Question] Compute a schedule region's scheduled cycles.
8:29PM 1 Subclassing LLVM Type
8:12PM 1 Subclassing LLVM Type
8:03PM 1 [Newbie Question] Compute a schedule region's scheduled cycles.
7:03PM 1 Subclassing LLVM Type
6:42PM 1 Showing hotness in LLVM optimization remarks using AutoFDO sampling profile data?
6:15PM 2 Showing hotness in LLVM optimization remarks using AutoFDO sampling profile data?
5:29PM 1 DICompileUnit duplication in LLVM 4.0.0?
5:02PM 1 Reserve ARM register for only section of the program
4:02PM 1 Showing hotness in LLVM optimization remarks using AutoFDO sampling profile data?
3:34PM 1 [Newbie Question] Compute a schedule region's scheduled cycles.
2:13PM 1 __auto_type doesn't warn when a pointer is used as a declarator
1:15PM 1 Question about Prolog/Epilog Code Insertion
11:31AM 1 NVPTX Back-end: relocatable device code support for dynamic parallelism
9:59AM 1 Cannot build Clang/LLVM on Windows with LLVM_BUILD_LLVM_DYLIB
9:26AM 0 How the LLVM handle the debug location information of continue keyword and right brace(loop end location)?
9:07AM 1 __auto_type doesn't warn when a pointer is used as a declarator
8:25AM 2 Cannot build Clang/LLVM on Windows with LLVM_BUILD_LLVM_DYLIB
7:21AM 2 Qualifiers not being discarded for atomic types while compiling with clang
12:01AM 2 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
 
Thursday June 8 2017
TimeRepliesSubject
11:55PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
11:16PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
11:05PM 1 DICompileUnit duplication in LLVM 4.0.0?
11:04PM 2 RFC: Killing undef and spreading poison
10:19PM 1 DICompileUnit duplication in LLVM 4.0.0?
10:07PM 2 DICompileUnit duplication in LLVM 4.0.0?
8:29PM 1 RFC: Killing undef and spreading poison
7:29PM 1 RFC: Killing undef and spreading poison
6:12PM 2 RFC: Killing undef and spreading poison
5:33PM 3 RFC: Killing undef and spreading poison
4:52PM 0 Error just after program execution
4:46PM 1 Non-standard C++ usage
4:44PM 2 Failing unit tests
4:43PM 1 [MS] Partial PDB (/DEBUG:FASTLINK) parsing support in LLVM
4:41PM 1 RFC: Killing undef and spreading poison
2:39PM 1 Question
2:28PM 1 Question
12:07PM 1 [MS] Partial PDB (/DEBUG:FASTLINK) parsing support in LLVM
11:41AM 1 XRay threshold (bug?)
11:26AM 1 XRay threshold (bug?)
11:24AM 1 Failing unit tests
10:50AM 1 Non-standard C++ usage
6:42AM 1 [RFC] Optimizing Comparisons Chains
6:28AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
3:30AM 1 LLD support for mach-o aliases (weak or otherwise)
3:30AM 1 LLD support for ld64 mach-o linker synthesised symbols
3:06AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
2:59AM 1 RFC: ODR checker for Clang and LLD
1:22AM 1 LLD support for mach-o aliases (weak or otherwise)
 
Wednesday June 7 2017
TimeRepliesSubject
11:32PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
11:31PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
10:39PM 1 LLD support for ld64 mach-o linker synthesised symbols
9:46PM 2 LLD support for ld64 mach-o linker synthesised symbols
9:42PM 2 using the new PassManager
9:27PM 1 RFC: Killing undef and spreading poison
9:23PM 1 RFC: Killing undef and spreading poison
8:06PM 0 execute LLVM IR generated from python code
7:50PM 1 using the new PassManager
7:48PM 2 RFC: Killing undef and spreading poison
7:09PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
6:06PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
6:00PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
5:33PM 0 RE: Function with multi return path?
5:22PM 1 using the new PassManager
5:19PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
5:04PM 1 python to llvm IR executable
5:03PM 1 [RFC] Optimizing Comparisons Chains
5:01PM 2 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
4:53PM 1 LLD support for ld64 mach-o linker synthesised symbols
4:44PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
4:38PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
4:36PM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
4:00PM 1 [RFC] Optimizing Comparisons Chains
3:58PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
3:42PM 1 Function with multi return path?
3:18PM 2 [cfe-dev] RFC: ODR checker for Clang and LLD
3:13PM 1 Function with multi return path?
2:51PM 1 Function with multi return path?
2:12PM 1 Clarification: machine operand subreg, <def, read-undef>, and IMPLICIT_DEF
12:52PM 1 [RFC][SVE] Supporting Scalable Vector Architectures in LLVM IR (take 2)
9:49AM 1 libc++ failed to link against musl
9:14AM 1 libc++ failed to link against musl
7:17AM 1 [cfe-dev] RFC: ODR checker for Clang and LLD
6:14AM 1 LLD support for ld64 mach-o linker synthesised symbols
5:40AM 4 RFC: ODR checker for Clang and LLD
5:40AM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
5:32AM 1 llvm-objcopy proposal
5:30AM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
3:25AM 2 [poison] re: is select-of-select to logic+select allowed ?
 
Tuesday June 6 2017
TimeRepliesSubject
11:38PM 1 LLD support for ld64 mach-o linker synthesised symbols
11:30PM 2 LLD support for ld64 mach-o linker synthesised symbols
11:08PM 3 LLD support for mach-o aliases (weak or otherwise)
11:08PM 2 LLD support for ld64 mach-o linker synthesised symbols
11:03PM 2 llvm-objcopy proposal
10:05PM 1 Question
9:41PM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
9:21PM 2 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
9:16PM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
8:53PM 1 Backend implementation for an architecture with only majority operation instruction
8:41PM 1 libc++ failed to link against musl
8:38PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
8:26PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
7:32PM 2 Enable vectorizer-maximize-bandwidth by default?
5:55PM 2 [RFC] Pagerando: Page-granularity code randomization
5:54PM 1 Support for Range analysis in LLVM
5:46PM 1 Question
5:40PM 2 libc++ failed to link against musl
5:11PM 1 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
4:40PM 1 Putting "tied-to" constraints on virtual registers in SelectionDAGISel's Select() method
3:46PM 1 Help request: Output reshuffling
2:07PM 1 [CommandLine] Missing clEnumValEnd for cl::values in tutorial page
1:15PM 1 [CommandLine] Missing clEnumValEnd for cl::values in tutorial page
12:18PM 1 __is_empty type-trait implementation in llvm
9:44AM 0 Performance comparison of Clang/LLVM vs. GCC
9:11AM 1 Change undef to poison in a few operations
8:09AM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
1:53AM 1 [CommandLine] Missing clEnumValEnd for cl::values in tutorial page
12:26AM 1 Backend implementation for an architecture with only majority operation instruction
12:18AM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
 
Monday June 5 2017
TimeRepliesSubject
11:21PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
10:56PM 1 RFC: Killing undef and spreading poison
9:37PM 1 How the LLVM handle the debug location information of continue keyword and right brace(loop end location)?
9:27PM 2 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
9:18PM 0 reg alloc bug? "Different value live out of predecessor"
9:16PM 1 VirtRegMap invariant: no reserved physical registers?
9:12PM 1 Backend implementation for an architecture with only majority operation instruction
9:08PM 1 Backend implementation for an architecture with only majority operation instruction
8:45PM 1 Backend implementation for an architecture with only majority operation instruction
8:39PM 1 Question
8:34PM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
8:10PM 0 LLVM Weekly - #179, Jun 5th 2017
7:57PM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
7:27PM 1 Build problems
6:54PM 1 Question
6:33PM 2 python to llvm IR
5:58PM 1 Question
5:41PM 1 Question
5:31PM 1 How the LLVM handle the debug location information of continue keyword and right brace(loop end location)?
5:28PM 0 A patch to reduce the output size with -print-after-all
5:21PM 1 Build problems
5:19PM 0 migrating out-of-source passes to new PassManager?
5:08PM 1 Build problems
4:55PM 1 [RFC][SVE] Supporting Scalable Vector Architectures in LLVM IR (take 2)
4:26PM 2 VirtRegMap invariant: no reserved physical registers?
2:55PM 1 Question about llvm::Value::print performance
2:54PM 2 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
2:50PM 1 Question about llvm::Value::print performance
2:43PM 1 Question about llvm::Value::print performance
2:38PM 1 Question about llvm::Value::print performance
2:30PM 1 Question about llvm::Value::print performance
2:17PM 2 libc++ failed to link against musl
2:13PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
12:32PM 1 trying to get a minimal windows program linked with lld
12:17PM 1 Possible llc bug: "Virtual register defs don't dominate all uses."
11:17AM 1 libc++ failed to link against musl
4:13AM 1 RFC: Killing undef and spreading poison
3:24AM 1 Is every intrinsic norecurse?
2:22AM 2 Backend implementation for an architecture with only majority operation instruction
2:16AM 1 Is every intrinsic norecurse?
2:02AM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
1:07AM 1 llvm-objcopy proposal
12:59AM 1 Providing __dso_handle in LLVM
 
Sunday June 4 2017
TimeRepliesSubject
10:29PM 2 Is every intrinsic norecurse?
9:50PM 1 trying to get a minimal windows program linked with lld
9:46PM 1 trying to get a minimal windows program linked with lld
8:39PM 1 [newbie] trouble with global variables and CreateLoad/Store in JIT
8:20PM 1 LLVM compilation problem with musl
8:15PM 1 trying to get a minimal windows program linked with lld
8:01PM 1 LLVM compilation problem with musl
7:54PM 1 LLVM compilation problem with musl
7:33PM 1 trying to get a minimal windows program linked with lld
7:05PM 1 Rel400 LLVM_ENABLE_PROJECTS clang directory not found
5:50PM 4 Should we split llvm Support and ADT?
5:37PM 1 Should we split llvm Support and ADT?
4:11PM 1 Question
3:39PM 1 Question
9:09AM 1 Enable STATISTIC all the time again?
7:32AM 1 need more information about the two classes of CallInst and CastInst
7:25AM 1 need more information about the two classes of CallInst and CastInst
4:18AM 1 Backend implementation of an architecture having only majority instructions
3:37AM 1 Pseudo-instruction that overwrites its input register
2:31AM 0 Get elements from a getelementptr constant expression
12:46AM 1 Problem in adding llvm instructions
12:14AM 1 building llvm_Rel400 on Scientific Linux (RHEL) 7.3 x86_64
12:12AM 1 building llvm_Rel400 on Scientific Linux (RHEL) 7.3 x86_64
12:03AM 1 llvm-dev Digest, Vol 156, Issue 13
 
Saturday June 3 2017
TimeRepliesSubject
11:04PM 1 building llvm_Rel400 on Scientific Linux (RHEL) 7.3 x86_64
9:29PM 1 building llvm_Rel400 on Scientific Linux (RHEL) 7.3 x86_64
3:58PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
3:33PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
3:13PM 0 How the LLVM handle the debug location information of continue keyword and right brace(loop end location)?
3:02PM 1 Backend implementation of an architecture having only majority instructions
2:32PM 1 Backend implementation of an architecture having only majority instructions
1:00PM 1 [CommandLine] Missing clEnumValEnd for cl::values in tutorial page
12:13PM 1 Pseudo-instruction that overwrites its input register
11:42AM 1 Compiling program with dfsan at IR
11:20AM 1 How the LLVM handle the debug location information of continue keyword and right brace(loop end location)?
10:43AM 1 Compiling program with dfsan at IR
9:19AM 1 Compiling program with dfsan at IR
7:48AM 1 How the LLVM handle the debug location information of continue keyword and right brace(loop end location)?
3:41AM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
3:36AM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
3:36AM 0 llvm-dev Digest, Vol 156, Issue 13
3:35AM 1 Question regarding to learn LLVM
2:21AM 0 setjmp in llvm
12:03AM 1 Providing __dso_handle in LLVM
 
Friday June 2 2017
TimeRepliesSubject
10:52PM 1 llvm-objcopy proposal
9:50PM 1 setjmp in llvm
8:51PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
8:16PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
8:01PM 1 Providing __dso_handle in LLVM
7:49PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
7:39PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
7:29PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
7:18PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
7:12PM 1 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
6:50PM 1 How the LLVM handle the debug location information of continue keyword and right brace(loop end location)?
6:34PM 2 llvm-objcopy proposal
3:46PM 5 [RFC][ThinLTO] llvm-dis ThinLTO summary dump format
3:44PM 1 How the LLVM handle the debug location information of continue keyword and right brace(loop end location)?
3:30PM 1 Failed to build libunwind the libcxx's __config header
3:08PM 0 TEMP_FAILURE_RETRY-like functionality in the support library (?)
3:06PM 2 Failed to build libunwind the libcxx's __config header
2:49PM 1 Failed to build libunwind the libcxx's __config header
2:34PM 1 Function with multi return path?
1:14PM 2 Providing __dso_handle in LLVM
1:00PM 1 Communication between Clang Sema and the Clang Codegen...
11:51AM 1 Function with multi return path?
10:40AM 1 Question regarding to learn LLVM
7:50AM 0 lld crash working with .lib import files
7:46AM 1 Compiling program with dfsan at IR
4:41AM 1 [SemaCXX] Should we fix test failing due to reverse iteration?
3:47AM 3 Providing __dso_handle in LLVM
3:13AM 2 Backend implementation for an architecture with only majority operation instruction
2:38AM 1 Function with multi return path?
1:28AM 1 llvm-objcopy proposal
1:18AM 1 RFC: Killing undef and spreading poison
12:21AM 5 llvm-objcopy proposal
 
Thursday June 1 2017
TimeRepliesSubject
10:49PM 1 [cfe-dev] [SemaCXX] Should we fix test failing due to reverse iteration?
9:18PM 1 Should we split llvm Support and ADT?
9:15PM 2 Should we split llvm Support and ADT?
8:49PM 2 [SemaCXX] Should we fix test failing due to reverse iteration?
8:46PM 2 [SemaCXX] Should we fix test failing due to reverse iteration?
8:23PM 1 restrict pointer support in LLVM 4.0
8:23PM 1 [RFC] Making -mcpu=generic the default for ARM armv7a and arm8a rather than -mcpu=cortex-a8 or -mcpu=cortex-a53
7:59PM 1 restrict pointer support in LLVM 4.0
5:40PM 1 Running lit (googletest) tests remotely
4:44PM 0 Function with multi return path?
4:34PM 4 LLVM 4.0.1 -rc2 has been tagged
4:06PM 1 LLVM header not found
2:46PM 1 [GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
2:22PM 2 [RFC][SVE] Supporting Scalable Vector Architectures in LLVM IR (take 2)
1:47PM 1 [frontend-dev][beginner] Allocation of structures
1:12PM 1 Enable vectorizer-maximize-bandwidth by default?
11:57AM 1 Enable vectorizer-maximize-bandwidth by default?
11:57AM 1 restrict pointer support in LLVM 4.0
11:47AM 1 Enable vectorizer-maximize-bandwidth by default?
11:24AM 1 Test-suite bots red because of missing import
11:18AM 1 Test-suite bots red because of missing import
10:11AM 1 Test-suite bots red because of missing import
10:08AM 1 Test-suite bots red because of missing import
9:59AM 1 Test-suite bots red because of missing import
9:21AM 1 Test-suite bots red because of missing import
9:17AM 0 [RFC] Making -mcpu=generic the default for ARM armv7a and arm8a rather than -mcpu=cortex-a8 or -mcpu=cortex-a53
9:14AM 0 Buildbots timing out on full builds
7:23AM 1 Prevent anonymous union optimization
6:08AM 0 RVA support
5:03AM 1 Should we split llvm Support and ADT?
4:36AM 1 Should we split llvm Support and ADT?
3:57AM 1 Function with multi return path?
1:17AM 1 How to use FileCheck to check that two registers are different
12:11AM 1 Should we split llvm Support and ADT?
12:06AM 1 Should we split llvm Support and ADT?
12:04AM 1 Should we split llvm Support and ADT?