llvm dev - Feb 2016 - Failure to match a DAG after a minor pattern change in a custom Target

On Fri, Feb 19, 2016 at 6:10 AM, Krzysztof Parzyszek via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> On 2/18/2016 6:01 PM, Rail Shafigulin via llvm-dev wrote:
>
>>             [(set SR:$rD, (Esenciasetflag (i32 GPR:$rA), (i32
>> immSExt16:$imm), (i32 Cond)))]> {
>>
>
> I suspect that the "set SR:$rD" is the problem here.  The
Esenciasetflag
> does not have any values that can be assigned to a
> register, so it's probably this part that causes the pattern to fail.
>
Would you mind showing how to make Esenciasetflag to actually set a flag? I
can't figure out the syntax.

>
>
> Tablegen creates a xxxGenDAGISel.inc file in your target's build
> directory. The "index" numbers that the debugging info shows
correspond to
> the numbers in that file.  Here's an example from
HexagonGenDAGISel.inc:
>
> /*28*/              OPC_Scope, 88|128,3/*472*/, /*->503*/ // 3 children
in
> Scope
> /*31*/                OPC_MoveChild, 1,
> /*33*/                OPC_CheckOpcode, TARGET_VAL(ISD::ADD),
> /*36*/                OPC_RecordChild0, // #2 = $base
> /*37*/                OPC_RecordChild1, // #3 = $offset
> /*38*/                OPC_MoveChild, 1,
> /*40*/                OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
> /*43*/                OPC_Scope, 65, /*->110*/ // 7 children in Scope
> /*45*/                  OPC_CheckPredicate, 0, // Predicate_u32ImmPred
> /*47*/                  OPC_MoveParent,
> /*48*/                  OPC_CheckType, MVT::i32,
>
> When the matcher says "false predicate at index 123", you can
look at the
> line marked with /*123*/ and see exactly what predicate it was checking.
> This helps immensely with solving such problems.
>
>
> -Krzysztof
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
> by The Linux Foundation
> _______________________________________________
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>


-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
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On 2/22/2016 1:50 PM, Rail Shafigulin wrote:
> Would you mind showing how to make Esenciasetflag to actually set a
> flag? I can't figure out the syntax.
Is the "setflag" instruction setting something in a special register 
(such as EFLAGS on x86)?  If so, then you can add "let Defs [xyz] in 
..." to your .td definition of that instruction and leave the
"set" out
of the pattern.

The type that you defined
   def SDT_EsenciaSetFlag      : SDTypeProfile<0, 3, [SDTCisSameAs<0,
1>]>;
indicates 0 return values, so it would match this approach.

If the instructions is intended to actually produce a value that could 
be stored in an allocatable register, then you'd need to change the type 
to have 1 return value.  The selection pattern would likely work as is.

-Krzysztof


-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, 
hosted by The Linux Foundation

Thanks for the reply. I actually managed to figure it out before the
answer. You first post was correct. The issue was with the set SR:$rD. I
simply need to remove it.

Thanks for the help.

On Fri, Feb 26, 2016 at 6:31 AM, Krzysztof Parzyszek <
kparzysz at codeaurora.org> wrote:
> On 2/22/2016 1:50 PM, Rail Shafigulin wrote:
>
>> Would you mind showing how to make Esenciasetflag to actually set a
>> flag? I can't figure out the syntax.
>>
>
> Is the "setflag" instruction setting something in a special
register (such
> as EFLAGS on x86)?  If so, then you can add "let Defs [xyz] in
..." to your
> .td definition of that instruction and leave the "set" out of the
pattern.
>
> The type that you defined
>   def SDT_EsenciaSetFlag      : SDTypeProfile<0, 3, [SDTCisSameAs<0,
1>]>;
> indicates 0 return values, so it would match this approach.
>
> If the instructions is intended to actually produce a value that could be
> stored in an allocatable register, then you'd need to change the type
to
> have 1 return value.  The selection pattern would likely work as is.
>
>
> -Krzysztof
>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
> by The Linux Foundation
>


-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
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