Displaying 5 results from an estimated 5 matches for "sdt_esenciasetflag".
2016 Feb 19
3
Failure to match a DAG after a minor pattern change in a custom Target
...derstanding of DAG patterns is quite weak, I'd appreciate any
help on this. For that matter, any opportunity to learn about LLVM is
welcomed. Original code, modified code as well as the error are provided
below. I can provide more if needed. There were two changes made. One in
the definition of SDT_EsenciaSetFlag and another in SF_RI class
(specifically in its DAG pattern).
Any help is appreciated.
========================= Orignal Code =====================================
def SDT_EsenciaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
def Esenciasetflag : SDNode<"Esenc...
2016 Feb 22
2
Failure to match a DAG after a minor pattern change in a custom Target
On Fri, Feb 19, 2016 at 6:10 AM, Krzysztof Parzyszek via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> On 2/18/2016 6:01 PM, Rail Shafigulin via llvm-dev wrote:
>
>> [(set SR:$rD, (Esenciasetflag (i32 GPR:$rA), (i32
>> immSExt16:$imm), (i32 Cond)))]> {
>>
>
> I suspect that the "set SR:$rD" is the problem here. The Esenciasetflag
2016 Feb 26
0
Failure to match a DAG after a minor pattern change in a custom Target
...ntax.
Is the "setflag" instruction setting something in a special register
(such as EFLAGS on x86)? If so, then you can add "let Defs [xyz] in
..." to your .td definition of that instruction and leave the "set" out
of the pattern.
The type that you defined
def SDT_EsenciaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
indicates 0 return values, so it would match this approach.
If the instructions is intended to actually produce a value that could
be stored in an allocatable register, then you'd need to change the type
to have 1 return value. T...
2016 Feb 04
2
New register class and patterns
..., since there is no output register, why
would LLVM start complaining. Below I'm repeating some code for reference.
Any help is appreciated.
def SDT_EscalaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
def Esenciasetflag : SDNode<"EsenciaISD::SET_FLAG", SDT_EsenciaSetFlag,
[SDNPOutGlue]>;
class SF_RI<bits<5> op2Val, string asmstr, PatLeaf Cond>
: InstRI<0xf, (outs), (ins GPR:$rA, s16imm:$imm),
!strconcat(asmstr, "i\t$rA, $imm"),
[(Escalasetflag (i32 GPR:$rA), immSExt16:$imm, Cond)]>...
2016 Feb 03
2
New register class and patterns
On Tue, Feb 2, 2016 at 8:42 PM, Matt Arsenault <arsenm2 at gmail.com> wrote:
>
> On Feb 2, 2016, at 16:52, Rail Shafigulin <rail at esenciatech.com> wrote:
>
> def SDT_EscalaSetFlag : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>]>;
>
>
> I think for setting an implicit register, you still need to have 1 result
> here.
>
> If you look at