Stephen Checkoway
2012-Sep-11 17:10 UTC
[LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass
On Sep 11, 2012, at 10:57 AM, John Criswell wrote:> I'm working on an X86 MachineFunctionPass that adds prefetch instructions to a function. I have code that adds a "prefetchnta <constant address>" instruction to x86 32-bit code. What I want to do is to add a "prefetchnta <constant address>" instruction to x86_64 code.Given that you don't actually want to execute this instruction ever, is there a reason to even emit the instruction? Why not just stick your ID directly into the code and then jump beyond it. Executing the instruction causes a slow down and it requires a bunch of extra bytes. If you can live with a 32-bit ID, it'll take 4 bytes. If you go the prefetchnta (or any of the other prefetch instructions) route, then on the x86_64, it looks like you're going to have 2 bytes of opcode, a mod r/m byte, and 8 bytes of address and look something like 0f 18 00 dd cc bb aa 00 00 00 00 (I probably got the mod r/m byte wrong, it's a /0 for prefetchnta at any rate). That's just going to add extra pressure to the icache.> The code for adding the 32-bit instruction is: > > BuildMI(MBB,MI,dl,TII->get(X86::PREFETCHNTA)).addReg(0).addImm(0).addReg(0).addImm(<constant>).addReg(0);That's surprising to me. What are all of those registers and immediates for? -- Stephen Checkoway
Gurd, Preston
2012-Sep-11 18:52 UTC
[LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass
-----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of John Criswell Sent: Tuesday, September 11, 2012 1:42 PM To: Steve Checkoway Cc: LLVMdev at cs.uiuc.edu Subject: Re: [LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass ...> >> The code for adding the 32-bit instruction is: >> >> BuildMI(MBB,MI,dl,TII->get(X86::PREFETCHNTA)).addReg(0).addImm(0).add >> Reg(0).addImm(<constant>).addReg(0); > That's surprising to me. What are all of those registers and immediates for?That is precisely my question. What do all of those register and immediate arguments do? -- John T. The X86 backend records a machine memory operand using a sequence of five operands, as follows: Base Register Scale Amount Index Register Address offset Segment register See lib/Target/X86/MCTargetDesc/X86BaseInfo.h. Preston
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