search for: x86baseinfo

...break; when i used the command: llc -x86-asm-syntax=intel -debug -p-enabled=true -filetype=obj sum-vec03.ll>objpon 2>&1 i am getting the following error: ********** COMPUTING STACKMAP LIVENESS: foo ********** Unknown immediate size UNREACHABLE executed at lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574! #0 0x00000000019d9fec llvm::sys::PrintStackTrace(llvm::raw_ostream&) lib/Support/Unix/Signals.inc:402:11 #1 0x00000000019da4d9 PrintStackTraceSignalHandler(void*) lib/Support/Unix/Signals.inc:466:1 #2 0x00000000019d8853 llvm::sys::RunSignalHandlers() lib/Support/Signals.cpp:0:5 #3 0x0000...

...there are no error coming. But for vector add instruction is something like this; > %R_0_REG2048b_1<def> = P_256B_VADD %R_0_REG2048b_1<kill>, %R_0_REG2048b_0<kill> I am getting the following error: Unknown immediate size UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574! i made extensive use of gdb and after debugging i found the line with issue in X86MCCodeEmitter.cpp. Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. then, the following code gets executed; case X86II::MRMDestReg: { EmitByte(BaseOpcode, CurByte, OS); unsigned...

...precisely my question. What do all of those register and immediate arguments do? -- John T. The X86 backend records a machine memory operand using a sequence of five operands, as follows: Base Register Scale Amount Index Register Address offset Segment register See lib/Target/X86/MCTargetDesc/X86BaseInfo.h. Preston

I have made changes in 3 files: LaneBitmask.h, codegenregisters.cpp and miparser.cpp. files are attached here. Now i am getting following errors. which means registerinfo.inc file is not generated successfully. /PIM/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:733:24: error: no member named 'XMM8' in namespace 'llvm::X86' if ((RegNo >= X86::XMM8 && RegNo <= X86::XMM31) || fatal error: too many errors emitted, stopping now [-ferror-limit=] 20 errors generated. When i comment out the line to construct 65536 bit...

...t %gs will be used, when I perform objdump -d on my executable I am see that %gs is replaced by %ebp? Why is this happening? I know it probably has something to do with me not specifying operands properly, but I cannot find enough documentation on this besides looking through code comments such as X86BaseInfo.cpp. I feel there isn't enough for me to be able to connect the dots. Below I have sample code: %gs holds a base address to a memory location where I am trying to store information. I am trying to update the %gs register pointer location before saving more values, etc. LLVM C++ codeMachine Fu...

...ing like this; >> >> > %R_0_REG2048b_1<def> = P_256B_VADD %R_0_REG2048b_1<kill>, >> %R_0_REG2048b_0<kill> >> >> I am getting the following error: >> >> Unknown immediate size >> UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574! >> >> >> i made extensive use of gdb and after debugging i found the line with >> issue in X86MCCodeEmitter.cpp. >> >> Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. >> >> then, the following code gets executed; >> &g...

...LaneBitmask.h, codegenregisters.cpp and miparser.cpp. files are >> attached here. >> >> Now i am getting following errors. which means registerinfo.inc >> file is not generated successfully. >> >> /PIM/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:733:24: error: >> no member named 'XMM8' in namespace 'llvm::X86' >> if ((RegNo >= X86::XMM8 && RegNo <= X86::XMM31) || >> >> >> fatal error: too many errors emitted, stopping now >> [-ferror-l...

...d on my executable I am see that >> %gs is replaced by %ebp? Why is this happening? >> >> I know it probably has something to do with me not specifying operands >> properly, but I cannot find enough documentation on this besides >> looking through code comments such as X86BaseInfo.cpp. I feel there >> isn't enough for me to be able to connect the dots. >> >> Below I have sample code: %gs holds a base address to a memory >> location where I am trying to store information. I am trying to update >> the %gs register pointer location before savin...

On Sep 11, 2012, at 10:57 AM, John Criswell wrote: > I'm working on an X86 MachineFunctionPass that adds prefetch instructions to a function. I have code that adds a "prefetchnta <constant address>" instruction to x86 32-bit code. What I want to do is to add a "prefetchnta <constant address>" instruction to x86_64 code. Given that you don't actually

On 9/11/12 12:10 PM, Stephen Checkoway wrote: > On Sep 11, 2012, at 10:57 AM, John Criswell wrote: > >> I'm working on an X86 MachineFunctionPass that adds prefetch instructions to a function. I have code that adds a "prefetchnta <constant address>" instruction to x86 32-bit code. What I want to do is to add a "prefetchnta <constant address>"

My team interested in doing some post-RA optimizations on X86 instructions, which would require identifying memory reference instructions. In the X86 back end instructions, memory addresses consist of a set of five operands. The offset to the start of the five operands depends on the format of the instruction. For instance, the instructions ADC32rm, ADD32rm, AND32rm, ANDN32rm, CMOVA32rm,

What about the static asserts protecting a Log call and another in the parser? On Wed, Jul 19, 2017 at 2:26 PM Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote: > On 7/19/2017 4:18 PM, Craig Topper wrote: > > LaneMask isn't as self contained as it should be. 64 bits is enough > > here. The problem is accidental leaking of the current size. > > > > For

...;> %gs is replaced by %ebp? Why is this happening? > >>> > >>> I know it probably has something to do with me not specifying operands > >>> properly, but I cannot find enough documentation on this besides > >>> looking through code comments such as X86BaseInfo.cpp. I feel there > >>> isn't enough for me to be able to connect the dots. > >>> > >>> Below I have sample code: %gs holds a base address to a memory > >>> location where I am trying to store information. I am trying to update > >>> t...

...s happening? > >> >>> > >> >>> I know it probably has something to do with me not specifying > operands > >> >>> properly, but I cannot find enough documentation on this besides > >> >>> looking through code comments such as X86BaseInfo.cpp. I feel there > >> >>> isn't enough for me to be able to connect the dots. > >> >>> > >> >>> Below I have sample code: %gs holds a base address to a memory > >> >>> location where I am trying to store information. I am...

Hi, I'm having some trouble wirting an instruction in the X86 backend. I made a new intrinsic and I wrote a custom inserter for my intrinsic in the X86 backend. Everything works fine, except for one instruction that I can't find how to write. I want to add this instruction in one of my machine basic block: mov [rdi], 0 How can I achieve that with the LLVM api? I tried several

...48b_1<def> = P_256B_VADD %R_0_REG2048b_1<kill>, >>>> %R_0_REG2048b_0<kill> >>>> >>>> I am getting the following error: >>>> >>>> Unknown immediate size >>>> UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574! >>>> >>>> >>>> i made extensive use of gdb and after debugging i found the line with >>>> issue in X86MCCodeEmitter.cpp. >>>> >>>> Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. >>>> >...