search for: checkoway

Displaying 20 results from an estimated 127 matches for "checkoway".

2019 Nov 22
2
Random nop insertion pass
.... If that was the use case in mind, did you happen to compare it to other randomized codegen? I'm only curious because this has historically been an area of research of mine [2,3,4], not any sort of pressing matter. Thank you, Steve 1. https://github.com/JonathanSalwan/ROPgadget 2. https://checkoway.net/papers/evt2009/evt2009.pdf 3. https://checkoway.net/papers/noret_ccs2010/noret_ccs2010.pdf 4. https://checkoway.net/papers/fcfi2014/fcfi2014.pdf -- Stephen Checkoway
2013 Oct 28
2
[LLVMdev] Are Opcode and register mappings exposed anywhere?
...thing like: if (Inst.getOpcode() == X86::CALL64r) { if (Inst.getOperand(0).getReg() == X86::RIP) { // ... } } E.g., exposing some of the tablegened enums in X86GenRegisterInfo.inc and X86GenInstrInfo.inc would be very handy. Steve > > > On Oct 28, 2013 12:03 PM, "Stephen Checkoway" <s at pahtak.org> wrote: > I'm iterating over MCInsts and I'd like to examine particular instructions. For example, I'd like to look at all x86 CALL64m instructions. I may be missing something, but it seems like my only option is to use MCInstPrinter::getOpcodeName and co...
2018 Jan 04
2
FYI, we've posted a component of Spectre mitigation on llvm-commits
On Thu, Jan 4, 2018 at 12:31 PM Stephen Checkoway via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > > On Jan 4, 2018, at 04:23, Chandler Carruth via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > Sending a note here as this seems likely to be of relatively broad > interest. > > It looks li...
2020 Jan 08
2
Inline assembly in intel syntax mishandling i constraint
.... Looking at the GitHub page, it looks like Rust maintains their own copy of llvm and cherry picks commits. The C example was compiled with 6.0. If it's fixed in LLVM, then I'll file a bug with Rust. Thanks, Steve > > ~Craig > > > On Tue, Jan 7, 2020 at 2:44 PM Stephen Checkoway via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Hi all, > > I'm getting rather odd behavior from a call asm inteldialect(). TL;DR is "mov reg, $0" with a "i" constraint on $0 is behaving identical to "mov reg, dword ptr [$0]" and differently from...
2013 Oct 28
2
[LLVMdev] Are Opcode and register mappings exposed anywhere?
...I could iterate through the opcodes and build up a table of the ones I'm interested in to avoid string comparisons.) Register mappings to names seem to be even worse. It appears you have to go through MCInstPrinter::printRegName(raw_ostream&, unsigned). Is there a better way? -- Stephen Checkoway
2013 Nov 15
2
[LLVMdev] Proposal: release MDNodes for source modules (LTO+debug info)
...reakpoint in > Descriptors::close_some_descriptor and checking why it is failing to > close the files. That is a lot of file descriptors to keep open. It's well above my system's default hard and soft limit, iirc. I'll try to look at it next week. Deadlines looming! -- Stephen Checkoway
2013 Oct 29
0
[LLVMdev] Are Opcode and register mappings exposed anywhere?
Can't you just include the generated files? What different way would you like them exposed? On Mon, Oct 28, 2013 at 11:23 AM, Stephen Checkoway <s at pahtak.org> wrote: > > On Oct 28, 2013, at 2:02 PM, Tyler Hardin <tghardin1 at catamount.wcu.edu> > wrote: > > > See the source here: > https://github.com/earl/llvm-mirror/blob/master/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp. > It looks like getR...
2018 Jan 04
0
FYI, we've posted a component of Spectre mitigation on llvm-commits
On Jan 4, 2018, at 11:52, Chandler Carruth via llvm-dev <llvm-dev at lists.llvm.org> wrote: > On Thu, Jan 4, 2018 at 12:31 PM Stephen Checkoway via llvm-dev <llvm-dev at lists.llvm.org> wrote: > >> As I understand it, the busy loop is to cause the speculative execution to be trapped in the loop. Was something like ud2 considered? I presume that would stop the speculative execution without involving any of the execution unit...
2013 Nov 15
2
[LLVMdev] Proposal: release MDNodes for source modules (LTO+debug info)
On Nov 15, 2013, at 10:19 AM, Rafael Espíndola <rafael.espindola at gmail.com> wrote: > On 14 November 2013 18:01, Stephen Checkoway <s at pahtak.org> wrote: >> >> On Nov 14, 2013, at 8:19 AM, Rafael Espíndola <rafael.espindola at gmail.com> wrote: >> >>> But gold has at most 2 objects loaded at any time. >> >> Are you sure about that? I haven't looked into it but while b...
2013 Oct 28
0
[LLVMdev] Are Opcode and register mappings exposed anywhere?
...tRegisterName might do what you want, but I don't know where it's coming from. (Whether it's a function or a member of a super class. Hopefully, if it's a member, it's public.) PS Sorry for the duplicate, Stephen. I forgot to CC the list. On Oct 28, 2013 12:03 PM, "Stephen Checkoway" <s at pahtak.org> wrote: > I'm iterating over MCInsts and I'd like to examine particular > instructions. For example, I'd like to look at all x86 CALL64m > instructions. I may be missing something, but it seems like my only option > is to use MCInstPrinter::getO...
2013 Nov 20
2
[LLVMdev] Issues with inline assembly
On Wed, Nov 20, 2013 at 8:55 PM, Stephen Checkoway <s at pahtak.org> wrote: > > This has come up before <https://groups.google.com/forum/#!topic/llvm-dev/vomnIQjefzA>. I don't recall if there was a resolution. > Thanks for the link, completely missed when googled the issue. I think no consensus was reached (I cannot find a...
2017 Jan 17
2
Git Transition status?
> On Jan 17, 2017, at 12:33 PM, Stephen Checkoway <s at pahtak.org> wrote: > > >> On Jan 17, 2017, at 10:11, Mehdi Amini via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Actually you have to opt-in instead of opt-out right now, and I encourage you to try it if you’re contributing to LLVM: http://llvm.or...
2013 Nov 20
0
[LLVMdev] Issues with inline assembly
On Nov 20, 2013, at 4:11 PM, Ghitulete Razvan <razvan.ghitulete at gmail.com> wrote: > On Wed, Nov 20, 2013 at 8:55 PM, Stephen Checkoway <s at pahtak.org> wrote: >> >> This has come up before <https://groups.google.com/forum/#!topic/llvm-dev/vomnIQjefzA>. I don't recall if there was a resolution. >> > > Thanks for the link, completely missed when googled the issue. I think > no consensus...
2014 Oct 10
3
[LLVMdev] Stange behavior in fp arithmetics on x86 (bug possibly)
...tinguishing between near and far (e.g., ret vs. lret in AT&T or retn vs. retf with some other assemblers) makes sense, but what would a l or q suffix denote? But more to the point, even if there's a good reason to accept retl/retq as input, is there any reason to emit it ever? -- Stephen Checkoway
2017 Jan 17
2
Git Transition status?
> On Jan 17, 2017, at 12:44 PM, Stephen Checkoway <s at pahtak.org> wrote: > > >> On Jan 17, 2017, at 14:39, Mehdi Amini <mehdi.amini at apple.com> wrote: >> >> >>> On Jan 17, 2017, at 12:33 PM, Stephen Checkoway <s at pahtak.org> wrote: >>> >>> >>>> On Jan 17,...
2013 Nov 15
0
[LLVMdev] Proposal: release MDNodes for source modules (LTO+debug info)
Just a guess, but it might have something to do with the chrome build using thin archives. On 15 November 2013 11:30, Stephen Checkoway <s at pahtak.org> wrote: > > On Nov 15, 2013, at 11:16 AM, Rafael Espíndola <rafael.espindola at gmail.com> wrote: > >> Taking a really quick at the gold code it looks like it tries to keep >> 8176 files open. I would suggest putting a breakpoint in >> Descrip...
2013 Nov 15
0
[LLVMdev] Proposal: release MDNodes for source modules (LTO+debug info)
Taking a really quick at the gold code it looks like it tries to keep 8176 files open. I would suggest putting a breakpoint in Descriptors::close_some_descriptor and checking why it is failing to close the files. On 15 November 2013 11:03, Stephen Checkoway <s at pahtak.org> wrote: > > On Nov 15, 2013, at 10:19 AM, Rafael Espíndola <rafael.espindola at gmail.com> wrote: > >> On 14 November 2013 18:01, Stephen Checkoway <s at pahtak.org> wrote: >>> >>> On Nov 14, 2013, at 8:19 AM, Rafael Espíndola <...
2014 Oct 20
2
[LLVMdev] Performance regression on ARM
...) = (ac + bd)/(c^2 + d^2) + i(bc - ad)/(c^2 + d^2). (Polar form is more convenient for multiplication and division: a*exp(is) * b*exp(it) = ab*exp(i(s+t)) and division by nonzero a*exp(is) is the same as multiplication by 1/a exp(-is). Addition and subtraction become annoying though.) -- Stephen Checkoway
2011 Dec 07
2
回复: 回复: (no subject)
...encode file to speex format. In my application I will use > this > function from 16 threads, if it will work correct? Surely that depends on the implementation of your Encode function. If you use different encoder state for each file you're encoding, it will work fine. -- Steve Checkoway -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 4745 bytes Desc: not available Url : http://lists.xiph.org/pipermail/speex-dev/attachments/20111207/fe677302/attachment.bin
2017 Feb 13
2
Bugzilla invalid certificate issues
EV certs attempt validate the identity of the organization that holds them.  That is a nice assurance to have from a place that makes the thing that compiles your code. On February 11, 2017 at 12:28:08 PM, Stephen Checkoway (s at pahtak.org) wrote: > On Feb 10, 2017, at 18:27, Chris Matthews via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Letsencrypt only offers domain validation certs. I think an EV cert would be more appropriate for llvm.org. Interesting, why do you think EV certs are mo...