| Friday August 31 2012 |
| Time | Replies | Subject |
|---|
| 10:22PM |
0 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 10:13PM |
3 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 10:01PM |
0 |
[LLVMdev] Question regarding ReplaceValueWith and ReplaceNodeResults |
| 9:48PM |
3 |
[LLVMdev] Question regarding ReplaceValueWith and ReplaceNodeResults |
| 8:56PM |
1 |
[LLVMdev] select legalization |
| 8:29PM |
2 |
[LLVMdev] Clang incompatible with GCC on Linux + ARM Cortex-A9 |
| 6:57PM |
0 |
[LLVMdev] Assert in LiveInterval update |
| 5:51PM |
0 |
[LLVMdev] Announcement: Version 2012.2 of LLBMC available |
| 4:53PM |
2 |
[LLVMdev] Assert in LiveInterval update |
| 4:41PM |
1 |
[LLVMdev] Overriding TargetRegisterInfo::hasReservedSpillSlot |
| 3:11PM |
0 |
[LLVMdev] TableGen backend support to express relations between instruction |
| 3:19AM |
0 |
[LLVMdev] Function inline pass core dump when removing a function |
| 2:43AM |
0 |
[LLVMdev] How to write a regression test case? |
| 2:23AM |
2 |
[LLVMdev] How to write a regression test case? |
| |
| Thursday August 30 2012 |
| Time | Replies | Subject |
|---|
| 11:08PM |
1 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 10:58PM |
0 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 10:51PM |
2 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 10:42PM |
0 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 10:27PM |
4 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 10:03PM |
0 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 10:01PM |
1 |
[LLVMdev] LoadInst::getAlignment |
| 9:38PM |
2 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 9:13PM |
0 |
[LLVMdev] MC Register mapping question (MCRegUnitIterator ) |
| 8:34PM |
0 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 8:30PM |
0 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 8:20PM |
2 |
[LLVMdev] MC Register mapping question (MCRegUnitIterator ) |
| 8:17PM |
0 |
[LLVMdev] Assert in LiveInterval update |
| 8:01PM |
0 |
[LLVMdev] MC Register mapping question (MCRegUnitIterator ) |
| 7:43PM |
2 |
[LLVMdev] MC Register mapping question (MCRegUnitIterator ) |
| 7:30PM |
0 |
[LLVMdev] MC Register mapping question (MCRegUnitIterator ) |
| 4:00PM |
2 |
[LLVMdev] dynamic_cast error detection |
| 2:44PM |
1 |
[LLVMdev] Problems building llvm on AIX |
| 3:45AM |
1 |
[LLVMdev] PHI |
| |
| Wednesday August 29 2012 |
| Time | Replies | Subject |
|---|
| 9:47PM |
1 |
[LLVMdev] [llvm-commits] [PATCH] Refactoring the DFA generator |
| 6:27PM |
0 |
[LLVMdev] LLVM Lab had network issues |
| 5:48PM |
0 |
[LLVMdev] RFC: How can AddressSanitizer, ThreadSanitizer, and similar runtime libraries leverage shared library code? |
| 2:29PM |
0 |
[LLVMdev] How to write a regression test case? |
| 2:13PM |
0 |
[LLVMdev] LLVM Austin Social |
| 2:03PM |
0 |
[LLVMdev] Correct usage of isysroot argument |
| 12:54PM |
2 |
[LLVMdev] Correct usage of isysroot argument |
| 10:10AM |
1 |
[LLVMdev] Given alias knowledge, how to optimize? |
| 8:06AM |
0 |
[LLVMdev] Correct usage of isysroot argument |
| 7:28AM |
0 |
[LLVMdev] Hellogcc 2012 Workshop, Beijing, Nov. 10th |
| 6:56AM |
3 |
[LLVMdev] How to write a regression test case? |
| 6:41AM |
0 |
[LLVMdev] How to write a regression test case? |
| 6:14AM |
2 |
[LLVMdev] How to write a regression test case? |
| 5:55AM |
1 |
[LLVMdev] inlining with O3 and O4 |
| 5:39AM |
0 |
[LLVMdev] inlining with O3 and O4 |
| 5:18AM |
0 |
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible? |
| 4:11AM |
2 |
[LLVMdev] inlining with O3 and O4 |
| 3:38AM |
0 |
[LLVMdev] A script for updating all the nested git clients |
| 1:57AM |
0 |
[LLVMdev] How to require ScalarEvolution analysis in a Module pass? |
| 12:39AM |
0 |
[LLVMdev] How to write a regression test case? |
| |
| Tuesday August 28 2012 |
| Time | Replies | Subject |
|---|
| 11:59PM |
0 |
[LLVMdev] Function inlining and JIT |
| 11:28PM |
2 |
[LLVMdev] Function inlining and JIT |
| 10:19PM |
7 |
[LLVMdev] LLVM Austin Social |
| 9:33PM |
5 |
[LLVMdev] Assert in LiveInterval update |
| 8:46PM |
0 |
[LLVMdev] Assert in LiveInterval update |
| 7:11PM |
1 |
[LLVMdev] TableGen backend support to express relations between instruction |
| 6:46PM |
0 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 6:27PM |
0 |
[LLVMdev] TableGen backend support to express relations between instruction |
| 6:09PM |
0 |
[LLVMdev] RFC: MCJIT enhancements |
| 6:01PM |
4 |
[LLVMdev] TableGen backend support to express relations between instruction |
| 3:18PM |
2 |
[LLVMdev] Assert in LiveInterval update |
| 9:14AM |
1 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 7:22AM |
1 |
[LLVMdev] How to write a regression test case? |
| 6:58AM |
0 |
[LLVMdev] How to write a regression test case? |
| 6:41AM |
4 |
[LLVMdev] How to write a regression test case? |
| 6:35AM |
0 |
[LLVMdev] How to write a regression test case? |
| 6:28AM |
3 |
[LLVMdev] How to write a regression test case? |
| 6:26AM |
1 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 6:20AM |
0 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 5:47AM |
0 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 5:39AM |
2 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 5:28AM |
0 |
[LLVMdev] How to write a regression test case? |
| 5:22AM |
3 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 5:15AM |
2 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 5:08AM |
0 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 4:38AM |
2 |
[LLVMdev] How to write a regression test case? |
| 4:25AM |
0 |
[LLVMdev] How to write a regression test case? |
| 3:43AM |
3 |
[LLVMdev] How to write a regression test case? |
| 3:10AM |
0 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 2:57AM |
2 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 2:51AM |
0 |
[LLVMdev] Please help to fix -Wdocumentation warninigs |
| 2:30AM |
0 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| |
| Monday August 27 2012 |
| Time | Replies | Subject |
|---|
| 10:21PM |
0 |
[LLVMdev] [llvm-commits] [PATCH] Refactoring the DFA generator |
| 7:58PM |
0 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 7:27PM |
0 |
[LLVMdev] Where are the regression tests for tools like llvm-objdump? |
| 6:51PM |
1 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 6:41PM |
2 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 6:07PM |
2 |
[LLVMdev] Where are the regression tests for tools like llvm-objdump? |
| 4:42PM |
1 |
[LLVMdev] OSX 10.6 (Snow Leopard): strip: malformed object: clang malformed object (unknown load command 9) |
| 4:28PM |
0 |
[LLVMdev] The use-define chain in LLVM |
| 3:56PM |
0 |
[LLVMdev] Illegal node introduced by DAGCombiner after legal phase |
| 3:37PM |
0 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 3:25PM |
2 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 2:05PM |
0 |
[LLVMdev] trouble with cmake+ninja |
| 1:57PM |
1 |
[LLVMdev] powerpc XFAIL question |
| 1:56PM |
9 |
[LLVMdev] [RFC] Resurrecting the C back-end |
| 11:49AM |
2 |
[LLVMdev] Paris LLVM Social - 25. September |
| 9:37AM |
0 |
[LLVMdev] where can I find out the documents of how to write a llvm regression test case? |
| 8:36AM |
4 |
[LLVMdev] where can I find out the documents of how to write a llvm regression test case? |
| 7:36AM |
0 |
[LLVMdev] where can I find out the documents of how to write a llvm regression test case? |
| 7:34AM |
2 |
[LLVMdev] trouble with cmake+ninja |
| 7:21AM |
0 |
[LLVMdev] if you can give me an example? |
| 6:58AM |
2 |
[LLVMdev] where can I find out the documents of how to write a llvm regression test case? |
| 6:35AM |
1 |
[LLVMdev] where can I find out the documents of how to write a llvm regression test case? |
| 5:56AM |
1 |
[LLVMdev] info on coming out of SSA form |
| 5:39AM |
0 |
[LLVMdev] How to write a regression test case? |
| 1:13AM |
0 |
[LLVMdev] info on coming out of SSA form |
| |
| Sunday August 26 2012 |
| Time | Replies | Subject |
|---|
| 7:53PM |
0 |
[LLVMdev] How to Check whether BasicBlock resides in a conditional branch |
| 6:48PM |
3 |
[LLVMdev] Illegal node introduced by DAGCombiner after legal phase |
| |
| Saturday August 25 2012 |
| Time | Replies | Subject |
|---|
| 4:29PM |
2 |
[LLVMdev] How to Check whether BasicBlock resides in a conditional branch |
| 3:48PM |
0 |
[LLVMdev] How to Check whether BasicBlock resides in a conditional branch |
| 3:00PM |
0 |
[LLVMdev] How to Check whether BasicBlock resides in a conditional branch |
| 1:30PM |
0 |
[LLVMdev] how to use the profile-guided optimization of LLVM? |
| 12:43PM |
6 |
[LLVMdev] How to Check whether BasicBlock resides in a conditional branch |
| 11:42AM |
3 |
[LLVMdev] [llvm-commits] [PATCH] Refactoring the DFA generator |
| 5:50AM |
0 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 12:56AM |
1 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 12:37AM |
0 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| |
| Friday August 24 2012 |
| Time | Replies | Subject |
|---|
| 11:33PM |
0 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 11:26PM |
0 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 11:07PM |
5 |
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic |
| 5:00PM |
2 |
[LLVMdev] Stop opt from producing 832 bit integer? |
| 3:01PM |
0 |
[LLVMdev] [llvm-commits] [PATCH] Refactoring the DFA generator |
| 6:27AM |
2 |
[LLVMdev] info on coming out of SSA form |
| 1:23AM |
0 |
[LLVMdev] what is "Recursive compilation detected" error? |
| |
| Thursday August 23 2012 |
| Time | Replies | Subject |
|---|
| 5:13PM |
0 |
[LLVMdev] % in tablegen |
| 4:25PM |
0 |
[LLVMdev] [PATCH] Fix for bug in JIT exception table allocation (no test yet) |
| 12:20PM |
1 |
[LLVMdev] bending the limits of tbaa metadata |
| 11:58AM |
0 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 9:12AM |
0 |
[LLVMdev] Cambridge LLVM Social this week |
| 9:06AM |
0 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 7:14AM |
1 |
[LLVMdev] Error: "Recursive compilation" when run lli |
| |
| Wednesday August 22 2012 |
| Time | Replies | Subject |
|---|
| 11:06PM |
1 |
[LLVMdev] [PATCH] Fix for bug in JIT exception table allocation (no test yet) |
| 11:02PM |
0 |
[LLVMdev] [llvm-commits] PROPOSAL: LLVM_FALLTHROUGH macro for intended fall-throughs between switch cases |
| 10:59PM |
1 |
[LLVMdev] [llvm-commits] PROPOSAL: LLVM_FALLTHROUGH macro for intended fall-throughs between switch cases |
| 9:26PM |
1 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 9:00PM |
1 |
[LLVMdev] RFC: optimizing integer overflow checks |
| 8:15PM |
4 |
[LLVMdev] PROPOSAL: IR representation of detailed struct assignment information |
| 7:13PM |
0 |
[LLVMdev] No more TargetFlags on MO_Register MachineOperands |
| 6:52PM |
1 |
[LLVMdev] No more TargetFlags on MO_Register MachineOperands |
| 6:41PM |
0 |
[LLVMdev] No more TargetFlags on MO_Register MachineOperands |
| 6:34PM |
2 |
[LLVMdev] No more TargetFlags on MO_Register MachineOperands |
| 5:35PM |
1 |
[LLVMdev] Insert Self Written Function Call from a FunctionPass? |
| 4:40PM |
2 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 10:29AM |
2 |
[LLVMdev] question on optimizations: when to stop?? |
| 9:41AM |
1 |
[LLVMdev] buildbot failure in LLVM on clang-native-mingw64-win7 |
| 7:39AM |
2 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 7:32AM |
0 |
[LLVMdev] How to write a regression test case? |
| 7:20AM |
7 |
[LLVMdev] How to write a regression test case? |
| 6:25AM |
0 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 5:55AM |
0 |
[LLVMdev] How to write a regression test case? |
| 4:44AM |
2 |
[LLVMdev] How to write a regression test case? |
| 4:10AM |
0 |
[LLVMdev] issues registering passes in osx 10.8 |
| |
| Tuesday August 21 2012 |
| Time | Replies | Subject |
|---|
| 11:41PM |
0 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 10:45PM |
3 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 10:02PM |
0 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 9:55PM |
2 |
[LLVMdev] issues registering passes in osx 10.8 |
| 9:49PM |
0 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 9:12PM |
2 |
[LLVMdev] [PATCH] Fix for bug in JIT exception table allocation (no test yet) |
| 9:10PM |
0 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 9:02PM |
8 |
[LLVMdev] Let's get rid of neverHasSideEffects |
| 8:59PM |
0 |
[LLVMdev] issues registering passes in osx 10.8 |
| 8:52PM |
2 |
[LLVMdev] issues registering passes in osx 10.8 |
| 6:37PM |
2 |
[LLVMdev] No more TargetFlags on MO_Register MachineOperands |
| 6:21PM |
0 |
[LLVMdev] No more TargetFlags on MO_Register MachineOperands |
| 5:39PM |
0 |
[LLVMdev] bugpoint (and possibly others) need to be compiled with -rdynamic |
| 5:38PM |
2 |
[LLVMdev] A script for updating all the nested git clients |
| 5:24PM |
1 |
[LLVMdev] How to uniquely remember a loop? |
| 5:04PM |
2 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 5:01PM |
2 |
[LLVMdev] bugpoint (and possibly others) need to be compiled with -rdynamic |
| 4:28PM |
0 |
[LLVMdev] How to uniquely remember a loop? |
| 4:28PM |
1 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 2:57PM |
0 |
[LLVMdev] DominanceFrontier |
| 2:53PM |
1 |
[LLVMdev] How to write a regression test case? |
| 2:17PM |
1 |
[LLVMdev] Fwd: DomTreeNode |
| 1:40PM |
0 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 1:05PM |
0 |
[LLVMdev] Fwd: DomTreeNode |
| 12:56PM |
0 |
[LLVMdev] SelectionDAGISel::CodeGenAndEmitDAG() confusion. |
| 12:40PM |
3 |
[LLVMdev] Fwd: DomTreeNode |
| 12:22PM |
0 |
[LLVMdev] Fwd: DomTreeNode |
| 12:02PM |
2 |
[LLVMdev] Fwd: DomTreeNode |
| 11:44AM |
0 |
[LLVMdev] Fwd: DomTreeNode |
| 11:36AM |
0 |
[LLVMdev] How to write a regression test case? |
| 11:17AM |
2 |
[LLVMdev] How to uniquely remember a loop? |
| 10:08AM |
2 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 9:19AM |
0 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 9:16AM |
1 |
[LLVMdev] Dwarf debug info misses while clang codegen |
| 9:01AM |
3 |
[LLVMdev] Fwd: DomTreeNode |
| 8:35AM |
0 |
[LLVMdev] Fwd: DomTreeNode |
| 8:25AM |
2 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 8:19AM |
1 |
[LLVMdev] generate a weird 'and' instruction |
| 7:23AM |
0 |
[LLVMdev] -debug in make check |
| 4:22AM |
0 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 4:20AM |
0 |
[LLVMdev] Query on Global analysis followed by Global transformation |
| 2:08AM |
1 |
[LLVMdev] How to know the size of a 'long'? |
| |
| Monday August 20 2012 |
| Time | Replies | Subject |
|---|
| 11:42PM |
3 |
[LLVMdev] -debug in make check |
| 11:30PM |
2 |
[LLVMdev] No more TargetFlags on MO_Register MachineOperands |
| 9:38PM |
5 |
[LLVMdev] DomTreeNode |
| 8:58PM |
2 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 8:41PM |
0 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 8:39PM |
1 |
[LLVMdev] How to eliminate PHI nodes on pointer types? |
| 8:38PM |
0 |
[LLVMdev] program dependence graph (PDG) |
| 8:37PM |
0 |
[LLVMdev] unit tests |
| 8:32PM |
2 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 7:46PM |
0 |
[LLVMdev] How to eliminate PHI nodes on pointer types? |
| 7:39PM |
0 |
[LLVMdev] DominanceFrontier |
| 7:18PM |
2 |
[LLVMdev] unit tests |
| 7:10PM |
0 |
[LLVMdev] Greetings & Javascript -> LLVM... |
| 7:06PM |
0 |
[LLVMdev] Problem with "Does not dominate all uses" |
| 7:04PM |
0 |
[LLVMdev] How to uniquely remember a loop? |
| 6:50PM |
2 |
[LLVMdev] How to eliminate PHI nodes on pointer types? |
| 4:53PM |
0 |
[LLVMdev] How to Identify if an Argument is a pointer? |
| 4:39PM |
3 |
[LLVMdev] How to Identify if an Argument is a pointer? |
| 4:31PM |
0 |
[LLVMdev] Question on store instrumentation using llvm |
| 4:05PM |
0 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 2:33PM |
4 |
[LLVMdev] DominanceFrontier |
| 1:24PM |
3 |
[LLVMdev] Problem with "Does not dominate all uses" |
| 12:34PM |
1 |
[LLVMdev] PATCH: A new SROA implementation |
| 8:29AM |
6 |
[LLVMdev] Cambridge LLVM Social this week |
| 7:01AM |
2 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 4:33AM |
4 |
[LLVMdev] How to write a regression test case? |
| 3:17AM |
2 |
[LLVMdev] LLVM Developers' Meeting: Call for Talks, Posters, & BoFs |
| 1:26AM |
1 |
[LLVMdev] llmv3.0 CBackend convert IR to IR error |
| 12:32AM |
1 |
[LLVMdev] Optimal settings for parsing and reparsing the translation unit in libclang |
| 12:01AM |
0 |
[LLVMdev] Optimal settings for parsing and reparsing the translation unit in libclang |
| |
| Sunday August 19 2012 |
| Time | Replies | Subject |
|---|
| 11:11PM |
2 |
[LLVMdev] Optimal settings for parsing and reparsing the translation unit in libclang |
| 5:21PM |
0 |
[LLVMdev] Dynamic number of registers |
| 5:09PM |
2 |
[LLVMdev] Dynamic number of registers |
| 3:58PM |
0 |
[LLVMdev] Dynamic number of registers |
| 12:11PM |
1 |
[LLVMdev] MBlaze select_cc lowering question. |
| 11:55AM |
2 |
[LLVMdev] isSafeToSpeculativelyExecute() for CallInst |
| 10:57AM |
0 |
[LLVMdev] Greetings & Javascript -> LLVM... |
| 3:51AM |
2 |
[LLVMdev] Dynamic number of registers |
| 3:32AM |
0 |
[LLVMdev] Greetings & Javascript -> LLVM... |
| 3:22AM |
4 |
[LLVMdev] Greetings & Javascript -> LLVM... |
| 2:56AM |
0 |
[LLVMdev] Greetings & Javascript -> LLVM... |
| |
| Saturday August 18 2012 |
| Time | Replies | Subject |
|---|
| 10:59PM |
2 |
[LLVMdev] : trouble with compiling |
| 8:39PM |
4 |
[LLVMdev] Greetings & Javascript -> LLVM... |
| 2:30PM |
0 |
[LLVMdev] llmv3.0 CBackend convert IR to IR error |
| 8:47AM |
0 |
[LLVMdev] tablegen changes |
| 2:59AM |
2 |
[LLVMdev] llmv3.0 CBackend convert IR to IR error |
| 1:46AM |
1 |
[LLVMdev] GlobalVariable initializer using from beyond the grave |
| 12:24AM |
1 |
[LLVMdev] MIPS Register Pressure Limit. |
| |
| Friday August 17 2012 |
| Time | Replies | Subject |
|---|
| 11:01PM |
0 |
[LLVMdev] MIPS & GP register |
| 10:35PM |
2 |
[LLVMdev] RFC: Supporting different sized address space arithmetic |
| 10:16PM |
0 |
[LLVMdev] RFC: Supporting different sized address space arithmetic |
| 9:53PM |
2 |
[LLVMdev] RFC: Supporting different sized address space arithmetic |
| 9:36PM |
2 |
[LLVMdev] MIPS & GP register |
| 8:31PM |
0 |
[LLVMdev] Assert in LiveInterval update |
| 7:57PM |
1 |
[LLVMdev] Debug information causing assertion |
| 5:55PM |
0 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 5:45PM |
1 |
[LLVMdev] MSCV linker and OperandInfo constants |
| 5:29PM |
0 |
[LLVMdev] MSCV linker and OperandInfo constants |
| 5:03PM |
1 |
[LLVMdev] MIPS & GP register |
| 5:02PM |
2 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 4:27PM |
1 |
[LLVMdev] Generate data16 assembly instruction for TLS with PIC |
| 3:28PM |
2 |
[LLVMdev] MSCV linker and OperandInfo constants |
| 2:50PM |
3 |
[LLVMdev] RFC: MCJIT enhancements |
| 2:05PM |
1 |
[LLVMdev] Is instruction using array |
| 10:42AM |
0 |
[LLVMdev] Texas Instruments TMS320C6x Backend. |
| 10:32AM |
1 |
[LLVMdev] Portable OpenCL (pocl) v0.6 released |
| 9:50AM |
0 |
[LLVMdev] RFC: MCJIT enhancements |
| 8:36AM |
0 |
[LLVMdev] Problem of use CallGraph |
| 8:23AM |
3 |
[LLVMdev] Problem of use CallGraph |
| 7:49AM |
0 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 6:48AM |
2 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 2:16AM |
1 |
[LLVMdev] i need your help |
| 12:21AM |
0 |
[LLVMdev] TableGen related question for the Hexagon backend |
| |
| Thursday August 16 2012 |
| Time | Replies | Subject |
|---|
| 11:19PM |
1 |
[LLVMdev] AllocaInst issue |
| 10:16PM |
2 |
[LLVMdev] RFC: MCJIT enhancements |
| 10:02PM |
0 |
[LLVMdev] error: instruction requires: thumb2 |
| 9:36PM |
2 |
[LLVMdev] error: instruction requires: thumb2 |
| 8:54PM |
1 |
[LLVMdev] [llvm-commits] [llvm] r162034 - /llvm/trunk/include/llvm/Object/ELF.h |
| 8:39PM |
2 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 8:39PM |
1 |
[LLVMdev] DAGTypeLegalizer::RemapValue failure |
| 8:22PM |
0 |
[LLVMdev] libclang parsing bug |
| 8:09PM |
2 |
[LLVMdev] How to uniquely remember a loop? |
| 8:00PM |
0 |
[LLVMdev] error: instruction requires: thumb2 |
| 7:55PM |
3 |
[LLVMdev] error: instruction requires: thumb2 |
| 5:58PM |
0 |
[LLVMdev] MIPS & GP register |
| 5:42PM |
0 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 5:37PM |
3 |
[LLVMdev] MIPS & GP register |
| 5:28PM |
2 |
[LLVMdev] libclang parsing bug |
| 2:58PM |
0 |
[LLVMdev] More Back-End Porting Troubles |
| 2:18PM |
1 |
[LLVMdev] Custom backend |
| 2:02PM |
0 |
[LLVMdev] How to Get structured info without using Pass |
| 12:18PM |
2 |
[LLVMdev] Passing return values on the stack & storing arbitrary sized integers |
| 11:58AM |
2 |
[LLVMdev] More Back-End Porting Troubles |
| 11:03AM |
0 |
[LLVMdev] RFC: MCJIT enhancements |
| 10:44AM |
1 |
[LLVMdev] Question on C++ code completion - function parameter list |
| 6:56AM |
0 |
[LLVMdev] MIPS & GP register |
| 5:17AM |
2 |
[LLVMdev] MIPS & GP register |
| |
| Wednesday August 15 2012 |
| Time | Replies | Subject |
|---|
| 11:20PM |
0 |
[LLVMdev] clang promoting local to global |
| 11:10PM |
2 |
[LLVMdev] clang promoting local to global |
| 10:48PM |
0 |
[LLVMdev] Adobe LCVM Opportunity |
| 10:17PM |
0 |
[LLVMdev] clang promoting local to global |
| 9:57PM |
2 |
[LLVMdev] clang promoting local to global |
| 7:00PM |
0 |
[LLVMdev] clang promoting local to global |
| 6:40PM |
2 |
[LLVMdev] clang promoting local to global |
| 6:33PM |
0 |
[LLVMdev] clang promoting local to global |
| 6:26PM |
2 |
[LLVMdev] clang promoting local to global |
| 5:43PM |
0 |
[LLVMdev] JOB: CLANG-LLVM Experts needed in Silicon Valley |
| 5:35PM |
1 |
[LLVMdev] [Patch] Fix code-gen typo in VariadicFunction.h |
| 5:22PM |
0 |
[LLVMdev] More Back-End Porting Troubles |
| 5:17PM |
3 |
[LLVMdev] MI bundle liveness attributes |
| 5:05PM |
0 |
[LLVMdev] Questions on Memory Optimizations |
| 4:22PM |
0 |
[LLVMdev] More Back-End Porting Troubles |
| 4:15PM |
0 |
[LLVMdev] C++ demangling in LLVM |
| 4:11PM |
5 |
[LLVMdev] More Back-End Porting Troubles |
| 4:10PM |
2 |
[LLVMdev] C++ demangling in LLVM |
| 3:25PM |
0 |
[LLVMdev] C++ demangling in LLVM |
| 10:56AM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM |
| 10:04AM |
3 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM |
| 3:38AM |
2 |
[LLVMdev] C++ demangling in LLVM |
| 3:09AM |
1 |
[LLVMdev] LLVM Toronto social |
| 1:00AM |
0 |
[LLVMdev] AUTO: Dmitry Pidan is out of the office (returning 20/08/2012) |
| |
| Tuesday August 14 2012 |
| Time | Replies | Subject |
|---|
| 11:03PM |
0 |
[LLVMdev] Load serialisation during selection DAG building |
| 10:20PM |
0 |
[LLVMdev] Moving on from Hello World |
| 10:13PM |
1 |
[LLVMdev] Moving on from Hello World |
| 10:11PM |
0 |
[LLVMdev] C++ demangling in LLVM |
| 9:54PM |
0 |
[LLVMdev] [RFC] Hexagon insn table refactoring |
| 9:35PM |
1 |
[LLVMdev] LLVM CommandLine 2.0 Library Usage |
| 9:34PM |
0 |
[LLVMdev] x86 REP-prefixed instructions seem to be dropped by instruction decoder? |
| 9:22PM |
2 |
[LLVMdev] Load serialisation during selection DAG building |
| 9:05PM |
0 |
[LLVMdev] Load serialisation during selection DAG building |
| 8:58PM |
0 |
[LLVMdev] Modifying Named Structure Types |
| 8:23PM |
2 |
[LLVMdev] Modifying Named Structure Types |
| 7:27PM |
1 |
[LLVMdev] MCJIT vs JT |
| 7:09PM |
0 |
[LLVMdev] Support of register pair for 64-bit data? |
| 6:51PM |
0 |
[LLVMdev] Moving on from Hello World |
| 5:32PM |
1 |
[LLVMdev] [cfe-dev] global alignment |
| 5:19PM |
0 |
[LLVMdev] [cfe-dev] global alignment |
| 3:51PM |
4 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
| 3:43PM |
2 |
[LLVMdev] Load serialisation during selection DAG building |
| 2:31PM |
3 |
[LLVMdev] global alignment |
| 10:53AM |
2 |
[LLVMdev] Moving on from Hello World |
| 7:22AM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
| |
| Monday August 13 2012 |
| Time | Replies | Subject |
|---|
| 8:48PM |
0 |
[LLVMdev] Announcement: Fall 2012 Internship position with Sony PlayStation |
| 7:54PM |
2 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
| 7:09PM |
0 |
[LLVMdev] Load serialisation during selection DAG building |
| 5:05PM |
0 |
[LLVMdev] [cfe-dev] [RFC] Extending and improving Clang's undefined behavior checking |
| 5:05PM |
0 |
[LLVMdev] CLANG/LLVM Developer Job Openings |
| 4:02PM |
2 |
[LLVMdev] x86 REP-prefixed instructions seem to be dropped by instruction decoder? |
| 3:34PM |
0 |
[LLVMdev] MI bundle liveness attributes |
| 3:22PM |
0 |
[LLVMdev] VLIW code generation for LLVM backend |
| 3:22PM |
1 |
[LLVMdev] RFC: How can AddressSanitizer, ThreadSanitizer, and similar runtime libraries leverage shared library code? |
| 3:16PM |
0 |
[LLVMdev] [RFC] Bundling support in the PostRA Scheduler |
| 10:29AM |
3 |
[LLVMdev] Load serialisation during selection DAG building |
| 10:07AM |
1 |
[LLVMdev] [RFC] Bundling support in the PostRA Scheduler |
| 9:38AM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
| 8:10AM |
0 |
[LLVMdev] [RFC] New command line parsing/generating framework for clang and lld. |
| |
| Sunday August 12 2012 |
| Time | Replies | Subject |
|---|
| 1:27PM |
1 |
[LLVMdev] Load and store debug information |
| 5:33AM |
0 |
[LLVMdev] llvm microblaze port - severe data hazards |
| |
| Saturday August 11 2012 |
| Time | Replies | Subject |
|---|
| 11:35PM |
1 |
[LLVMdev] unique instruction ids |
| 11:26PM |
0 |
[LLVMdev] unique instruction ids |
| 11:05PM |
2 |
[LLVMdev] unique instruction ids |
| 4:37PM |
3 |
[LLVMdev] [RFC] New command line parsing/generating framework for clang and lld. |
| 2:06PM |
1 |
[LLVMdev] which LLVM transforms can optimize this code? |
| 12:21PM |
0 |
[LLVMdev] which LLVM transforms can optimize this code? |
| 11:42AM |
2 |
[LLVMdev] which LLVM transforms can optimize this code? |
| 7:03AM |
0 |
[LLVMdev] [RFC] New command line parsing/generating framework for clang and lld. |
| 1:28AM |
2 |
[LLVMdev] [RFC] New command line parsing/generating framework for clang and lld. |
| |
| Friday August 10 2012 |
| Time | Replies | Subject |
|---|
| 8:06PM |
2 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
| 7:29PM |
0 |
[LLVMdev] RFC: Adding pass in X86PassConfig::addPreEmitPass for LEA optimization on Atom |
| 6:34PM |
2 |
[LLVMdev] GVN miscompile debugging help |
| 6:26PM |
0 |
[LLVMdev] Potential Downtown for Maintenance This Weekend |
| 5:29PM |
2 |
[LLVMdev] VLIW code generation for LLVM backend |
| 5:06PM |
1 |
[LLVMdev] how to compile my LLVM project with CMake (on Windows)? |
| 9:17AM |
1 |
[LLVMdev] Pseudo instructions expansion |
| 7:28AM |
2 |
[LLVMdev] [RFC] Bundling support in the PostRA Scheduler |
| 6:10AM |
3 |
[LLVMdev] The use-define chain in LLVM |
| 1:23AM |
0 |
[LLVMdev] compiling a function multiple times |
| 12:08AM |
2 |
[LLVMdev] MI bundle liveness attributes |
| |
| Thursday August 9 2012 |
| Time | Replies | Subject |
|---|
| 9:44PM |
1 |
[LLVMdev] Compressing with llvm-ar |
| 8:26PM |
0 |
[LLVMdev] [RFC] New command line parsing/generating framework for clang and lld. |
| 8:16PM |
0 |
[LLVMdev] Compressing with llvm-ar |
| 8:15PM |
2 |
[LLVMdev] Compressing with llvm-ar |
| 8:12PM |
0 |
[LLVMdev] Generic question about llc asserts |
| 8:00PM |
2 |
[LLVMdev] Generic question about llc asserts |
| 7:49PM |
0 |
[LLVMdev] Compressing with llvm-ar |
| 7:28PM |
2 |
[LLVMdev] Compressing with llvm-ar |
| 7:25PM |
0 |
[LLVMdev] MI bundle liveness attributes |
| 7:03PM |
0 |
[LLVMdev] [RFC] Bundling support in the PostRA Scheduler |
| 6:53PM |
2 |
[LLVMdev] MI bundle liveness attributes |
| 6:12PM |
1 |
[LLVMdev] Type inconsistency in LLVM 3.1: CGDebugInfo.cpp |
| 5:54PM |
0 |
[LLVMdev] Type inconsistency in LLVM 3.1: CGDebugInfo.cpp |
| 5:53PM |
0 |
[LLVMdev] Profile Based Branch Weight Metadata |
| 5:43PM |
3 |
[LLVMdev] Type inconsistency in LLVM 3.1: CGDebugInfo.cpp |
| 5:09PM |
0 |
[LLVMdev] VLIW code generation for LLVM backend |
| 5:01PM |
0 |
[LLVMdev] Compressing with llvm-ar |
| 4:48PM |
0 |
[LLVMdev] MI bundle liveness attributes |
| 4:18PM |
0 |
[LLVMdev] Pseudo instructions expansion |
| 2:46PM |
0 |
[LLVMdev] The use-define chain in LLVM |
| 2:44PM |
2 |
[LLVMdev] Compiling std::string with clang |
| 2:37PM |
0 |
[LLVMdev] RFC: MCJIT enhancements - JIT overview |
| 2:04PM |
1 |
[LLVMdev] question about ExectuionEngine::Create |
| 1:04PM |
0 |
[LLVMdev] [llvm-commits] PROPOSAL: LLVM_FALLTHROUGH macro for intended fall-throughs between switch cases |
| 10:26AM |
2 |
[LLVMdev] Pseudo instructions expansion |
| 5:40AM |
2 |
[LLVMdev] The use-define chain in LLVM |
| 5:11AM |
0 |
[LLVMdev] The use-define chain in LLVM |
| 4:57AM |
2 |
[LLVMdev] The use-define chain in LLVM |
| 3:23AM |
0 |
[LLVMdev] The use-define chain in LLVM |
| 3:16AM |
2 |
[LLVMdev] The use-define chain in LLVM |
| 12:06AM |
1 |
[LLVMdev] ARM eabi calling convention |
| |
| Wednesday August 8 2012 |
| Time | Replies | Subject |
|---|
| 8:29PM |
0 |
[LLVMdev] ARM eabi calling convention |
| 7:04PM |
1 |
[LLVMdev] clang thread-local compilation error on windows |
| 5:24PM |
1 |
[LLVMdev] Creating DAGs |
| 2:50PM |
0 |
[LLVMdev] PgmDependenceGraph |
| 11:43AM |
1 |
[LLVMdev] Block profiling in LLVM |
| 10:42AM |
0 |
[LLVMdev] Pass llvm options to DragonEgg |
| 10:37AM |
2 |
[LLVMdev] Pass llvm options to DragonEgg |
| 7:40AM |
2 |
[LLVMdev] PgmDependenceGraph |
| 4:06AM |
2 |
[LLVMdev] VLIW code generation for LLVM backend |
| 2:08AM |
0 |
[LLVMdev] another mips16 puzzle |
| |
| Tuesday August 7 2012 |
| Time | Replies | Subject |
|---|
| 10:42PM |
1 |
[LLVMdev] Bay Area LLVM Social - August |
| 10:14PM |
1 |
[LLVMdev] [RFC] unused argument warning |
| 10:08PM |
0 |
[LLVMdev] [RFC] unused argument warning |
| 9:59PM |
2 |
[LLVMdev] [RFC] unused argument warning |
| 9:59PM |
0 |
[LLVMdev] [RFC] Hexagon insn table refactoring |
| 9:11PM |
0 |
[LLVMdev] Fall 2012: coop position in AMD Research |
| 8:25PM |
0 |
[LLVMdev] VLIW code generation for LLVM backend |
| 7:37PM |
1 |
[LLVMdev] Target does not support MC emission |
| 6:15PM |
0 |
[LLVMdev] LLVM support for ia64 speculative Instructions |
| 5:34PM |
2 |
[LLVMdev] ARM eabi calling convention |
| 4:24PM |
0 |
[LLVMdev] 64 bit special purpose registers |
| 10:59AM |
0 |
[LLVMdev] ARM eabi calling convention |
| 4:57AM |
2 |
[LLVMdev] ARM eabi calling convention |
| 2:55AM |
1 |
[LLVMdev] YASM and LLVM |
| 1:58AM |
0 |
[LLVMdev] ARM eabi calling convention |
| 1:20AM |
2 |
[LLVMdev] ARM eabi calling convention |
| 12:52AM |
0 |
[LLVMdev] ARM eabi calling convention |
| |
| Monday August 6 2012 |
| Time | Replies | Subject |
|---|
| 11:52PM |
2 |
[LLVMdev] 64 bit special purpose registers |
| 10:21PM |
2 |
[LLVMdev] ARM eabi calling convention |
| 10:13PM |
0 |
[LLVMdev] Tablegen foreach |
| 9:46PM |
2 |
[LLVMdev] Tablegen foreach |
| 9:37PM |
0 |
[LLVMdev] Tablegen foreach |
| 9:04PM |
0 |
[LLVMdev] [cfe-dev] [RFC] MS-style inline assembly |
| 8:55PM |
2 |
[LLVMdev] Tablegen foreach |
| 8:42PM |
2 |
[LLVMdev] [cfe-dev] [RFC] MS-style inline assembly |
| 8:28PM |
0 |
[LLVMdev] Casting from float to unsigned char - incorrect output? |
| 8:03PM |
0 |
[LLVMdev] [cfe-dev] [RFC] MS-style inline assembly |
| 7:43PM |
4 |
[LLVMdev] Casting from float to unsigned char - incorrect output? |
| 6:27PM |
0 |
[LLVMdev] Question about llvm JIT |
| 6:26PM |
1 |
[LLVMdev] processFunctionBeforeFrameFinalized setting object offset without effect, stack frame layout wrong |
| 6:18PM |
2 |
[LLVMdev] Register Coalescer does not preserve TargetFlag |
| 6:16PM |
0 |
[LLVMdev] Register Coalescer does not preserve TargetFlag |
| 6:14PM |
3 |
[LLVMdev] [RFC] MS-style inline assembly |
| 6:12PM |
3 |
[LLVMdev] Register Coalescer does not preserve TargetFlag |
| 6:06PM |
0 |
[LLVMdev] Register Coalescer does not preserve TargetFlag |
| 5:51PM |
0 |
[LLVMdev] Register Coalescer does not preserve TargetFlag |
| 5:29PM |
4 |
[LLVMdev] Register Coalescer does not preserve TargetFlag |
| 5:25PM |
0 |
[LLVMdev] How to call some transformation passes (LoopRotate and LoopUnroll) from my own pass |
| 5:12PM |
0 |
[LLVMdev] [RFC] Bundling support in the PostRA Scheduler |
| 4:35PM |
2 |
[LLVMdev] Question about llvm JIT |
| 1:12PM |
0 |
[LLVMdev] Partial Redundancy Elimination |
| 1:04PM |
3 |
[LLVMdev] How to call some transformation passes (LoopRotate and LoopUnroll) from my own pass |
| 11:40AM |
2 |
[LLVMdev] Code-emission problem |
| |
| Saturday August 4 2012 |
| Time | Replies | Subject |
|---|
| 9:15PM |
1 |
[LLVMdev] [cfe-dev] GCC 4.7.2 will have Win64 SEH (by default) |
| |
| Friday August 3 2012 |
| Time | Replies | Subject |
|---|
| 11:24PM |
0 |
[LLVMdev] Is it correct to access non-atomic variables using atomic operations? |
| 10:11PM |
3 |
[LLVMdev] Is it correct to access non-atomic variables using atomic operations? |
| 8:37PM |
1 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 8:15PM |
0 |
[LLVMdev] Proposal to merge SimplifyLibCalls into InstCombiner |
| 7:56PM |
2 |
[LLVMdev] Proposal to merge SimplifyLibCalls into InstCombiner |
| 7:28PM |
2 |
[LLVMdev] Profile Based Branch Weight Metadata |
| 6:30PM |
0 |
[LLVMdev] Formats supported by llvm/Object/Archive.h |
| 6:10PM |
0 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 5:20PM |
1 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 5:11PM |
2 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 5:02PM |
0 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 4:01PM |
1 |
[LLVMdev] [NVPTX] Strange assertion around BlockToChain.clear(); in Release+Asserts build |
| 2:36PM |
1 |
[LLVMdev] Problem in LLVM CMake modules |
| 2:13PM |
1 |
[LLVMdev] Unable to build compiler-rt (Windows) |
| 2:08PM |
0 |
[LLVMdev] Unable to build compiler-rt (Windows) |
| 1:45PM |
2 |
[LLVMdev] Formats supported by llvm/Object/Archive.h |
| 10:10AM |
1 |
[LLVMdev] llvm-objdump does not give information about all relocations |
| 9:44AM |
2 |
[LLVMdev] Unable to build compiler-rt (Windows) |
| 6:24AM |
3 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 4:24AM |
0 |
[LLVMdev] [NVPTX] Strange assertion around BlockToChain.clear(); in Release+Asserts build |
| 3:19AM |
1 |
[LLVMdev] Problem in LLVM CMake modules |
| |
| Thursday August 2 2012 |
| Time | Replies | Subject |
|---|
| 11:32PM |
2 |
[LLVMdev] [NVPTX] Strange assertion around BlockToChain.clear(); in Release+Asserts build |
| 10:23PM |
0 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 9:56PM |
1 |
[LLVMdev] Adding Value to use_list of instruction |
| 9:55PM |
0 |
[LLVMdev] Adding Value to use_list of instruction |
| 9:52PM |
2 |
[LLVMdev] Adding Value to use_list of instruction |
| 9:45PM |
1 |
[LLVMdev] pods |
| 9:12PM |
0 |
[LLVMdev] LLVM LTO |
| 7:54PM |
1 |
[LLVMdev] Questions about clang options |
| 7:36PM |
0 |
[LLVMdev] Questions about clang options |
| 6:42PM |
0 |
[LLVMdev] pods |
| 4:53PM |
0 |
[LLVMdev] Unhandled instruction encoding format! |
| 4:11PM |
0 |
[LLVMdev] Proposal to merge SimplifyLibCalls into InstCombiner |
| 3:56PM |
2 |
[LLVMdev] Questions about clang options |
| 10:41AM |
0 |
[LLVMdev] Unhandled instruction encoding format! |
| 10:38AM |
2 |
[LLVMdev] Unhandled instruction encoding format! |
| 8:44AM |
1 |
[LLVMdev] Question about arm thumb2 code generation |
| 7:41AM |
0 |
[LLVMdev] Reading the output of clang |
| 4:49AM |
2 |
[LLVMdev] Proposal to merge SimplifyLibCalls into InstCombiner |
| 3:15AM |
2 |
[LLVMdev] pods |
| 3:00AM |
3 |
[LLVMdev] LLVM LTO |
| 12:45AM |
0 |
[LLVMdev] Problem to generate an executable file of 403.gcc (SPEC2006) |
| |
| Wednesday August 1 2012 |
| Time | Replies | Subject |
|---|
| 9:23PM |
2 |
[LLVMdev] [RFC] New command line parsing/generating framework for clang and lld. |
| 8:53PM |
3 |
[LLVMdev] TableGen related question for the Hexagon backend |
| 8:36PM |
0 |
[LLVMdev] Bay Area LLVM Social - August |
| 7:34PM |
0 |
[LLVMdev] Idempotent Code Generation in LLVM |
| 5:06PM |
1 |
[LLVMdev] lld MachO addEntryPointLoadCommand |
| 4:54PM |
0 |
[LLVMdev] X86 isTargetShuffle Question |
| 11:49AM |
1 |
[LLVMdev] How to insert metadata in llvm IR? |
| 10:21AM |
3 |
[LLVMdev] Reading the AST from the bitcode generated by clang |
| 9:31AM |
0 |
[LLVMdev] Reading the AST from the bitcode generated by clang |
| 9:02AM |
0 |
[LLVMdev] Request for merge: GHC/ARM calling convention. |
| 8:17AM |
2 |
[LLVMdev] Request for merge: GHC/ARM calling convention. |
| 7:51AM |
0 |
[LLVMdev] Broken tests following r160899 |
| 4:40AM |
0 |
[LLVMdev] Vector promotion broken for <2 x [i8|i16]> |
| 3:14AM |
0 |
[LLVMdev] Request for merge: GHC/ARM calling convention. |
| 12:40AM |
1 |
[LLVMdev] 24/7 support for the LLVM Lab |