search for: mctargetdesc

...bling debug output on the MSP430 backend so that I can illustrate a few issues to Adrian and you on the variable pieces side. (there doesn't appear to be any specific person claiming the msp430 code right now). I have a question tho. the following patch : diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp index df1aa1a..844db93 100644 --- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp +++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp @@ -24,4 +24,6 @@ MSP430MCAsmInfo::MSP430MCAsmInfo(StringRef TT) {...

...tatic Analyzer checker alpha.cplusplus.NewDeleteLeaks over LLVM codebase to detect false-positives and at the same time eliminate memory leaks. The majority of leaks were detected in lib/Target/* and lib/MC/*. In all cases the similar trick was detected as a leak (example from lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp) : static MCStreamer *createMCStreamer(const Target &T, StringRef TT, MCContext &Context, MCAsmBackend &MAB, raw_ostream &OS, MCCodeEmitter *Emitter,...

...th this part, and it even solves most of the hard part of feature request for .code16 in bug 8684 — which was actually why I started prodding at this. But I could do with some help with the 16-bit signed relocation handling, which I've split into a subsequent patch. diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 7952607..12a30cf 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -402,6 +402,56 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsi...

...CommonTableGen) add_llvm_target(HexagonCodeGen HexagonAsmPrinter.cpp HexagonCallingConvLower.cpp HexagonCFGOptimizer.cpp HexagonExpandPredSpillCode.cpp HexagonFrameLowering.cpp HexagonHardwareLoops.cpp HexagonInstrInfo.cpp HexagonISelDAGToDAG.cpp HexagonISelLowering.cpp *MCTargetDesc/*HexagonMCAsmInfo.cpp HexagonOptimizeSZExtends.cpp HexagonRegisterInfo.cpp HexagonRemoveSZExtArgs.cpp HexagonSelectionDAGInfo.cpp HexagonSplitTFRCondSets.cpp HexagonSubtarget.cpp HexagonTargetMachine.cpp HexagonTargetObjectFile.cpp ) add_subdirectory(TargetInfo) add_subd...

...odeGen > HexagonAsmPrinter.cpp > HexagonCallingConvLower.cpp > HexagonCFGOptimizer.cpp > HexagonExpandPredSpillCode.cpp > HexagonFrameLowering.cpp > HexagonHardwareLoops.cpp > HexagonInstrInfo.cpp > HexagonISelDAGToDAG.cpp > HexagonISelLowering.cpp > *MCTargetDesc/*HexagonMCAsmInfo.cpp > HexagonOptimizeSZExtends.cpp > HexagonRegisterInfo.cpp > HexagonRemoveSZExtArgs.cpp > HexagonSelectionDAGInfo.cpp > HexagonSplitTFRCondSets.cpp > HexagonSubtarget.cpp > HexagonTargetMachine.cpp > HexagonTargetObjectFile.cpp > ) &g...

...cpp @@ -13,6 +13,14 @@ #include "AArch64TargetObjectFile.h" +#include "llvm/Target/Mangler.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCExpr.h" +#include "MCTargetDesc/AArch64MCExpr.h" +#include "llvm/CodeGen/MachineModuleInfoImpls.h" + using namespace llvm; @@ -22,3 +30,24 @@ AArch64LinuxTargetObjectFile::Initialize(MCContext &Ctx, TargetLoweringObjectFileELF::Initialize(Ctx, TM); InitializeELF(TM.Options.UseInitArray); } + +MCSymb...

...-ellcc-linux -emit-obj -disable-free -main-file-name ARMAsmBackend.cpp -mrelocation-model static -fmath-errno -masm-verbose -mconstructor-aliases -target-cpu pentium4 -target-linker-version 2.22.52.0.1 -momit-leaf-frame-pointer -coverage-file /home/rich/test/llvm-build-i386-linux/lib/Target/ARM/MCTargetDesc/Release+Asserts/ARMAsmBackend.o -resource-dir /home/rich/test/bin/../libecc -dependency-file /home/rich/test/llvm-build-i386-linux/lib/Target/ARM/MCTargetDesc/Release+Asserts/ARMAsmBackend.d.tmp -MP -MT /home/rich/test/llvm-build-i386-linux/lib/Target/ARM/MCTargetDesc/Release+Asserts/ARMAsmBack...

Hello, I run into a problem that llvm can't write the correct ELFHeaderEFlags for hexagonv4. The following patch can fix it. Index: lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp =================================================================== --- lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp (revision 265917) +++ lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp (working copy) @@ -122,7 +122,7 @@ : HexagonTargetStream...

...a Crusoe, Microsoft VirtualBox - see https://bbs.archlinux.org/viewtopic.php?pid=775414 k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that Via c3 and c3-Nehemiah don't have nopl Mikulas --- lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) Index: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp =================================================================== --- llvm.orig/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 2013-11-03 00:24:20.000000000 +01...

...ot;Nios2AsmPrinter". Plan for initial implementation corresponding to patches (obviously the plan can be changed after comments) - Target registration a)  Nios2.td, Nios2.h, Nios2TargetMachine.h, Nios2TargetMachine.cpp, Nios2Subtarget.h, Nios2Subtarget.cpp, TargetInfo/Nios2TargetInfo.cpp b) MCTargetDesc/Nios2MCTargetDesc.h, MCTargetDesc/Nios2MCTargetDesc.cpp... - Register information (Nios2RegisterInfo.cpp, Nios2RegisterInfo.h, Nios2RegisterInfo.td) - ISA specification (Nios2InstrFormats.td, Nios2InstrInfo.cpp, Nios2InstrInfo.h, Nios2InstrInfo.td) - GlobalISel (At the moment I use DAG selector, bu...

hi, i just try to build llvm-3.0 (stable) on linux ppc32 (CRUX PPC 2.7) with gcc-4.5.3, binutils-2.21.1, glibc-2.12.2 . As this suggestion: http://llvm.org/bugs/show_bug.cgi?id=10969 I applied a patch like this one: --- llvm-3.0.src/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h 2011-07-26 01:24:55.000000000 +0200 +++ llvm-3.0.src/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h 2011-12-02 02:04:06.000000000 +0100 @@ -34,6 +34,10 @@ } // End llvm namespace +// Generated files will use "namespace PPC". To avoid symbol clash, +// und...

...in operator AsmWriterFlavorTy /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/include/llvm/Support/CommandLine.h:1233 #2 0x9d1aa4 in llvm::X86ELFMCAsmInfo::X86ELFMCAsmInfo(llvm::Triple const&) /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp:100 #3 0x9cf3e1 in createX86MCAsmInfo(llvm::MCRegisterInfo const&, llvm::Triple const&) /mnt/b/sanitizer-buildbot3/sanitizer-x86_64-linux-fast/build/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp:179:15 #4 0x421020 in createMCAsmInfo /mnt/b/sanitizer-buildbot3...

...rote: > hi, i just try to build llvm-3.0 (stable) on linux ppc32 (CRUX PPC 2.7) with > gcc-4.5.3, binutils-2.21.1, glibc-2.12.2 . > > As this suggestion: > http://llvm.org/bugs/show_bug.cgi?id=10969 > I applied a patch like this one: > > --- llvm-3.0.src/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h > 2011-07-26 01:24:55.000000000 +0200 > +++ llvm-3.0.src/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h > 2011-12-02 02:04:06.000000000 +0100 > @@ -34,6 +34,10 @@ > > } // End llvm namespace > > +// Generated files will use "namespace P...

...llvm-3.0 (stable) on linux ppc32 (CRUX PPC 2.7) with > > gcc-4.5.3, binutils-2.21.1, glibc-2.12.2 . > > > > As this suggestion: > > http://llvm.org/bugs/show_bug.cgi?id=10969 > > I applied a patch like this one: > > > > --- llvm-3.0.src/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h > > 2011-07-26 01:24:55.000000000 +0200 > > +++ llvm-3.0.src/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h > > 2011-12-02 02:04:06.000000000 +0100 > > @@ -34,6 +34,10 @@ > > > > } // End llvm namespace > > > > +// Ge...

...//bbs.archlinux.org/viewtopic.php?pid=775414 > k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs > via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that > Via c3 and c3-Nehemiah don't have nopl > > Mikulas > > --- > lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > Index: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp > =================================================================== > --- llvm.orig/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 2013-...

...nybody see any other good solutions? >> >> > Develop an interface that works and have lldb use that? Might need to > change things to have certain bits be made public if necessary, but I'd > want more details there. > Would you have any objections to making lib/Target/*/MCTargetDesc/*MCTargetDesc.h public? It seems pretty useless to expose a disassembly interface that can't tell you anything interesting about the instruction. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150224/f2...

I am having an issue with MCJIT on the ppc64 machine architecture. The symptom is that for a particular IR function the target machine won't emit neither an object nor an assembly file and subsequent calling the pointer to function results in a segfault. My application generates on the fly several functions with the builder and executes them with the MCJIT engine. I came across this

...e(NewOpc); break; when i used the command: llc -x86-asm-syntax=intel -debug -p-enabled=true -filetype=obj sum-vec03.ll>objpon 2>&1 i am getting the following error: ********** COMPUTING STACKMAP LIVENESS: foo ********** Unknown immediate size UNREACHABLE executed at lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574! #0 0x00000000019d9fec llvm::sys::PrintStackTrace(llvm::raw_ostream&) lib/Support/Unix/Signals.inc:402:11 #1 0x00000000019da4d9 PrintStackTraceSignalHandler(void*) lib/Support/Unix/Signals.inc:466:1 #2 0x00000000019d8853 llvm::sys::RunSignalHandlers() lib/Support/Signals.cpp:0...

On 26 Feb 2015, at 17:20, Daniel Sanders <Daniel.Sanders at imgtec.com> wrote: > > > Would you have any objections to making lib/Target/*/MCTargetDesc/*MCTargetDesc.h public? > > One worry that springs to mind is how easy it is to renumber the enum values used by the opcodes. If these numbers are public it will be hard to have stable releases that add new instructions. I don't believe that there's an expectation of ABI stability...

...ertions \ --with-cxx-include-root=/usr/include/c++/$(gcc --version | grep gcc | cut -f4 -d " ") \ --with-cxx-include-arch=$HOSTTYPE-unknown-linux-gnu my errror: [...] make[4]: Entering directory `/mnt/EXT/00/llvm/work/src/llvm-3.0rc2.src/lib/Target/Sparc/MCTargetDesc' llvm[4]: Compiling SparcMCAsmInfo.cpp for Release build llvm[4]: Compiling SparcMCTargetDesc.cpp for Release build llvm[4]: Building Release Archive Library libLLVMSparcDesc.a make[4]: Leaving directory `/mnt/EXT/00/llvm/work/src/llvm-3.0rc2.src/lib/Target/Sparc/MCTargetDesc' make[3]: Leav...