Wednesday October 31 2012 |
Time | Replies | Subject |
11:43PM |
0 |
[LLVMdev] piping into lli broken on darwin |
11:33PM |
2 |
[LLVMdev] piping into lli broken on darwin |
10:54PM |
3 |
[LLVMdev] problem trying to write an LLVM register-allocation pass |
10:53PM |
0 |
[LLVMdev] piping into lli broken on darwin |
10:44PM |
2 |
[LLVMdev] Status of YAML IO? |
9:55PM |
0 |
[LLVMdev] problem trying to write an LLVM register-allocation pass |
8:46PM |
2 |
[LLVMdev] problem trying to write an LLVM register-allocation pass |
8:41PM |
0 |
[LLVMdev] Interprocedural Register Allocation |
8:13PM |
3 |
[LLVMdev] : Predication on SIMD architectures and LLVM |
7:07PM |
0 |
[LLVMdev] Tail Duplication Questions |
6:19PM |
2 |
[LLVMdev] Tail Duplication Questions |
4:41PM |
0 |
[LLVMdev] Section specialization & COFF. |
4:11PM |
0 |
[LLVMdev] Tail Duplication Questions |
3:49PM |
1 |
[LLVMdev] Lifetime analysis of variables within a module |
3:43PM |
3 |
[LLVMdev] piping into lli broken on darwin |
3:17PM |
3 |
[LLVMdev] Tail Duplication Questions |
2:44PM |
0 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
6:01AM |
0 |
[LLVMdev] Visual Studio 2012 cl.exe ICE while building LLVM for x64 (in TableGen) at -O2 |
5:50AM |
0 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
3:28AM |
0 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
2:53AM |
0 |
[LLVMdev] Status of YAML IO? |
2:23AM |
2 |
[LLVMdev] Status of YAML IO? |
1:18AM |
1 |
[LLVMdev] Reduced physical register limit in 3.1+? |
|
Tuesday October 30 2012 |
Time | Replies | Subject |
11:32PM |
1 |
[LLVMdev] help writing an IR targeting backend |
11:19PM |
3 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
10:48PM |
0 |
[LLVMdev] Status of YAML IO? |
10:35PM |
1 |
[LLVMdev] Error when trying to chain two llvm transform passes |
10:34PM |
2 |
[LLVMdev] Status of YAML IO? |
10:11PM |
2 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
9:25PM |
0 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
9:15PM |
0 |
[LLVMdev] Error when trying to chain two llvm transform passes |
9:10PM |
2 |
[LLVMdev] Error when trying to chain two llvm transform passes |
8:39PM |
1 |
[LLVMdev] Any plan to add MIN/MAX isd node? |
8:02PM |
0 |
[LLVMdev] [PATCH][Review request] MachineBasicBlock::iterator bug fix |
7:10PM |
0 |
[LLVMdev] Any plan to add MIN/MAX isd node? |
6:57PM |
2 |
[LLVMdev] [PATCH][Review request] MachineBasicBlock::iterator bug fix |
6:53PM |
2 |
[LLVMdev] Any plan to add MIN/MAX isd node? |
6:10PM |
0 |
[LLVMdev] Status of YAML IO? |
5:38PM |
2 |
[LLVMdev] Status of YAML IO? |
4:36PM |
2 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
3:38PM |
1 |
[LLVMdev] how to define extending vector load patterns? |
3:23PM |
0 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
2:52PM |
0 |
[LLVMdev] how to define extending vector load patterns? |
2:12PM |
0 |
[LLVMdev] Status of YAML IO? |
2:10PM |
2 |
[LLVMdev] how to define extending vector load patterns? |
2:02PM |
2 |
[LLVMdev] Duplicating routine/class name in documentation comment. |
10:55AM |
0 |
[LLVMdev] New Attribute from clang to llvm |
8:47AM |
1 |
[LLVMdev] Program Dependence Graph (PDG) in LLVM |
8:46AM |
0 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
8:33AM |
0 |
[LLVMdev] Proposed SelectionDAGBuilder patch - load serialisation |
7:37AM |
0 |
[LLVMdev] Any plan to add MIN/MAX isd node? |
7:37AM |
0 |
[LLVMdev] TargetELFWriterInfo used for anything? |
6:36AM |
3 |
[LLVMdev] TargetELFWriterInfo used for anything? |
3:22AM |
1 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
2:26AM |
2 |
[LLVMdev] Status of YAML IO? |
12:30AM |
1 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
12:18AM |
0 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
|
Monday October 29 2012 |
Time | Replies | Subject |
11:40PM |
2 |
[LLVMdev] Any plan to add MIN/MAX isd node? |
11:34PM |
11 |
[LLVMdev] [RFC] Extend LLVM IR to express "fast-math" at a per-instruction level |
10:33PM |
0 |
[LLVMdev] [llvm-commits] [llvm] r162770 - in /llvm/trunk: include/llvm/CodeGen/MachineOperand.h lib/CodeGen/MachineInstr.cpp |
10:32PM |
1 |
[LLVMdev] Data flow/liveness in register pairs |
10:28PM |
2 |
[LLVMdev] [llvm-commits] [llvm] r162770 - in /llvm/trunk: include/llvm/CodeGen/MachineOperand.h lib/CodeGen/MachineInstr.cpp |
10:21PM |
1 |
[LLVMdev] changes to raw_fd_ostream |
9:26PM |
0 |
[LLVMdev] LLVM Dev Meeting: Opening registration for a few more! |
6:43PM |
0 |
[LLVMdev] hello pass is not available |
6:02PM |
0 |
[LLVMdev] [llvm-commits] [llvm] r162770 - in /llvm/trunk: include/llvm/CodeGen/MachineOperand.h lib/CodeGen/MachineInstr.cpp |
5:17PM |
3 |
[LLVMdev] [llvm-commits] [llvm] r162770 - in /llvm/trunk: include/llvm/CodeGen/MachineOperand.h lib/CodeGen/MachineInstr.cpp |
4:44PM |
1 |
[LLVMdev] Blocos Label-br |
2:53PM |
0 |
[LLVMdev] Undefined symbol when calling recalculate method on DominatorTreeBase |
11:05AM |
1 |
[LLVMdev] Annotating known pointer alignment |
11:00AM |
3 |
[LLVMdev] hello pass is not available |
9:07AM |
0 |
[LLVMdev] Annotating known pointer alignment |
8:34AM |
0 |
[LLVMdev] Debug information under windows |
12:35AM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
|
Sunday October 28 2012 |
Time | Replies | Subject |
9:55PM |
2 |
[LLVMdev] Annotating known pointer alignment |
7:21PM |
1 |
[LLVMdev] Configuring test-suite |
7:10PM |
0 |
[LLVMdev] Configuring test-suite |
6:27PM |
2 |
[LLVMdev] Configuring test-suite |
6:19PM |
0 |
[LLVMdev] Configuring test-suite |
5:32PM |
2 |
[LLVMdev] Configuring test-suite |
5:30PM |
0 |
[LLVMdev] Annotating known pointer alignment |
4:57PM |
0 |
[LLVMdev] Configuring test-suite |
12:52PM |
2 |
[LLVMdev] Annotating known pointer alignment |
12:03PM |
1 |
[LLVMdev] understanding of getelementptr with a const string |
10:27AM |
3 |
[LLVMdev] Configuring test-suite |
2:13AM |
4 |
[LLVMdev] How to disable or override libgcc when linking? |
|
Saturday October 27 2012 |
Time | Replies | Subject |
8:32PM |
2 |
[LLVMdev] [llvm-commits] [llvm] r166875 - in /llvm/trunk: lib/Transforms/Scalar/LoopIdiomRecognize.cpp test/Transforms/LoopIdiom/basic.ll |
8:02AM |
0 |
[LLVMdev] TargetELFWriterInfo used for anything? |
1:18AM |
2 |
[LLVMdev] TargetELFWriterInfo used for anything? |
1:01AM |
0 |
[LLVMdev] TargetELFWriterInfo used for anything? |
12:32AM |
0 |
[LLVMdev] Using LLVM to serialize object state -- and performance |
12:17AM |
0 |
[LLVMdev] Configuring test-suite |
12:11AM |
1 |
[LLVMdev] TargetDescription string |
12:09AM |
2 |
[LLVMdev] TargetELFWriterInfo used for anything? |
|
Friday October 26 2012 |
Time | Replies | Subject |
11:56PM |
1 |
[LLVMdev] Lifetime of ExecutionEngine? |
11:41PM |
0 |
[LLVMdev] TargetELFWriterInfo used for anything? |
11:37PM |
3 |
[LLVMdev] TargetELFWriterInfo used for anything? |
11:16PM |
3 |
[LLVMdev] Using LLVM to serialize object state -- and performance |
10:56PM |
0 |
[LLVMdev] Configuring test-suite |
10:27PM |
0 |
[LLVMdev] changes to raw_fd_ostream |
10:17PM |
2 |
[LLVMdev] changes to raw_fd_ostream |
9:53PM |
4 |
[LLVMdev] Configuring test-suite |
8:46PM |
0 |
[LLVMdev] Debug information under windows |
8:45PM |
0 |
[LLVMdev] Data sharing between two ALUs and avoiding illegal copies |
7:59PM |
0 |
[LLVMdev] Lifetime of ExecutionEngine? |
3:35PM |
0 |
[LLVMdev] A question about pointer aliasing rules in LLVM |
2:55PM |
5 |
[LLVMdev] Debug information under windows |
12:11PM |
1 |
[LLVMdev] VMKit compilation error |
10:54AM |
1 |
[LLVMdev] Properly handling mem-loc arguments when prologue adjusts FP. |
10:52AM |
1 |
[LLVMdev] Passing an option to opt through clang/dragonegg |
8:24AM |
1 |
[LLVMdev] llvm-config is broken ? |
3:53AM |
1 |
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG. |
2:28AM |
1 |
[LLVMdev] instr_iterator |
2:08AM |
0 |
[LLVMdev] instr_iterator |
2:01AM |
2 |
[LLVMdev] instr_iterator |
12:32AM |
2 |
[LLVMdev] A question about pointer aliasing rules in LLVM |
|
Thursday October 25 2012 |
Time | Replies | Subject |
11:33PM |
0 |
[LLVMdev] llvm-config is broken ? |
11:04PM |
6 |
[LLVMdev] Poll: LLVM test-suite project usage |
10:36PM |
0 |
[LLVMdev] A question about pointer aliasing rules in LLVM |
10:15PM |
2 |
[LLVMdev] A question about pointer aliasing rules in LLVM |
9:01PM |
0 |
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG. |
8:25PM |
0 |
[LLVMdev] How to use TargetLowering::addRegisterClass() for multiple register classes |
8:24PM |
3 |
[LLVMdev] llvm-config is broken ? |
7:58PM |
0 |
[LLVMdev] Error building llvm on AIX 7.1 |
7:54PM |
3 |
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG. |
7:07PM |
1 |
[LLVMdev] How to include IR parser and optimization passes in my project |
4:59PM |
0 |
[LLVMdev] Status of YAML IO? |
4:51PM |
1 |
[LLVMdev] TargetData class? |
4:14PM |
0 |
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG. |
3:54PM |
2 |
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG. |
3:03PM |
0 |
[LLVMdev] [klee-dev] Linearizability |
2:52PM |
0 |
[LLVMdev] TargetData class? |
2:52PM |
2 |
[LLVMdev] Error building llvm on AIX 7.1 |
1:49PM |
0 |
[LLVMdev] Linearizability |
1:44PM |
2 |
[LLVMdev] calling external libraries in llvm project |
9:51AM |
1 |
[LLVMdev] How to get Function object in LLVM Pass |
9:40AM |
0 |
[LLVMdev] Error building llvm on AIX 7.1 |
6:08AM |
0 |
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG. |
2:58AM |
1 |
[LLVMdev] Potential Outage Tonight |
1:34AM |
3 |
[LLVMdev] Status of YAML IO? |
|
Wednesday October 24 2012 |
Time | Replies | Subject |
11:39PM |
3 |
[LLVMdev] TargetData class? |
11:34PM |
0 |
[LLVMdev] TargetData class? |
11:11PM |
3 |
[LLVMdev] TargetData class? |
9:26PM |
3 |
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG. |
8:04PM |
2 |
[LLVMdev] [LLDB] build over linux |
8:03PM |
1 |
[LLVMdev] [llvm-commits] ABI: how to let the backend know that an aggregate should be allocated on stack |
8:02PM |
0 |
[LLVMdev] Atomic ops cannot be built from C/OCaml bindings |
7:40PM |
0 |
[LLVMdev] [llvm-commits] ABI: how to let the backend know that an aggregate should be allocated on stack |
7:03PM |
0 |
[LLVMdev] [llvm-commits] ABI: how to let the backend know that an aggregate should be allocated on stack |
6:52PM |
1 |
[LLVMdev] How to Find Instruction Encoding for a MachineInstr |
5:24PM |
1 |
[LLVMdev] Predication on SIMD architectures and LLVM |
1:03PM |
2 |
[LLVMdev] Section specialization & COFF. |
12:44PM |
0 |
[LLVMdev] Fwd: Debugging/Fixing 'Interval not live at use' errors |
9:05AM |
0 |
[LLVMdev] Clang fails to compile template with dependendent Non type template parameter. |
8:11AM |
2 |
[LLVMdev] Error building llvm on AIX 7.1 |
6:26AM |
0 |
[LLVMdev] Error building llvm on AIX 7.1 |
6:20AM |
2 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
5:00AM |
5 |
[LLVMdev] [llvm-commits] ABI: how to let the backend know that an aggregate should be allocated on stack |
4:29AM |
0 |
[LLVMdev] Predication on SIMD architectures and LLVM |
1:22AM |
0 |
[LLVMdev] How to Find Instruction Encoding for a MachineInstr |
12:23AM |
1 |
[LLVMdev] How to Find Instruction Encoding for a MachineInstr |
12:19AM |
0 |
[LLVMdev] How to Find Instruction Encoding for a MachineInstr |
12:10AM |
0 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
12:01AM |
0 |
[LLVMdev] [llvm-commits] ABI: how to let the backend know that an aggregate should be allocated on stack |
|
Tuesday October 23 2012 |
Time | Replies | Subject |
11:51PM |
0 |
[LLVMdev] [PATCH] Add custom UINT_TO_FP lowering from v2i32 to v2f32 in 32-bit mode |
11:47PM |
2 |
[LLVMdev] Error building llvm on AIX 7.1 |
11:46PM |
2 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
11:39PM |
0 |
[LLVMdev] ABI: how to let the backend know that an aggregate should be allocated on stack |
9:03PM |
0 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
8:57PM |
2 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
8:22PM |
0 |
[LLVMdev] LLD archive library design |
8:05PM |
0 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
8:01PM |
1 |
[LLVMdev] LLD archive library design |
7:50PM |
1 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
6:58PM |
4 |
[LLVMdev] How to Find Instruction Encoding for a MachineInstr |
6:31PM |
3 |
[LLVMdev] Lifetime of ExecutionEngine? |
6:30PM |
0 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
6:22PM |
4 |
[LLVMdev] ABI: how to let the backend know that an aggregate should be allocated on stack |
6:08PM |
0 |
[LLVMdev] x86 Frame Pointer with AVX |
6:02PM |
0 |
[LLVMdev] Debugging/Fixing 'Interval not live at use' errors |
5:39PM |
0 |
[LLVMdev] x86 Frame Pointer with AVX |
5:26PM |
2 |
[LLVMdev] x86 Frame Pointer with AVX |
5:20PM |
0 |
[LLVMdev] Error building llvm on AIX 7.1 |
5:15PM |
0 |
[LLVMdev] Unable to build PBQP/Graph.h with libc++ |
4:58PM |
0 |
[LLVMdev] x86 Frame Pointer with AVX |
4:56PM |
0 |
[LLVMdev] x86 Frame Pointer with AVX |
4:55PM |
0 |
[LLVMdev] x86 Frame Pointer with AVX |
4:43PM |
0 |
[LLVMdev] Predication on SIMD architectures and LLVM |
4:37PM |
1 |
[LLVMdev] x86 Frame Pointer with AVX |
4:31PM |
2 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
4:25PM |
2 |
[LLVMdev] Predication on SIMD architectures and LLVM |
4:12PM |
0 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
4:00PM |
0 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
3:50PM |
2 |
[LLVMdev] Debugging/Fixing 'Interval not live at use' errors |
3:43PM |
4 |
[LLVMdev] x86 Frame Pointer with AVX |
2:52PM |
2 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
1:58PM |
0 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
1:54PM |
0 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
1:52PM |
2 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
1:08PM |
2 |
[LLVMdev] Error building llvm on AIX 7.1 |
12:54PM |
1 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
9:10AM |
2 |
[LLVMdev] Debugging/Fixing 'Interval not live at use' errors |
8:33AM |
1 |
[LLVMdev] Clang fails to compile template with dependendent Non type template parameter. |
8:31AM |
0 |
[LLVMdev] Predication on SIMD architectures and LLVM |
7:41AM |
0 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
7:38AM |
4 |
[LLVMdev] Here need your help |
7:13AM |
2 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
4:40AM |
0 |
[LLVMdev] precondition suggestion to LLVM |
4:33AM |
3 |
[LLVMdev] precondition suggestion to LLVM |
3:41AM |
0 |
[LLVMdev] precondition suggestion to LLVM |
3:06AM |
0 |
[LLVMdev] precondition suggestion to LLVM |
2:05AM |
1 |
[LLVMdev] "Information retrieval"-y idea suggestions for course project. |
12:07AM |
0 |
[LLVMdev] Status of YAML IO? |
|
Monday October 22 2012 |
Time | Replies | Subject |
11:40PM |
2 |
[LLVMdev] Status of YAML IO? |
10:05PM |
5 |
[LLVMdev] precondition suggestion to LLVM |
10:02PM |
0 |
[LLVMdev] Loop Vectorizer Update |
9:49PM |
0 |
[LLVMdev] x86 Frame Pointer with AVX |
9:30PM |
0 |
[LLVMdev] Section specialization & COFF. |
9:29PM |
3 |
[LLVMdev] x86 Frame Pointer with AVX |
7:49PM |
1 |
[LLVMdev] VMkit compilation error |
7:12PM |
0 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
6:53PM |
4 |
[LLVMdev] [cfe-commits] [PATCH/RFC, PowerPC] Extend 32-bit function arguments / return values |
6:52PM |
0 |
[LLVMdev] register scavenger |
6:40PM |
5 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
6:34PM |
0 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
5:17PM |
5 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
5:15PM |
2 |
[LLVMdev] Predication on SIMD architectures and LLVM |
5:10PM |
2 |
[LLVMdev] Predication on SIMD architectures and LLVM |
3:33PM |
0 |
[LLVMdev] Immediate instructions / register allocator |
3:07PM |
0 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
2:53PM |
2 |
[LLVMdev] Section specialization & COFF. |
1:53PM |
0 |
[LLVMdev] dragonegg polly support broken? |
1:48PM |
2 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
1:26PM |
0 |
[LLVMdev] Cambridge LLVM Social |
12:05PM |
0 |
[LLVMdev] dragonegg polly support broken? |
10:38AM |
2 |
[LLVMdev] Immediate instructions / register allocator |
10:12AM |
0 |
[LLVMdev] Can I debug llvm source code by iMac Xcode? |
10:08AM |
1 |
[LLVMdev] Does someone still keep eye on MC ARM EHABI? |
9:40AM |
0 |
[LLVMdev] Self-referential instruction from jump threading |
9:39AM |
0 |
[LLVMdev] Does someone still keep eye on MC ARM EHABI? |
9:25AM |
0 |
[LLVMdev] Self-referential instruction from jump threading |
8:29AM |
0 |
[LLVMdev] Statistics of add/remove case operations for switches |
7:50AM |
1 |
[LLVMdev] Use information generated by existing passes into new pass |
5:18AM |
4 |
[LLVMdev] Self-referential instruction from jump threading |
2:30AM |
2 |
[LLVMdev] Reading IR from a std::ostream |
1:56AM |
3 |
[LLVMdev] Does someone still keep eye on MC ARM EHABI? |
1:00AM |
0 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
12:53AM |
0 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
|
Sunday October 21 2012 |
Time | Replies | Subject |
10:52PM |
4 |
[LLVMdev] dragonegg polly support broken? |
10:46PM |
0 |
[LLVMdev] dragonegg polly support broken? |
9:31PM |
2 |
[LLVMdev] dragonegg polly support broken? |
8:43PM |
2 |
[LLVMdev] Need help trying to generate mblaze code. |
8:39PM |
1 |
[LLVMdev] Announcement: Phabricator for code reviews |
7:47PM |
0 |
[LLVMdev] dragonegg polly support broken? |
6:58PM |
2 |
[LLVMdev] dragonegg polly support broken? |
6:46PM |
0 |
[LLVMdev] dragonegg polly support broken? |
6:35PM |
2 |
[LLVMdev] dragonegg polly support broken? |
6:01PM |
0 |
[LLVMdev] dragonegg polly support broken? |
5:57PM |
2 |
[LLVMdev] dragonegg polly support broken? |
5:38PM |
0 |
[LLVMdev] dragonegg polly support broken? |
4:27PM |
2 |
[LLVMdev] dyld: lazy symbol binding failed: fast lazy bind offset out of range |
4:13PM |
2 |
[LLVMdev] dragonegg polly support broken? |
3:38PM |
0 |
[LLVMdev] dragonegg polly support broken? |
12:48AM |
0 |
[LLVMdev] RegisterCoalescing pass crashes with ImplicitDef registers |
12:38AM |
2 |
[LLVMdev] dragonegg polly support broken? |
|
Saturday October 20 2012 |
Time | Replies | Subject |
10:37PM |
2 |
[LLVMdev] RegisterCoalescing pass crashes with ImplicitDef registers |
10:05PM |
0 |
[LLVMdev] RegisterCoalescing pass crashes with ImplicitDef registers |
9:59PM |
2 |
[LLVMdev] Unable to build PBQP/Graph.h with libc++ |
9:08PM |
0 |
[LLVMdev] Unable to build PBQP/Graph.h with libc++ |
8:47PM |
3 |
[LLVMdev] Unable to build PBQP/Graph.h with libc++ |
8:23PM |
2 |
[LLVMdev] RegisterCoalescing pass crashes with ImplicitDef registers |
6:39PM |
0 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
5:45PM |
1 |
[LLVMdev] VMKit: Problem compiling vmkit |
5:37PM |
4 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
3:14PM |
2 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
8:56AM |
0 |
[LLVMdev] Announcement: Phabricator for code reviews |
8:51AM |
3 |
[LLVMdev] Announcement: Phabricator for code reviews |
8:09AM |
0 |
[LLVMdev] Choosing an alias analyzer |
7:58AM |
0 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
|
Friday October 19 2012 |
Time | Replies | Subject |
11:17PM |
0 |
[LLVMdev] LLD archive library design |
11:15PM |
0 |
[LLVMdev] Section specialization & COFF. |
10:54PM |
0 |
[LLVMdev] [llvm-commits] Atom alignment |
10:41PM |
2 |
[LLVMdev] LLD archive library design |
10:01PM |
0 |
[LLVMdev] Redundant Add Operation in Code Generation? |
9:44PM |
2 |
[LLVMdev] Redundant Add Operation in Code Generation? |
9:41PM |
0 |
[LLVMdev] Redundant Add Operation in Code Generation? |
9:34PM |
3 |
[LLVMdev] Redundant Add Operation in Code Generation? |
8:53PM |
1 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
8:30PM |
0 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
8:29PM |
0 |
[LLVMdev] Redundant Add Operation in Code Generation? |
8:19PM |
0 |
[LLVMdev] Announcement: Phabricator for code reviews |
8:17PM |
2 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
7:59PM |
0 |
[LLVMdev] Predication on SIMD architectures and LLVM |
7:45PM |
0 |
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes |
6:44PM |
2 |
[LLVMdev] Choosing an alias analyzer |
6:43PM |
4 |
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes |
6:04PM |
0 |
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes |
5:47PM |
2 |
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes |
4:37PM |
0 |
[LLVMdev] Predication on SIMD architectures and LLVM |
4:29PM |
0 |
[LLVMdev] Predication on SIMD architectures and LLVM |
4:27PM |
0 |
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes |
4:27PM |
2 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
4:24PM |
0 |
[LLVMdev] Predication on SIMD architectures and LLVM |
4:12PM |
0 |
[LLVMdev] Predication on SIMD architectures and LLVM |
4:00PM |
0 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
3:58PM |
2 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
3:40PM |
0 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
3:38PM |
11 |
[LLVMdev] Predication on SIMD architectures and LLVM |
3:17PM |
4 |
[LLVMdev] How to represent __attribute__((fastcall)) functions in the IL |
3:15PM |
0 |
[LLVMdev] opcodes |
2:57PM |
3 |
[LLVMdev] opcodes |
2:08PM |
0 |
[LLVMdev] Debugging LLVM IR with GDB |
10:28AM |
0 |
[LLVMdev] Debugging LLVM IR with GDB |
9:55AM |
2 |
[LLVMdev] Section specialization & COFF. |
9:24AM |
3 |
[LLVMdev] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes |
9:02AM |
0 |
[LLVMdev] Arity of the callee at each GC safe point |
6:07AM |
0 |
[LLVMdev] Newbie question for registering new target with LLVM |
4:13AM |
0 |
[LLVMdev] A Java version of LLVM Core for LLVM IR Analysis: JLLVM |
3:13AM |
2 |
[LLVMdev] interesting minor llvm optimizer flaw |
|
Thursday October 18 2012 |
Time | Replies | Subject |
11:25PM |
2 |
[LLVMdev] Announcement: Phabricator for code reviews |
11:19PM |
0 |
[LLVMdev] how to mark tests as XFAIL and prefix? |
11:05PM |
0 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
10:57PM |
1 |
[LLVMdev] Announcement: Phabricator for code reviews |
10:24PM |
0 |
[LLVMdev] Announcement: Phabricator for code reviews |
10:23PM |
0 |
[LLVMdev] Announcement: Phabricator for code reviews |
10:11PM |
3 |
[LLVMdev] Announcement: Phabricator for code reviews |
10:09PM |
1 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
10:03PM |
0 |
[LLVMdev] Announcement: Phabricator for code reviews |
9:58PM |
1 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
9:45PM |
6 |
[LLVMdev] Announcement: Phabricator for code reviews |
9:23PM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
9:21PM |
0 |
[LLVMdev] Announcement: Phabricator for code reviews |
9:18PM |
2 |
[LLVMdev] Announcement: Phabricator for code reviews |
9:11PM |
3 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
8:58PM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
8:36PM |
3 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
8:31PM |
0 |
[LLVMdev] Announcement: Phabricator for code reviews |
6:43PM |
3 |
[LLVMdev] SimplifyCFG vs loops |
6:39PM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
6:32PM |
2 |
[LLVMdev] Announcement: Phabricator for code reviews |
6:19PM |
2 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
5:26PM |
0 |
[LLVMdev] SimplifyCFG vs loops |
5:20PM |
2 |
[LLVMdev] Newbie question for registering new target with LLVM |
5:12PM |
2 |
[LLVMdev] SimplifyCFG vs loops |
4:59PM |
0 |
[LLVMdev] problem with my LLVM pass |
3:36PM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
2:59PM |
0 |
[LLVMdev] Debugging LLVM IR with GDB |
2:53PM |
2 |
[LLVMdev] problem with my LLVM pass |
2:35PM |
4 |
[LLVMdev] Debugging LLVM IR with GDB |
1:59PM |
0 |
[LLVMdev] Debugging LLVM IR with GDB |
1:47PM |
1 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
1:33PM |
0 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
1:09PM |
2 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
12:45PM |
0 |
[LLVMdev] Bug in LowerIntrinsics::PerformDefaultLowering ? |
11:50AM |
2 |
[LLVMdev] Bug in LowerIntrinsics::PerformDefaultLowering ? |
11:45AM |
0 |
[LLVMdev] Announcement: Phabricator for code reviews |
11:25AM |
0 |
[LLVMdev] problem with my LLVM pass |
11:24AM |
0 |
[LLVMdev] problem with my LLVM pass |
11:22AM |
0 |
[LLVMdev] problem with my LLVM pass |
10:11AM |
4 |
[LLVMdev] problem with my LLVM pass |
9:48AM |
0 |
[LLVMdev] Loop vectorizer |
9:42AM |
0 |
[LLVMdev] problem with my LLVM pass |
9:38AM |
2 |
[LLVMdev] problem with my LLVM pass |
9:33AM |
0 |
[LLVMdev] problem with my LLVM pass |
9:32AM |
0 |
[LLVMdev] [RFC] LLVM C-API Change |
9:19AM |
2 |
[LLVMdev] problem with my LLVM pass |
8:35AM |
2 |
[LLVMdev] [RFC] LLVM C-API Change |
7:48AM |
2 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
7:44AM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
4:11AM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
3:31AM |
1 |
[LLVMdev] Debugging LLVM IR with GDB |
1:58AM |
2 |
[LLVMdev] Debugging LLVM IR with GDB |
1:53AM |
6 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
12:19AM |
1 |
[LLVMdev] Incrementing a pointer to array element? |
|
Wednesday October 17 2012 |
Time | Replies | Subject |
11:55PM |
0 |
[LLVMdev] Hexagon Assembly parser question |
10:33PM |
2 |
[LLVMdev] Problem with PostRASchedulerList.cpp - advice wanted |
10:32PM |
1 |
[LLVMdev] Redundant Add Operation in Code Generation? |
10:29PM |
3 |
[LLVMdev] Hexagon Assembly parser question |
10:10PM |
1 |
[LLVMdev] MI DAG constructor indeterminism |
9:34PM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
9:32PM |
2 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
9:23PM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
9:17PM |
2 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
9:03PM |
0 |
[LLVMdev] Redundant Add Operation in Code Generation? |
8:54PM |
2 |
[LLVMdev] Redundant Add Operation in Code Generation? |
8:46PM |
1 |
[LLVMdev] please advise on PassManager |
8:44PM |
0 |
[LLVMdev] Redundant Add Operation in Code Generation? |
8:38PM |
0 |
[LLVMdev] Using Clang LTO/gold plugin to build clang |
8:22PM |
4 |
[LLVMdev] Redundant Add Operation in Code Generation? |
8:09PM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
8:01PM |
0 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
7:58PM |
0 |
[LLVMdev] please advise on PassManager |
7:52PM |
2 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
7:25PM |
1 |
[LLVMdev] SimplifyCFG vs loops |
7:11PM |
0 |
[LLVMdev] SimplifyCFG vs loops |
7:05PM |
0 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
7:00PM |
1 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
6:25PM |
0 |
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews |
5:38PM |
3 |
[LLVMdev] Using Clang LTO/gold plugin to build clang |
5:36PM |
1 |
[LLVMdev] Instruction combiner: converting arithmetic into bit operations |
5:18PM |
9 |
[LLVMdev] Announcement: Phabricator for code reviews |
5:03PM |
1 |
[LLVMdev] SimplifyCFG vs loops |
4:57PM |
0 |
[LLVMdev] Instruction combiner: converting arithmetic into bit operations |
4:56PM |
1 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
4:55PM |
0 |
[LLVMdev] SimplifyCFG vs loops |
4:38PM |
3 |
[LLVMdev] SimplifyCFG vs loops |
4:09PM |
0 |
[LLVMdev] SimplifyCFG vs loops |
3:53PM |
0 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
3:49PM |
2 |
[LLVMdev] a bug in Kaleidoscope code |
3:41PM |
4 |
[LLVMdev] SimplifyCFG vs loops |
3:38PM |
2 |
[LLVMdev] DWARF 2/3 backwards compatibility? |
3:31PM |
2 |
[LLVMdev] Instruction combiner: converting arithmetic into bit operations |
3:28PM |
1 |
[LLVMdev] Question on Fence Instruction |
2:45PM |
0 |
[LLVMdev] Question on Fence Instruction |
2:45PM |
1 |
[LLVMdev] Find template types of std::map |
2:34PM |
2 |
[LLVMdev] please advise on PassManager |
2:34PM |
0 |
[LLVMdev] compilation problem |
2:22PM |
2 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
2:21PM |
3 |
[LLVMdev] Question on Fence Instruction |
2:05PM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
2:04PM |
0 |
[LLVMdev] Debugging LLVM IR with GDB |
2:00PM |
0 |
[LLVMdev] Question on Fence Instruction |
1:42PM |
5 |
[LLVMdev] Debugging LLVM IR with GDB |
1:14PM |
2 |
[LLVMdev] Dminator set question |
11:20AM |
2 |
[LLVMdev] accesing svn URLs mentioned in git commit messages |
9:05AM |
1 |
[LLVMdev] Howto Guide on Porting the LLVM Assembler |
7:43AM |
2 |
[LLVMdev] Loop vectorizer |
7:13AM |
0 |
[LLVMdev] Loop vectorizer |
3:44AM |
0 |
[LLVMdev] MI DAG constructor indeterminism |
2:06AM |
0 |
[LLVMdev] Loop vectorizer |
1:20AM |
0 |
[LLVMdev] Howto Guide on Porting the LLVM Assembler |
|
Tuesday October 16 2012 |
Time | Replies | Subject |
10:32PM |
4 |
[LLVMdev] Loop vectorizer |
10:07PM |
2 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
9:55PM |
2 |
[LLVMdev] Howto Guide on Porting the LLVM Assembler |
9:38PM |
1 |
[LLVMdev] Cleaning up Module, ExecutionEngine, etc |
9:22PM |
0 |
[LLVMdev] Loop vectorizer |
8:43PM |
2 |
[LLVMdev] MI DAG constructor indeterminism |
8:03PM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
7:23PM |
2 |
[LLVMdev] Loop vectorizer |
7:03PM |
0 |
[LLVMdev] Changing Alignment Attribute using New Attribute API |
7:00PM |
0 |
[LLVMdev] CABI project |
6:28PM |
0 |
[LLVMdev] LoopVectorizer |
6:09PM |
0 |
[LLVMdev] Update on 2012 LLVM Developers' Meeting |
6:07PM |
0 |
[LLVMdev] Find template types of std::map |
2:55PM |
0 |
[LLVMdev] Minor problem in today's LLVM/CLANG head |
2:52PM |
0 |
[LLVMdev] [cfe-dev] cmake+ninja build error for compiler-rt sources |
2:51PM |
1 |
[LLVMdev] seg fault in AddReachableCodeToWorklist |
1:47PM |
0 |
[LLVMdev] Meaning of the nocapture attribute (possible bug?) |
1:44PM |
2 |
[LLVMdev] Question on Fence Instruction |
1:07PM |
1 |
[LLVMdev] Cleanest way to do llvm-driven compile with specified passes |
11:17AM |
3 |
[LLVMdev] Find template types of std::map |
11:11AM |
1 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
8:36AM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
7:30AM |
0 |
[LLVMdev] Meaning of the nocapture attribute (possible bug?) |
6:48AM |
1 |
[LLVMdev] MemorySanitizer, a tool that finds uninitialized reads and more |
4:53AM |
0 |
[LLVMdev] LLD AbsoluteAtoms |
4:06AM |
2 |
[LLVMdev] LLD AbsoluteAtoms |
2:16AM |
5 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
12:49AM |
0 |
[LLVMdev] interesting possible compiler bug |
12:27AM |
2 |
[LLVMdev] interesting possible compiler bug |
12:20AM |
0 |
[LLVMdev] interesting possible compiler bug |
|
Monday October 15 2012 |
Time | Replies | Subject |
11:07PM |
0 |
[LLVMdev] LLD AbsoluteAtoms |
11:00PM |
2 |
[LLVMdev] LLD AbsoluteAtoms |
10:12PM |
1 |
[LLVMdev] interesting possible compiler bug |
10:00PM |
1 |
[LLVMdev] Using llvm-mc assembler in the llvm test-suite |
9:49PM |
0 |
[LLVMdev] interesting possible compiler bug |
9:43PM |
2 |
[LLVMdev] interesting possible compiler bug |
9:40PM |
0 |
[LLVMdev] Using llvm-mc assembler in the llvm test-suite |
9:39PM |
0 |
[LLVMdev] interesting possible compiler bug |
9:36PM |
0 |
[LLVMdev] Using llvm-mc assembler in the llvm test-suite |
9:28PM |
4 |
[LLVMdev] interesting possible compiler bug |
9:22PM |
4 |
[LLVMdev] Using llvm-mc assembler in the llvm test-suite |
8:54PM |
2 |
[LLVMdev] Meaning of the nocapture attribute (possible bug?) |
5:38PM |
0 |
[LLVMdev] Dragonegg build broken? |
5:01PM |
0 |
[LLVMdev] LLD AbsoluteAtoms |
4:23PM |
0 |
[LLVMdev] ValueTracking's GetUnderlyingObject vs. ScheduleDAGInstrs' getUnderlyingObject |
4:00PM |
3 |
[LLVMdev] ValueTracking's GetUnderlyingObject vs. ScheduleDAGInstrs' getUnderlyingObject |
3:46PM |
2 |
[LLVMdev] Alternate instruction encoding for subtargets |
3:08PM |
3 |
[LLVMdev] LLD AbsoluteAtoms |
11:46AM |
3 |
[LLVMdev] Dragonegg build broken? |
|
Sunday October 14 2012 |
Time | Replies | Subject |
4:38AM |
1 |
[LLVMdev] [Proposal] Annotated assembly output |
|
Saturday October 13 2012 |
Time | Replies | Subject |
10:13PM |
0 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
10:02PM |
2 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
5:11PM |
1 |
[LLVMdev] Accessing merged globals through PointerType |
4:24PM |
0 |
[LLVMdev] [Proposal] Annotated assembly output |
4:06PM |
0 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
3:40PM |
0 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
1:10PM |
0 |
[LLVMdev] Please rename modified gtest lib |
10:09AM |
3 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
9:33AM |
0 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
9:10AM |
2 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
8:22AM |
2 |
[LLVMdev] [cfe-dev] cmake+ninja build error for compiler-rt sources |
8:09AM |
0 |
[LLVMdev] [cfe-dev] cmake+ninja build error for compiler-rt sources |
8:01AM |
2 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
4:47AM |
0 |
[LLVMdev] LLVM buildbot is back to work |
2:38AM |
0 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
1:14AM |
2 |
[LLVMdev] [cfe-dev] cmake+ninja build error for compiler-rt sources |
12:21AM |
0 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
|
Friday October 12 2012 |
Time | Replies | Subject |
11:44PM |
2 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
10:51PM |
0 |
[LLVMdev] LLVM buildbot master will be unavailable tonight |
10:46PM |
0 |
[LLVMdev] including llvm IR parser in my project |
8:36PM |
3 |
[LLVMdev] [Proposal] Annotated assembly output |
8:17PM |
1 |
[LLVMdev] Target backend not converting char* to struct properly. |
8:07PM |
0 |
[LLVMdev] [Proposal] Annotated assembly output |
8:01PM |
0 |
[LLVMdev] Target backend not converting char* to struct properly. |
6:17PM |
0 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
6:14PM |
3 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
5:57PM |
2 |
[LLVMdev] [Proposal] Annotated assembly output |
5:43PM |
2 |
[LLVMdev] Target backend not converting char* to struct properly. |
5:12PM |
0 |
[LLVMdev] [Proposal] Annotated assembly output |
5:00PM |
0 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
4:51PM |
2 |
[LLVMdev] [Proposal] Annotated assembly output |
2:19PM |
0 |
[LLVMdev] cmake+ninja build error for compiler-rt sources |
2:07PM |
2 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
2:05PM |
2 |
[LLVMdev] cmake+ninja build error for compiler-rt sources |
12:35PM |
1 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
11:44AM |
0 |
[LLVMdev] Cambridge LLVM Afternoon Workshop on Monday |
11:42AM |
0 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
11:28AM |
0 |
[LLVMdev] Newbie question for registering new target with LLVM |
11:13AM |
0 |
[LLVMdev] Incompatible type vector assignment error in Clang Rev 3.1 |
9:12AM |
3 |
[LLVMdev] Newbie question for registering new target with LLVM |
9:07AM |
2 |
[LLVMdev] initial selection DAG |
6:57AM |
5 |
[LLVMdev] Dynamically loading native code generated from LLVM IR |
12:01AM |
0 |
[LLVMdev] another mips16 puzzle |
|
Thursday October 11 2012 |
Time | Replies | Subject |
11:02PM |
0 |
[LLVMdev] Function aliases in CallGraph |
10:56PM |
2 |
[LLVMdev] Function aliases in CallGraph |
6:48PM |
1 |
[LLVMdev] vselect on ARM/NEON |
6:05PM |
0 |
[LLVMdev] vselect on ARM/NEON |
5:25PM |
2 |
[LLVMdev] vselect on ARM/NEON |
2:58PM |
1 |
[LLVMdev] Question about the old C back-end |
1:47PM |
0 |
[LLVMdev] Question about the old C back-end |
1:30PM |
1 |
[LLVMdev] CBE progress and design |
1:18PM |
3 |
[LLVMdev] Question about the old C back-end |
10:44AM |
0 |
[LLVMdev] RegisterClass constraints in TableGen |
9:19AM |
1 |
[LLVMdev] Compiling Skir failure |
4:59AM |
0 |
[LLVMdev] [PATCH / PROPOSAL] bitcode encoding that is ~15% smaller for large bitcode files... |
12:10AM |
2 |
[LLVMdev] [PATCH / PROPOSAL] bitcode encoding that is ~15% smaller for large bitcode files... |
|
Wednesday October 10 2012 |
Time | Replies | Subject |
9:58PM |
2 |
[LLVMdev] Order of values |
8:52PM |
0 |
[LLVMdev] Solicit code review (change to CodeGen) |
8:20PM |
2 |
[LLVMdev] Solicit code review (change to CodeGen) |
8:08PM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
8:05PM |
2 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
7:39PM |
0 |
[LLVMdev] [PATCH / PROPOSAL] bitcode encoding that is ~15% smaller for large bitcode files... |
7:15PM |
2 |
[LLVMdev] [PATCH / PROPOSAL] bitcode encoding that is ~15% smaller for large bitcode files... |
7:06PM |
1 |
[LLVMdev] Inconsistency in the LLVM docs |
7:05PM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
6:51PM |
0 |
[LLVMdev] Inconsistency in the LLVM docs |
6:23PM |
0 |
[LLVMdev] [PATCH / PROPOSAL] bitcode encoding that is ~15% smaller for large bitcode files... |
6:11PM |
3 |
[LLVMdev] Inconsistency in the LLVM docs |
4:50PM |
0 |
[LLVMdev] DynamicLibrary::UnloadLibrary() |
1:15PM |
0 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
12:29PM |
1 |
[LLVMdev] CBE progress and design |
5:19AM |
0 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
5:00AM |
2 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
12:50AM |
1 |
[LLVMdev] [llvm-commits] [patch] "TargetTransform" as an API between codegen and IR-level passes |
12:11AM |
0 |
[LLVMdev] Job Opening: Compiler Engineer |
12:10AM |
0 |
[LLVMdev] [cfe-dev] OpenMP support in CLANG: A proposal |
|
Tuesday October 9 2012 |
Time | Replies | Subject |
10:58PM |
2 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
6:24PM |
0 |
[LLVMdev] function calls |
6:19PM |
2 |
[LLVMdev] function calls |
6:18PM |
0 |
[LLVMdev] debug information |
1:25PM |
0 |
[LLVMdev] problem with my LLVM pass |
11:37AM |
2 |
[LLVMdev] OpenMP support in CLANG: A proposal |
8:02AM |
0 |
[LLVMdev] "Multithreaded LLVM" in "Writing an LLVM Pass" |
7:55AM |
3 |
[LLVMdev] "Multithreaded LLVM" in "Writing an LLVM Pass" |
7:35AM |
0 |
[LLVMdev] "Multithreaded LLVM" in "Writing an LLVM Pass" |
6:23AM |
1 |
[LLVMdev] Announcing 3.2 Release Schedule |
2:52AM |
0 |
[LLVMdev] Pairing Registers on a Target Similar to Mips? |
|
Monday October 8 2012 |
Time | Replies | Subject |
11:44PM |
2 |
[LLVMdev] How can I find the LHS of the function call when traversing the function call |
9:42PM |
2 |
[LLVMdev] [PATCH / PROPOSAL] bitcode encoding that is ~15% smaller for large bitcode files... |
5:26PM |
4 |
[LLVMdev] "Multithreaded LLVM" in "Writing an LLVM Pass" |
3:18PM |
1 |
[LLVMdev] Austin LLVM Social this week |
2:10PM |
1 |
[LLVMdev] Fwd: Multiply i8 operands promotes to i32 |
1:54PM |
0 |
[LLVMdev] Meaning of the nocapture attribute (possible bug?) |
12:48PM |
1 |
[LLVMdev] Multiply i8 operands promotes to i32 |
12:34PM |
3 |
[LLVMdev] Meaning of the nocapture attribute (possible bug?) |
11:08AM |
0 |
[LLVMdev] Multiply i8 operands promotes to i32 |
9:44AM |
3 |
[LLVMdev] Multiply i8 operands promotes to i32 |
9:26AM |
0 |
[LLVMdev] Inserting a function call using LLVM |
9:18AM |
0 |
[LLVMdev] machine branch probability info |
7:21AM |
0 |
[LLVMdev] LLVM Loop Vectorizer (Nadav Rotem) |
6:53AM |
3 |
[LLVMdev] LLVM Loop Vectorizer (Nadav Rotem) |
6:32AM |
1 |
[LLVMdev] LLVM Loop Vectorizer (Nadav Rotem) |
5:51AM |
1 |
[LLVMdev] SCEV bottom value |
4:58AM |
0 |
[LLVMdev] LLVM Loop Vectorizer (Nadav Rotem) |
4:34AM |
2 |
[LLVMdev] A Java version of LLVM Core for LLVM IR Analysis: JLLVM |
4:02AM |
0 |
[LLVMdev] LLVM Loop Vectorizer (Nadav Rotem) |
3:45AM |
0 |
[LLVMdev] SCEV bottom value |
3:33AM |
3 |
[LLVMdev] LLVM Loop Vectorizer (Nadav Rotem) |
1:53AM |
3 |
[LLVMdev] SCEV bottom value |
|
Sunday October 7 2012 |
Time | Replies | Subject |
11:03PM |
2 |
[LLVMdev] Inserting a function call using LLVM |
8:04PM |
0 |
[LLVMdev] LLVM Loop Vectorizer (Nadav Rotem) |
4:47PM |
1 |
[LLVMdev] Undefined behavior in Operator class? |
4:32PM |
0 |
[LLVMdev] Undefined behavior in Operator class? |
3:50PM |
4 |
[LLVMdev] LLVM Loop Vectorizer (Nadav Rotem) |
3:34PM |
2 |
[LLVMdev] Undefined behavior in Operator class? |
10:14AM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
7:56AM |
2 |
[LLVMdev] getting pointer to CFG object for any given C program |
4:28AM |
0 |
[LLVMdev] Undefined behavior in Operator class? |
4:04AM |
0 |
[LLVMdev] TSVC/Equivalencing-dbl |
3:43AM |
2 |
[LLVMdev] Undefined behavior in Operator class? |
|
Saturday October 6 2012 |
Time | Replies | Subject |
10:18PM |
2 |
[LLVMdev] Pairing Registers on a Target Similar to Mips? |
3:58PM |
1 |
[LLVMdev] [PATCH] with no response: Bug 13163 - BlockAddress instruction with use from the global context is damaged during module link |
3:32PM |
0 |
[LLVMdev] [PATCH / PROPOSAL] bitcode encoding that is ~15% smaller for large bitcode files... |
2:23AM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
12:29AM |
1 |
[LLVMdev] LLVM Loop Vectorizer |
|
Friday October 5 2012 |
Time | Replies | Subject |
9:52PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
9:27PM |
2 |
[LLVMdev] LLVM Loop Vectorizer |
9:11PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
8:47PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
8:26PM |
2 |
[LLVMdev] TSVC/Equivalencing-dbl |
8:22PM |
2 |
[LLVMdev] LLVM Loop Vectorizer |
8:20PM |
3 |
[LLVMdev] LLVM Loop Vectorizer |
8:14PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
8:13PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
8:08PM |
0 |
[LLVMdev] TSVC/Equivalencing-dbl |
8:08PM |
2 |
[LLVMdev] LLVM Loop Vectorizer |
7:50PM |
0 |
[LLVMdev] TSVC/Equivalencing-dbl |
7:08PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
6:57PM |
4 |
[LLVMdev] LLVM Loop Vectorizer |
6:53PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
6:51PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
6:51PM |
2 |
[LLVMdev] Compiling for several operand memories |
6:49PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
6:43PM |
5 |
[LLVMdev] LLVM Loop Vectorizer |
6:32PM |
4 |
[LLVMdev] TSVC/Equivalencing-dbl |
6:29PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
5:33PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
5:10PM |
0 |
[LLVMdev] TSVC/Equivalencing-dbl |
5:06PM |
2 |
[LLVMdev] TSVC/Equivalencing-dbl |
4:48PM |
2 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
4:48PM |
6 |
[LLVMdev] LLVM Loop Vectorizer |
4:42PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
4:08PM |
2 |
[LLVMdev] LLVM Loop Vectorizer |
4:05PM |
1 |
[LLVMdev] question |
4:00PM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
3:43PM |
0 |
[LLVMdev] Distinguish variadic register defines/uses in MCInstrDesc? |
3:32PM |
1 |
[LLVMdev] LLVM Loop Vectorizer |
2:59PM |
2 |
[LLVMdev] LLVM Loop Vectorizer |
10:07AM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
8:59AM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
8:52AM |
0 |
[LLVMdev] Cross-compiling to x86_64-mingw-w64 |
7:45AM |
2 |
[LLVMdev] problem with my LLVM pass |
7:42AM |
0 |
[LLVMdev] library functions |
7:39AM |
0 |
[LLVMdev] problem with my LLVM pass |
7:34AM |
4 |
[LLVMdev] problem with my LLVM pass |
7:15AM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
7:08AM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
6:28AM |
0 |
[LLVMdev] LLVM Loop Vectorizer |
6:14AM |
12 |
[LLVMdev] LLVM Loop Vectorizer |
4:55AM |
1 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
3:05AM |
0 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
2:47AM |
0 |
[LLVMdev] [RFC] Overhauling Attributes |
2:32AM |
1 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
2:19AM |
0 |
[LLVMdev] question |
2:13AM |
2 |
[LLVMdev] Atomic ops cannot be built from C/OCaml bindings |
1:29AM |
0 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
12:15AM |
2 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
12:11AM |
1 |
[LLVMdev] interesting possible compiler bug |
|
Thursday October 4 2012 |
Time | Replies | Subject |
11:40PM |
0 |
[LLVMdev] interesting possible compiler bug |
11:35PM |
4 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
11:28PM |
0 |
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as |
11:21PM |
2 |
[LLVMdev] interesting possible compiler bug |
9:38PM |
2 |
[LLVMdev] Interprocedural Register Allocation |
9:31PM |
0 |
[LLVMdev] Interprocedural Register Allocation |
9:27PM |
2 |
[LLVMdev] Interprocedural Register Allocation |
8:31PM |
0 |
[LLVMdev] Interprocedural Register Allocation |
7:50PM |
2 |
[LLVMdev] question |
7:46PM |
0 |
[LLVMdev] question |
6:03PM |
0 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
5:44PM |
0 |
[LLVMdev] [cfe-dev] Inlining and virtualization in Clang/LLVM |
5:23PM |
2 |
[LLVMdev] [cfe-dev] Inlining and virtualization in Clang/LLVM |
4:17PM |
2 |
[LLVMdev] library functions |
3:20PM |
1 |
[LLVMdev] RegisterClass constraints in TableGen |
3:05PM |
1 |
[LLVMdev] RFC: Adding an option to llvm-link to allow it to get a list of input bitcode file names from a file |
2:37PM |
0 |
[LLVMdev] RFC: Adding an option to llvm-link to allow it to get a list of input bitcode file names from a file |
1:10PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
1:08PM |
3 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
12:19PM |
0 |
[LLVMdev] Handling SRet on Windows x86 |
9:47AM |
2 |
[LLVMdev] Interprocedural Register Allocation |
7:32AM |
0 |
[LLVMdev] Problems of manipulating GEP for struct type |
6:06AM |
0 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
5:58AM |
2 |
[LLVMdev] Problems of manipulating GEP for struct type |
5:37AM |
0 |
[LLVMdev] [cfe-dev] Inlining and virtualization in Clang/LLVM |
5:33AM |
2 |
[LLVMdev] question |
4:39AM |
2 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
3:51AM |
0 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
2:07AM |
7 |
[LLVMdev] TableGen: Requesting feedback for "TGContext" |
|
Wednesday October 3 2012 |
Time | Replies | Subject |
8:30PM |
3 |
[LLVMdev] [cfe-dev] Inlining and virtualization in Clang/LLVM |
8:15PM |
0 |
[LLVMdev] Does LLVM optimize recursive call? |
7:20PM |
1 |
[LLVMdev] [PROPOSAL] Adding support for -fstack-protector-strong |
7:01PM |
0 |
[LLVMdev] [cfe-dev] Inlining and virtualization in Clang/LLVM |
5:28PM |
3 |
[LLVMdev] Does LLVM optimize recursive call? |
5:15PM |
0 |
[LLVMdev] Does LLVM optimize recursive call? |
5:01PM |
2 |
[LLVMdev] Does LLVM optimize recursive call? |
4:54PM |
0 |
[LLVMdev] adding support for -ffixed-<reg> |
4:40PM |
0 |
[LLVMdev] question |
4:32PM |
2 |
[LLVMdev] question |
4:30PM |
0 |
[LLVMdev] [cfe-dev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
3:57PM |
1 |
[LLVMdev] Clang predefined macros with -fPIC and -fPIE |
9:37AM |
0 |
[LLVMdev] LoopInfo analysis in CallGraphSCCPass |
9:33AM |
2 |
[LLVMdev] LoopInfo analysis in CallGraphSCCPass |
9:33AM |
0 |
[LLVMdev] [cfe-dev] Does LLVM optimize recursive call? |
9:04AM |
0 |
[LLVMdev] LoopInfo analysis in CallGraphSCCPass |
9:02AM |
2 |
[LLVMdev] [cfe-dev] Does LLVM optimize recursive call? |
8:49AM |
2 |
[LLVMdev] LoopInfo analysis in CallGraphSCCPass |
8:48AM |
0 |
[LLVMdev] [cfe-dev] Does LLVM optimize recursive call? |
8:15AM |
2 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
7:22AM |
2 |
[LLVMdev] Does LLVM optimize recursive call? |
7:13AM |
2 |
[LLVMdev] adding support for -ffixed-<reg> |
6:53AM |
0 |
[LLVMdev] Does LLVM optimize recursive call? |
6:44AM |
2 |
[LLVMdev] Does LLVM optimize recursive call? |
6:30AM |
1 |
[LLVMdev] Handling of unsafe functions |
5:29AM |
0 |
[LLVMdev] adding support for -ffixed-<reg> |
5:26AM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
5:17AM |
2 |
[LLVMdev] [cfe-dev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
4:39AM |
0 |
[LLVMdev] [llvm-commits] patch to enable response file support in ParseCommandLineOptions |
2:52AM |
0 |
[LLVMdev] [cfe-dev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
2:44AM |
0 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
2:29AM |
2 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
2:15AM |
0 |
[LLVMdev] can I print DFG for IR |
1:28AM |
1 |
[LLVMdev] [patch] set AssemblerDialect |
12:56AM |
1 |
[LLVMdev] Getting dump of native assembly? |
12:18AM |
0 |
[LLVMdev] Inter-procedural program flow analysis |
12:06AM |
2 |
[LLVMdev] Inter-procedural program flow analysis |
|
Tuesday October 2 2012 |
Time | Replies | Subject |
11:43PM |
0 |
[LLVMdev] Inter-procedural program flow analysis |
11:29PM |
2 |
[LLVMdev] Inter-procedural program flow analysis |
10:28PM |
1 |
[LLVMdev] Offset to C++ structure members |
10:12PM |
1 |
[LLVMdev] Protecting a register value in the LLVM backend |
10:01PM |
0 |
[LLVMdev] interesting possible compiler bug |
9:55PM |
0 |
[LLVMdev] How best to represent assume statements in LLVM IR? |
9:43PM |
2 |
[LLVMdev] How best to represent assume statements in LLVM IR? |
9:39PM |
1 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
9:34PM |
0 |
[LLVMdev] Offset to C++ structure members |
8:56PM |
1 |
[LLVMdev] Losing Attribute information during inlining |
8:01PM |
0 |
[LLVMdev] [PATCH] with no response: Bug 13163 - BlockAddress instruction with use from the global context is damaged during module link |
8:00PM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
7:54PM |
0 |
[LLVMdev] Protecting a register value in the LLVM backend |
7:47PM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
7:39PM |
1 |
[LLVMdev] [cfe-dev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
7:31PM |
1 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
6:53PM |
1 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
6:42PM |
0 |
[LLVMdev] [cfe-dev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
6:33PM |
2 |
[LLVMdev] Offset to C++ structure members |
6:22PM |
3 |
[LLVMdev] Handling SRet on Windows x86 |
6:15PM |
0 |
[LLVMdev] llvm-g++ does not work! |
6:10PM |
0 |
[LLVMdev] question |
6:02PM |
0 |
[LLVMdev] Handling SRet on Windows x86 |
6:00PM |
2 |
[LLVMdev] question |
5:56PM |
3 |
[LLVMdev] [cfe-dev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
5:37PM |
4 |
[LLVMdev] llvm-g++ does not work! |
5:34PM |
1 |
[LLVMdev] [llvm-commits] patch to enable response file support in ParseCommandLineOptions |
5:22PM |
1 |
[LLVMdev] [PATCH] with no response: Bug 13163 - BlockAddress instruction with use from the global context is damaged during module link |
5:19PM |
0 |
[LLVMdev] [patch] set AssemblerDialect |
4:49PM |
2 |
[LLVMdev] interesting possible compiler bug |
4:45PM |
0 |
[LLVMdev] lld Atoms from STT_SECTION type symbols. |
4:42PM |
0 |
[LLVMdev] possible target inpdependent changes to support mips16 and arm thumb |
4:28PM |
2 |
[LLVMdev] Handling SRet on Windows x86 |
3:54PM |
0 |
[LLVMdev] Handling SRet on Windows x86 |
3:52PM |
0 |
[LLVMdev] [PROPOSAL] Adding support for -fstack-protector-strong |
3:35PM |
1 |
[LLVMdev] Error prone default memory capturing convention of blocks. |
3:31PM |
5 |
[LLVMdev] Handling SRet on Windows x86 |
3:24PM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
3:18PM |
3 |
[LLVMdev] [llvm-commits] patch to enable response file support in ParseCommandLineOptions |
3:14PM |
0 |
[LLVMdev] adding support for -ffixed-<reg> |
3:03PM |
0 |
[LLVMdev] Handling SRet on Windows x86 |
2:56PM |
2 |
[LLVMdev] adding support for -ffixed-<reg> |
2:36PM |
0 |
[LLVMdev] adding support for -ffixed-<reg> |
2:34PM |
4 |
[LLVMdev] Handling SRet on Windows x86 |
2:28PM |
7 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
2:23PM |
5 |
[LLVMdev] adding support for -ffixed-<reg> |
1:00PM |
0 |
[LLVMdev] lld Atoms from STT_SECTION type symbols. |
11:30AM |
1 |
[LLVMdev] Unreachable block eliminate problem. |
10:27AM |
0 |
[LLVMdev] Cambridge University LLVM Afternoon |
10:21AM |
0 |
[LLVMdev] LLVM IR and CFG |
10:09AM |
4 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
9:53AM |
0 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
9:35AM |
2 |
[LLVMdev] Protecting a register value in the LLVM backend |
9:12AM |
0 |
[LLVMdev] interesting possible compiler bug |
8:22AM |
0 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
7:52AM |
0 |
[LLVMdev] How best to represent assume statements in LLVM IR? |
7:46AM |
3 |
[LLVMdev] interesting possible compiler bug |
7:40AM |
0 |
[LLVMdev] [PROPOSAL] Adding support for -fstack-protector-strong |
7:39AM |
0 |
[LLVMdev] JIT and libgcc_s.so |
7:33AM |
0 |
[LLVMdev] [PATCH] with no response: Bug 13163 - BlockAddress instruction with use from the global context is damaged during module link |
7:04AM |
0 |
[LLVMdev] Wrong type qualifier for this pointer in case of ARM compiled binary |
5:56AM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
5:37AM |
2 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
4:58AM |
0 |
[LLVMdev] Offset to C++ structure members |
4:33AM |
2 |
[LLVMdev] Offset to C++ structure members |
4:26AM |
0 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
4:03AM |
1 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
3:33AM |
2 |
[LLVMdev] [patch] set AssemblerDialect |
2:40AM |
0 |
[LLVMdev] interesting possible compiler bug |
2:26AM |
5 |
[LLVMdev] [PROPOSAL] Adding support for -fstack-protector-strong |
1:34AM |
4 |
[LLVMdev] interesting possible compiler bug |
1:16AM |
4 |
[LLVMdev] [RFC] Parallelization metadata and intrinsics in LLVM (for OpenMP, etc.) |
1:15AM |
2 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
1:06AM |
0 |
[LLVMdev] [RFC] OpenMP Representation in LLVM IR |
12:09AM |
2 |
[LLVMdev] [PATCH / PROPOSAL] bitcode encoding that is ~15% smaller for large bitcode files... |
|
Monday October 1 2012 |
Time | Replies | Subject |
10:25PM |
0 |
[LLVMdev] LLVM Bay-area Social, October edition |
8:39PM |
3 |
[LLVMdev] How best to represent assume statements in LLVM IR? |
8:16PM |
2 |
[LLVMdev] JIT and libgcc_s.so |
6:22PM |
2 |
[LLVMdev] Wrong type qualifier for this pointer in case of ARM compiled binary |
6:04PM |
0 |
[LLVMdev] Installation problem! |
5:06PM |
0 |
[LLVMdev] JIT and libgcc_s.so |
4:36PM |
1 |
[LLVMdev] [pocl-devel] [cfe-dev] SPIR provisional specification is now available in the Khronos website |
10:09AM |
2 |
[LLVMdev] JIT and libgcc_s.so |