llvm dev - Feb 2016 - New register class and patterns

On Tue, Feb 2, 2016 at 1:41 AM, Rail Shafigulin <rail at esenciatech.com>
wrote:
>
> Let me clarify.
>>
>> I'm not sure I understand what you are saying. Let me post more
>> information.
>>
>> Here is what I have defined for Escalasetflag
>>
>> def Escalasetflag     : SDNode<"EscalaISD::SET_FLAG",
SDT_EscalaSetFlag,
>>                              [SDNPOutGlue]>;
>>
>> How come it was working before and is is not working now? Clearly
I'm
>> missing something, but I can't figure out what.
>>
>> Any help is appreciated.
>>
>>
>> --
>> Rail Shafigulin
>> Software Engineer
>> Esencia Technologies
>>
>>
>>
>> What is SDT_EscalaSetFlag?
>>
>>
> def SDT_EscalaSetFlag      : SDTypeProfile<0, 3, [SDTCisSameAs<0,
1>]>;
>
>
> --
> Rail Shafigulin
> Software Engineer
> Esencia Technologies
>

Any recommendations? Would anyone be able to point out what am I missing?

-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
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> On Feb 2, 2016, at 16:52, Rail Shafigulin <rail at esenciatech.com>
wrote:
> 
> def SDT_EscalaSetFlag      : SDTypeProfile<0, 3, [SDTCisSameAs<0,
1>]>;
I think for setting an implicit register, you still need to have 1 result here.

If you look at SDTX86CmpPTest, I think this is similar to what you are trying to
do.

-Matt
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On Tue, Feb 2, 2016 at 8:42 PM, Matt Arsenault <arsenm2 at gmail.com>
wrote:
>
> On Feb 2, 2016, at 16:52, Rail Shafigulin <rail at esenciatech.com>
wrote:
>
> def SDT_EscalaSetFlag      : SDTypeProfile<0, 3, [SDTCisSameAs<0,
1>]>;
>
>
> I think for setting an implicit register, you still need to have 1 result
> here.
>
> If you look at SDTX86CmpPTest, I think this is similar to what you are
> trying to do.
>
> -Matt
>
def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
                                          SDTCisVec<1>,
                                          SDTCisSameAs<2, 1>]>;

This is confusing to me. This tells me that there is 1 result but and 2
operands. But then it says that operands 2 and 1 are of the same type,
SDTCisSameAs<2, 1>. Given that operand numbering starts at 0, how can
there
be operands 2 and 1?

Based on the previous answer my understanding is that LLVM is complaining
because it doesn't know what register to use. What is unclear to me is why?
I already had 2 register classes before and everything was working. All
I've done is that I had added an extra class. After that LLVM started to
complain. And this is what puzzles me.

As usual, any insight into the issue and any help is greatly appreciated.

-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
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