Displaying 7 results from an estimated 7 matches for "sdtcisvec".
2016 Feb 03
2
New register class and patterns
...g an implicit register, you still need to have 1 result
> here.
>
> If you look at SDTX86CmpPTest, I think this is similar to what you are
> trying to do.
>
> -Matt
>
def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
SDTCisVec<1>,
SDTCisSameAs<2, 1>]>;
This is confusing to me. This tells me that there is 1 result but and 2
operands. But then it says that operands 2 and 1 are of the same type,
SDTCisSameAs<2, 1>. Given that operand numbering starts at 0, how...
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...// Opnds 1 and 3 have identical types.
// --> Opnd 3 (result 0?) is i1 vector
// Opnd 4 (result 1?) has pointer type.
// Opnd 1 is vector type with element type of i1.
def SDTMaskedGather: SDTypeProfile<2, 3, [ // masked gather
SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<1, 3>,
SDTCisPtrTy<4>, SDTCVecEltisVT<1, i1>, SDTCisSameNumEltsAs<0, 1>
]>;
def masked_gather : SDNode<"ISD::MGATHER", SDTMaskedGather,...
2016 Feb 03
2
New register class and patterns
On Tue, Feb 2, 2016 at 1:41 AM, Rail Shafigulin <rail at esenciatech.com>
wrote:
>
> Let me clarify.
>>
>> I'm not sure I understand what you are saying. Let me post more
>> information.
>>
>> Here is what I have defined for Escalasetflag
>>
>> def Escalasetflag : SDNode<"EscalaISD::SET_FLAG", SDT_EscalaSetFlag,
>>
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...have identical types.
> // --> Opnd 3 (result 0?) is i1 vector
> // Opnd 4 (result 1?) has pointer type.
> // Opnd 1 is vector type with element type of i1.
> def SDTMaskedGather: SDTypeProfile<2, 3, [ // masked gather
> SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<1, 3>,
> SDTCisPtrTy<4>, SDTCVecEltisVT<1, i1>, SDTCisSameNumEltsAs<0, 1>
> ]>;
>
> def masked_gather : SDNode<"ISD::MGATHER", SDTMaskedGather,
>...
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello.
Will, thanks a lot for pointing me to the MaskedGatherSDNode and mgatherv4i32. I have
to say that the definition of the "multiclass avx512_gather" from
lib/Target/X86/X86InstrAVX512.td is difficult to follow and I prefer not to use it.
I currently have some serious problems with TableGen - it gives an assertion failure:
2013 Jul 01
1
[LLVMdev] Convert the result of a vector comparison into a scalar bit mask?
When LLVM does a comparison of two vectors, in this case with 16
elements, the returned type of setcc is v16i1. The architecture I'm
targeting allows storing the result of a vector comparison as a bit
mask in a scalar register, but I'm having trouble converting the
result of setcc into a value that is usable there. For example, if I
try to AND together masks that are the results of two
2016 Feb 04
2
New register class and patterns
>
>
>
>
> def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
> SDTCisVec<1>,
> SDTCisSameAs<2, 1>]>;
>
> This is confusing to me. This tells me that there is 1 result but and 2
> operands. But then it says that operands 2 and 1 are of the same type,
> SDTCisSameAs<2, 1>. Given that operand num...