Phil Tomson via llvm-dev
2016-Sep-26 20:36 UTC
[llvm-dev] Incompatible type assertion from llvm-tblgen
I'm getting this incompatible type assertion when I run tblgen on my .td files: llvm/include/llvm/Support/Casting.h:237: typename llvm::cast_retty<X, Y*>::ret_type llvm::cast(Y*) [with X = llvm::DefInit; Y = llvm::Init; typename llvm::cast_retty<X, Y*>::ret_type = llvm::DefInit*]: Assertion `isa<X>(Val) && "cast<Ty>() argument of incompatible type!"' failed. Looks like the incompatible types are DefInit and Init. The offending line is in this definition: class LoadOpIdx< bits<7> op, string instr_asm, OperandInfo info, InstrItinClass itin=II_LOAD1_RR > // // load: r1 = mem[r2 + (r3 << sizeof(operand) ] // : FR3< op, (outs info.regClass:$r1), (ins ADDR_SHLI:$addr), //<<-this line causes assert instr_asm # "\t\t$r1, $addr, " # info.sizeStr, [(set info.regClass:$r1, (load ADDR_SHLI:$addr))], itin > { } The other related definitions are: // This class provides load/store address format selection support // class Addr< int numArgs, string funcName, dag opInfo > : Operand<i64>, ComplexPattern< i64, numArgs, funcName, [], [SDNPWantParent] > { let MIOperandInfo = opInfo; } let PrintMethod = "printMemOperand" in { def ADDR_RR : Addr< 2, "SelectAddrRegReg", (ops GPRC:$base, GPRC:$offsetreg) >; def ADDR_RI : Addr< 2, "SelectAddrRegImm", (ops GPRC:$base, i64imm:$offsetimm) >; def ADDR_SHLI : Addr< 2, "SelectAddrShlImm", (ops GPRC:$base, ( shl GPRC:$offsetreg, (i64 3))) >; } If I change the LoadOpIdx definition to: class LoadOpIdx< bits<7> op, string instr_asm, OperandInfo info, InstrItinClass itin=II_LOAD1_RR > // // load: r1 = mem[r2 + (r3 << sizeof(operand) ] // : FR3< op, (outs info.regClass:$r1), (ins ADDR_RR:$addr), //<<-this is fine instr_asm # "\t\t$r1, $addr, " # info.sizeStr, [(set info.regClass:$r1, (load ADDR_SHLI:$addr))], itin > { } I'm not sure what the difference is between the ADDR_RR and ADDR_SHLI defs that's causing this - any ideas? Is the DAG portion for ADDR_SHLI ok? ((ops GPRC:$base, ( shl GPRC:$offsetreg, (i64 3)))) Phil -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160926/24a1f3d7/attachment.html>
Krzysztof Parzyszek via llvm-dev
2016-Sep-26 20:42 UTC
[llvm-dev] Incompatible type assertion from llvm-tblgen
On 9/26/2016 3:36 PM, Phil Tomson via llvm-dev wrote:> def ADDR_SHLI : Addr< 2, "SelectAddrShlImm", > (ops GPRC:$base, ( shl GPRC:$offsetreg, (i64 3))) >;You have a dag in the list of operands. That won't work. -Krzysztof -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Phil Tomson via llvm-dev
2016-Sep-26 20:58 UTC
[llvm-dev] Incompatible type assertion from llvm-tblgen
But don't the defs for ADDR_RR and ADDR_RI also contain dags? def ADDR_RR : Addr< 2, "SelectAddrRegReg", (ops GPRC:$base, GPRC:$offsetreg) >; def ADDR_RI : Addr< 2, "SelectAddrRegImm", (ops GPRC:$base, i64imm:$offsetimm) >; Do I need to create some other intermediate node type for a shifted address? Phil On Mon, Sep 26, 2016 at 1:42 PM, Krzysztof Parzyszek via llvm-dev < llvm-dev at lists.llvm.org> wrote:> On 9/26/2016 3:36 PM, Phil Tomson via llvm-dev wrote: > >> def ADDR_SHLI : Addr< 2, "SelectAddrShlImm", >> (ops GPRC:$base, ( shl GPRC:$offsetreg, (i64 3))) >; >> > > You have a dag in the list of operands. That won't work. > > -Krzysztof > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted > by The Linux Foundation > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160926/6b623266/attachment.html>