llvm dev - May 2015 - [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics

Hi Asghar-Ahmed,

I saw your last ping - sorry, I'm away on vacation and back on Wednesday.

Generally, I'm not sure that having both absd/hadd and sad are compatible
with the discussions going on in other threads, for example my thread about
min and max.

Given that those two intrinsics are fairly trivial to match , I don't see
the need to have two different canonical forms.

James
On Mon, 4 May 2015 at 07:55, Shahid, Asghar-ahmad <
Asghar-ahmad.Shahid at amd.com> wrote:
> Hi Devs,
>
> Pinging..., as didn't get any response yet. Or shall I assume it is
> acceptable to all?
>
> Regards,
> Shahid
>
> > -----Original Message-----
> > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at
cs.uiuc.edu]
> > On Behalf Of Shahid, Asghar-ahmad
> > Sent: Friday, May 01, 2015 10:29 PM
> > To: llvmdev at cs.uiuc.edu
> > Subject: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
> >
> > Hi All,
> >
> > I would like to introduce intrinsics to generate efficient codes for
> 'absolute
> > differences', 'horizontal add'
> > and 'sum of absolute differences' Idioms used by user
programs.
> >
> > Identifying these idioms at lower level (Codegen) is complex. These
> idioms
> > can be identified in LV/SLP and vectorized using above intrinsics to
> generate
> > better code.
> >
> > Proposal:
> > 1. Add intrinsics for 'absolute differences', 'horizontal
add' and 'sum
> of
> > absolute differences' having variants of Fixed / floating point
data
> types and
> > signed/unsigned operations.
> > 2. Recognize these idioms at loop vectorizer or SLP and replace with
> > corresponding intrinsics based on the target's Backend support.
> >
> > Having these intrinsic will also help in cost modeling for these
idioms
> which is
> > complex down the lane.
> >
> > Pls find attached a patch regarding this which is incomplete &
dirty at
> this
> > moment, however, it may help in this discussion.
> >
> > Regards,
> > Shahid
> >
>
>
> _______________________________________________
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Hi James,

Thanks for your response. You are correct that matching the two intrinsic is
trivial.

My worry is regarding the query for cost calculation for specific SAD
instructions
such as ‘psad’ (X86) or ‘usad’ (ARM) in Loop Vectorizer.

In case of absd/hadd, we have to query the cost separately for both intrinsics
and the
returned cost may be bigger than actual cost of ‘psad’ or ‘usad’ instruction.
And hence vectorizer may decide not to generate these intrinsic at all.

I am not sure if my ‘worry’ is valid here, thoughts?

Regards,
Shahid

From: James Molloy [mailto:james at jamesmolloy.co.uk]
Sent: Monday, May 04, 2015 11:44 AM
To: Shahid, Asghar-ahmad; llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics

Hi Asghar-Ahmed,

I saw your last ping - sorry, I'm away on vacation and back on Wednesday.

Generally, I'm not sure that having both absd/hadd and sad are compatible
with the discussions going on in other threads, for example my thread about min
and max.

Given that those two intrinsics are fairly trivial to match , I don't see
the need to have two different canonical forms.

James
On Mon, 4 May 2015 at 07:55, Shahid, Asghar-ahmad <Asghar-ahmad.Shahid at
amd.com<mailto:Asghar-ahmad.Shahid at amd.com>> wrote:
Hi Devs,

Pinging..., as didn't get any response yet. Or shall I assume it is
acceptable to all?

Regards,
Shahid
> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu<mailto:llvmdev-bounces at
cs.uiuc.edu> [mailto:llvmdev-bounces at cs.uiuc.edu<mailto:llvmdev-bounces
at cs.uiuc.edu>]
> On Behalf Of Shahid, Asghar-ahmad
> Sent: Friday, May 01, 2015 10:29 PM
> To: llvmdev at cs.uiuc.edu<mailto:llvmdev at cs.uiuc.edu>
> Subject: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
>
> Hi All,
>
> I would like to introduce intrinsics to generate efficient codes for
'absolute
> differences', 'horizontal add'
> and 'sum of absolute differences' Idioms used by user programs.
>
> Identifying these idioms at lower level (Codegen) is complex. These idioms
> can be identified in LV/SLP and vectorized using above intrinsics to
generate
> better code.
>
> Proposal:
> 1. Add intrinsics for 'absolute differences', 'horizontal
add' and 'sum of
> absolute differences' having variants of Fixed / floating point data
types and
> signed/unsigned operations.
> 2. Recognize these idioms at loop vectorizer or SLP and replace with
> corresponding intrinsics based on the target's Backend support.
>
> Having these intrinsic will also help in cost modeling for these idioms
which is
> complex down the lane.
>
> Pls find attached a patch regarding this which is incomplete & dirty at
this
> moment, however, it may help in this discussion.
>
> Regards,
> Shahid
>

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On 4 May 2015 at 08:37, Shahid, Asghar-ahmad
<Asghar-ahmad.Shahid at amd.com> wrote:
> My worry is regarding the query for cost calculation for specific SAD
> instructions such as ‘psad’ (X86) or ‘usad’ (ARM) in Loop Vectorizer.
Hi Shahid,

The vectorizer's cost model has the ability to return different costs
for the same instruction based on the arguments (scalar/vector,
big/small, special cases), so I don't think that adding intrisics will
help you in defining the correct cost. This is true for all other
vectorizer's decisions and it works quite well.

If you find something missing, maybe we should fix the cost model, not
introduce more intrinsics.

cheers,
--renato