Displaying 20 results from an estimated 42 matches for "asghar".
2014 Dec 13
2
[LLVMdev] Vectorization factor limitation in Loop Vectorizer
...IMO, if we modify the VF calculation for targets/subtargets using TTI where higher VF is supported
The vectorizer’s scope will become wider.
Did/do you foresee any issue with this?
Thanks,
Shahid
From: Nadav Rotem [mailto:nrotem at apple.com]
Sent: Saturday, December 13, 2014 2:47 AM
To: Shahid, Asghar-ahmad
Cc: llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] Vectorization factor limitation in Loop Vectorizer
Hi Shahid,
On Dec 10, 2014, at 10:48 PM, Shahid, Asghar-ahmad <Asghar-ahmad.Shahid at amd.com<mailto:Asghar-ahmad.Shahid at amd.com>> wrote:
Hi Nadav/Devs
I am exploring Loop V...
2019 Mar 06
2
[Bug 109876] New: JIYE BHUTTO
...ct: xorg
Version: unspecified
Hardware: x86 (IA32)
OS: Windows (All)
Status: NEW
Severity: critical
Priority: medium
Component: Driver/nouveau
Assignee: nouveau at lists.freedesktop.org
Reporter: jawad.asghar at outlook.com
QA Contact: xorg-team at lists.x.org
JEY HIND!
--
You are receiving this mail because:
You are the assignee for the bug.
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2015 May 04
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
Hi Asghar-Ahmed,
I saw your last ping - sorry, I'm away on vacation and back on Wednesday.
Generally, I'm not sure that having both absd/hadd and sad are compatible
with the discussions going on in other threads, for example my thread about
min and max.
Given that those two intrinsics are fairly t...
2015 May 04
2
[LLVMdev] Load value and broadcast in LLVM
...ank you so much for your response. You suggested approach is what I am
right now using. However, it seems that the overhead is a little bit high
because we are introducing two more instructions. I was wondering if there
was a cheaper way to do it.
Best,
Zhi
On Mon, May 4, 2015 at 2:12 AM, Shahid, Asghar-ahmad <
Asghar-ahmad.Shahid at amd.com> wrote:
> Hi Zhi,
>
>
>
> If I get your question correctly, Yes, you can do it by using the
> IRBuilder’s CreateVectorSplat() API.
>
>
>
> /// \brief Return a vector value that contains \arg V broadcasted to \p
>
>...
2015 May 06
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
...mething else?
BTW, now my plan is to just add the two intrinsics for 'absolute difference'
and 'horizontal add'.
Regards,
Shahid
> -----Original Message-----
> From: Renato Golin [mailto:renato.golin at linaro.org]
> Sent: Wednesday, May 06, 2015 3:22 PM
> To: Shahid, Asghar-ahmad
> Cc: James Molloy; llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
>
> On 6 May 2015 at 06:43, Shahid, Asghar-ahmad <Asghar-
> ahmad.Shahid at amd.com> wrote:
> > That’s right. I agree with your *pattern vs complexity*...
2015 May 06
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
...*pattern vs complexity* thinking.
So I would drop llvm.sad() and go ahead with the remaining two.
Does it make sense in general?
Regards,
Shahid
> -----Original Message-----
> From: Renato Golin [mailto:renato.golin at linaro.org]
> Sent: Tuesday, May 05, 2015 8:40 PM
> To: Shahid, Asghar-ahmad
> Cc: James Molloy; llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
>
> On 5 May 2015 at 15:41, Shahid, Asghar-ahmad <Asghar-
> ahmad.Shahid at amd.com> wrote:
> > With llvm.sad() intrinsic:
> > VC1 (Vector Cost) =...
2015 May 05
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
On 4 May 2015 at 08:37, Shahid, Asghar-ahmad
<Asghar-ahmad.Shahid at amd.com> wrote:
> My worry is regarding the query for cost calculation for specific SAD
> instructions such as ‘psad’ (X86) or ‘usad’ (ARM) in Loop Vectorizer.
Hi Shahid,
The vectorizer's cost model has the ability to return different costs
for the sa...
2016 May 12
3
sum elements in the vector
...lar instruction.However, you can do it without intrinsic by pattern matching the
LLVM-IRs representing “sum of elements in vector” to your particular instruction in DAGCombiner.
Regards,
Shahid
From: Rail Shafigulin [mailto:rail at esenciatech.com]
Sent: Monday, May 09, 2016 11:59 PM
To: Shahid, Asghar-ahmad; llvm-dev
Cc: Das, Dibyendu
Subject: Re: [llvm-dev] sum elements in the vector
I'm a little confused. Here is why.
I was able to add a vector add instruction to my target without using any intrinsics and without adding any new instructions to LLVM. So here is my question: how come I man...
2014 Dec 11
2
[LLVMdev] Vectorization factor limitation in Loop Vectorizer
Hi Nadav/Devs
I am exploring Loop Vectorizer to vectorize i8 scalar operations into 8xi8 vector operation.
I was expecting the Loop Vectorizer to analyze the profitability for vectorization factor(VF) of 8,
However it is not doing so due to the widest type calculation done for the blocks inside the loop.
May be I am missing something, however, I am curious to know why Loop Vectorizer limits the
2015 May 05
1
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
...l be querying with getIntrinsicCost(ID) for these two intrinsics separately, Will VC1==VC2?
May be I am missing something obvious?
Regards,
Shahid
> -----Original Message-----
> From: Renato Golin [mailto:renato.golin at linaro.org]
> Sent: Tuesday, May 05, 2015 7:28 PM
> To: Shahid, Asghar-ahmad
> Cc: James Molloy; llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
>
> On 4 May 2015 at 08:37, Shahid, Asghar-ahmad <Asghar-
> ahmad.Shahid at amd.com> wrote:
> > My worry is regarding the query for cost calculation for...
2016 May 16
0
sum elements in the vector
...that use horizontal arithmetic
- Ability to use horizontal operations in SLPVectorizer
- Significantly easier cost modeling of vectorizing loops with reductions
in LoopVectorize
- Other things I've not thought of?
Curious what others think?
-Chandler
On Wed, May 11, 2016 at 10:07 PM Shahid, Asghar-ahmad via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> > why in order to add this particular instruction (sum elements in a
> vector) I need to add an insrinsic?
>
> Adding intrinsic is not the only way, it is one of the way and user
> WILL-NOT be required to invoke
>...
2016 May 16
4
sum elements in the vector
...me can be computed using normal vector operation, and then the final scalar value can be computed using a single horizontal operation.
MartinO
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Chandler Carruth via llvm-dev
Sent: 16 May 2016 2:16
To: Shahid, Asghar-ahmad; Rail Shafigulin; llvm-dev; Hal Finkel
Subject: Re: [llvm-dev] sum elements in the vector
I'm starting to think we should directly implement horizontal operations on vector types.
My suspicion is that coming up with a nice model for this would help us a lot with things like:
- Id...
2015 Nov 19
5
[RFC] Introducing a vector reduction add instruction.
...ve the
best result is from VF >=16.
The draft of the patch is here: http://reviews.llvm.org/D14840
I will refine the patch later and submit it for review.
thanks,
Cong
On Wed, Nov 18, 2015 at 2:45 PM, Cong Hou <congh at google.com> wrote:
> On Mon, Nov 16, 2015 at 9:31 PM, Shahid, Asghar-ahmad
> <Asghar-ahmad.Shahid at amd.com> wrote:
>> Hi Cong,
>>
>>> -----Original Message-----
>>> From: Cong Hou [mailto:congh at google.com]
>>> Sent: Tuesday, November 17, 2015 12:47 AM
>>> To: Shahid, Asghar-ahmad
>>> Cc: David Li...
2015 Apr 18
2
[LLVMdev] how can I create an SSE instrinsics sqrt?
Thanks, Shahid. It is fixed now.
On Fri, Apr 17, 2015 at 8:50 PM, Shahid, Asghar-ahmad <
Asghar-ahmad.Shahid at amd.com> wrote:
> Hi zhi,
>
>
>
> You have to also pass the value type to getDecalaration() API such as
>
>
>
> Value* sqrtv = Intrinsic::getDeclaration(M, Intrinsic::x86_sse2_sqrt_pd,
> v->getType());
>
>
>
> Regar...
2004 May 08
1
help about R
...I'm Ph.D student of psychometric at the university of
Tehran.I use R version 1.8.1. I want to upgrade the R
into higher version.I downloaded the latest version
"R-1.9.0.tgz". Unfortunately I could not to upgrade
the R. Could you tell me how I can to upgrade the
R,please?
Best regards
Asghar Minaei
=====
Yours...Asghar Minaei
2016 Apr 04
7
sum elements in the vector
My target has an instruction that adds up all elements in the vector and
stores the result in a register. I'm trying to implement it in my compiler
but I'm not sure even where to start.
I did look at other targets, but they don't seem to have anything like it (
I could be wrong. My experience with LLVM is limited, so if I missed it,
I'd appreciate if someone could point it out ).
2015 May 01
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
Hi All,
I would like to introduce intrinsics to generate efficient codes for 'absolute differences', 'horizontal add'
and 'sum of absolute differences' Idioms used by user programs.
Identifying these idioms at lower level (Codegen) is complex. These idioms can be identified in LV/SLP
and vectorized using above intrinsics to generate better code.
Proposal:
1. Add
2016 May 18
3
sum elements in the vector
...nd then the final scalar value can be computed using a single horizontal operation.
MartinO
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org <mailto:llvm-dev-bounces at lists.llvm.org> ] On Behalf Of Chandler Carruth via llvm-dev
Sent: 16 May 2016 2:16
To: Shahid, Asghar-ahmad; Rail Shafigulin; llvm-dev; Hal Finkel
Subject: Re: [llvm-dev] sum elements in the vector
I'm starting to think we should directly implement horizontal operations on vector types.
My suspicion is that coming up with a nice model for this would help us a lot with things like:
-...
2016 May 28
4
sum elements in the vector
...;
> Do you mind providing a concrete example of X86 code where an intrinsic
> was added (preferrable with filenames and line numbers)? I'm having
> difficulty tracking down the steps you provided.
>
> Any help is appreciated.
>
>
> On Mon, Apr 4, 2016 at 9:02 PM, Shahid, Asghar-ahmad <
> Asghar-ahmad.Shahid at amd.com> wrote:
>
>> Hi Rail,
>>
>>
>>
>> We had done this for generation of X86 PSAD (sum of absolute difference)
>> instruction through
>>
>> Llvm intrinsic. Doing this requires following
>>
>>...
2016 May 27
0
sum elements in the vector
Hi Shahid.
Do you mind providing a concrete example of X86 code where an intrinsic was
added (preferrable with filenames and line numbers)? I'm having difficulty
tracking down the steps you provided.
Any help is appreciated.
On Mon, Apr 4, 2016 at 9:02 PM, Shahid, Asghar-ahmad <
Asghar-ahmad.Shahid at amd.com> wrote:
> Hi Rail,
>
>
>
> We had done this for generation of X86 PSAD (sum of absolute difference)
> instruction through
>
> Llvm intrinsic. Doing this requires following
>
> 1. Define an intrinsic, xyz(), for the r...