Thursday April 30 2015 |
Time | Replies | Subject |
11:41PM |
1 |
[LLVMdev] LLVM Bay-Area Social, May edition! |
11:29PM |
1 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
9:51PM |
0 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
9:19PM |
1 |
[LLVMdev] How to declare intrinsic that takes pointer to routine? |
7:54PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
7:48PM |
2 |
[LLVMdev] SmallString + raw_svector_ostream combination should be more efficient |
7:10PM |
0 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
4:18PM |
0 |
[LLVMdev] Maintenance works in the LLVM lab |
3:59PM |
2 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
3:41PM |
2 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
3:24PM |
0 |
[LLVMdev] LLVM 3.6 homebrew core formula |
2:41PM |
0 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
2:25PM |
2 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
2:23PM |
0 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
2:06PM |
0 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
1:49PM |
17 |
[LLVMdev] libiomp, not libgomp as default library linked with -fopenmp |
1:44PM |
5 |
[LLVMdev] Code Owner for OpenMP (runtime) |
12:45PM |
1 |
[LLVMdev] SCEV Alias Analysis |
10:59AM |
0 |
[LLVMdev] Code Owner for OpenMP (runtime) |
10:49AM |
1 |
[LLVMdev] Code Owner for OpenMP (runtime) |
10:39AM |
0 |
[LLVMdev] Code Owner for OpenMP (runtime) |
9:03AM |
5 |
[LLVMdev] Code Owner for OpenMP (runtime) |
8:28AM |
2 |
[LLVMdev] LLVM 3.6 homebrew core formula |
2:58AM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
2:44AM |
2 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
2:13AM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
1:52AM |
0 |
[LLVMdev] RFC: implicit null checks in llvm |
|
Wednesday April 29 2015 |
Time | Replies | Subject |
11:36PM |
0 |
[LLVMdev] link getCopyToParts generated nodes |
11:28PM |
0 |
[LLVMdev] link getCopyToParts generated nodes |
10:45PM |
1 |
[LLVMdev] unwind move *NOW* |
10:24PM |
2 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
10:05PM |
0 |
[LLVMdev] Multiple connected components in live interval |
9:05PM |
1 |
[LLVMdev] AliasAnalysis calling failed in Pass interaction |
8:46PM |
0 |
[LLVMdev] LLVM 3.6 homebrew core formula |
8:45PM |
0 |
[LLVMdev] AliasAnalysis calling failed in Pass interaction |
8:34PM |
0 |
[LLVMdev] unwind move *NOW* |
8:27PM |
2 |
[LLVMdev] AliasAnalysis calling failed in Pass interaction |
8:21PM |
2 |
[LLVMdev] LLVM 3.6 homebrew core formula |
8:09PM |
3 |
[LLVMdev] unwind move *NOW* |
7:09PM |
0 |
[LLVMdev] [cfe-dev] [Openmp-dev] [RFC] OpenMP offload infrastructure (iteration 2) |
7:01PM |
0 |
[LLVMdev] [RFC][Float2Int] Converting (fcmp Pred, x * F, y) to (ICmp ...) |
7:00PM |
2 |
[LLVMdev] [RFC][Float2Int] Converting (fcmp Pred, x * F, y) to (ICmp ...) |
6:43PM |
0 |
[LLVMdev] AArch64 bot unstable |
6:41PM |
1 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
6:40PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
6:33PM |
0 |
[LLVMdev] [RFC][Float2Int] Converting (fcmp Pred, x * F, y) to (ICmp ...) |
6:31PM |
3 |
[LLVMdev] AArch64 bot unstable |
6:28PM |
0 |
[LLVMdev] [cfe-dev] [Openmp-dev] [RFC] OpenMP offload infrastructure (iteration 2) |
6:19PM |
0 |
[LLVMdev] AArch64 bot unstable |
6:11PM |
2 |
[LLVMdev] [Openmp-dev] [RFC] OpenMP offload infrastructure (iteration 2) |
5:55PM |
2 |
[LLVMdev] AArch64 bot unstable |
5:33PM |
0 |
[LLVMdev] Assertion failure (Bug 21609) in DwarfFile.cpp |
5:29PM |
2 |
[LLVMdev] Assertion failure (Bug 21609) in DwarfFile.cpp |
5:26PM |
1 |
[LLVMdev] Preserving the order of WRITE_REGISTER, READ_REGISTER in IR and ISelDAG |
5:19PM |
0 |
[LLVMdev] IC profiling infrastructure |
5:06PM |
2 |
[LLVMdev] [RFC][Float2Int] Converting (fcmp Pred, x * F, y) to (ICmp ...) |
5:05PM |
0 |
[LLVMdev] AArch64 bot unstable |
4:48PM |
2 |
[LLVMdev] AArch64 bot unstable |
4:47PM |
0 |
[LLVMdev] AArch64 bot unstable |
4:32PM |
2 |
[LLVMdev] AArch64 bot unstable |
3:47PM |
0 |
[LLVMdev] [RFC] OpenMP offload infrastructure (iteration 2) |
3:23PM |
1 |
[LLVMdev] Intrinsics property which cannot be modified by the optimiser. |
3:21PM |
2 |
[LLVMdev] [LoopVectorizer] Missed vectorization opportunities caused by sext/zext operations |
1:44PM |
1 |
[LLVMdev] AArch64 bot unstable |
1:40PM |
2 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
1:31PM |
0 |
[LLVMdev] AArch64 bot unstable |
1:31PM |
0 |
[LLVMdev] AArch64 bot unstable |
1:27PM |
3 |
[LLVMdev] AArch64 bot unstable |
1:16PM |
0 |
[LLVMdev] AArch64 bot unstable |
11:06AM |
4 |
[LLVMdev] AArch64 bot unstable |
5:35AM |
1 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
4:31AM |
0 |
[LLVMdev] IC profiling infrastructure |
3:38AM |
1 |
[LLVMdev] GCC compatibility code coverage issue . |
2:14AM |
0 |
[LLVMdev] Assertion failure (Bug 21609) in DwarfFile.cpp |
2:07AM |
2 |
[LLVMdev] Assertion failure (Bug 21609) in DwarfFile.cpp |
12:59AM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
12:36AM |
3 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
12:24AM |
4 |
[LLVMdev] IC profiling infrastructure |
12:19AM |
0 |
[LLVMdev] RFC: implicit null checks in llvm |
12:13AM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
|
Tuesday April 28 2015 |
Time | Replies | Subject |
11:26PM |
2 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
10:51PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
9:41PM |
4 |
[LLVMdev] Allow default member initializers in LLVM |
9:08PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
7:48PM |
0 |
[LLVMdev] Building compiler-rt for foreign target? |
7:16PM |
2 |
[LLVMdev] Building compiler-rt for foreign target? |
6:54PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
6:18PM |
2 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
6:09PM |
2 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
6:00PM |
3 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
5:52PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
5:46PM |
2 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
5:15PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
5:14PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
5:09PM |
0 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
4:56PM |
9 |
[LLVMdev] RFC: Machine Level IR text-based serialization format |
3:14PM |
1 |
[LLVMdev] Help using getSUnit |
3:02PM |
0 |
[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely? |
3:02PM |
0 |
[LLVMdev] GCC compatibility code coverage issue . |
2:55PM |
1 |
[LLVMdev] Lowering intrinsic that return an int1 |
2:42PM |
0 |
[LLVMdev] Lowering intrinsic that return an int1 |
1:46PM |
0 |
[LLVMdev] [cfe-dev] GCC compatibility code coverage issue . |
1:43PM |
1 |
[LLVMdev] [cfe-dev] 3.6.1 Release - Patches due before May 4 - Testers needed |
11:02AM |
2 |
[LLVMdev] Lowering intrinsic that return an int1 |
10:52AM |
4 |
[LLVMdev] GCC compatibility code coverage issue . |
9:43AM |
0 |
[LLVMdev] MCJIT longjmp failure on Win64 - was Invalid or unaligned stack exception on Windows |
8:59AM |
2 |
[LLVMdev] MCJIT longjmp failure on Win64 - was Invalid or unaligned stack exception on Windows |
8:50AM |
0 |
[LLVMdev] Lowering intrinsic that return an int1 |
8:18AM |
2 |
[LLVMdev] Lowering intrinsic that return an int1 |
12:51AM |
1 |
[LLVMdev] bytecode stripping from clang -emit-llvm |
12:47AM |
0 |
[LLVMdev] alias set collapse and LICM |
12:32AM |
2 |
[LLVMdev] alias set collapse and LICM |
|
Monday April 27 2015 |
Time | Replies | Subject |
11:23PM |
0 |
[LLVMdev] Invalid or unaligned stack exception on Windows |
11:21PM |
0 |
[LLVMdev] alias set collapse and LICM |
11:05PM |
2 |
[LLVMdev] RFC: canonical icmp predicates? |
10:55PM |
1 |
[LLVMdev] alias set collapse and LICM |
10:49PM |
0 |
[LLVMdev] alias set collapse and LICM |
10:44PM |
6 |
[LLVMdev] alias set collapse and LICM |
10:27PM |
0 |
[LLVMdev] alias set collapse and LICM |
10:20PM |
1 |
[LLVMdev] seeking a mailing list for llvm ports |
10:19PM |
0 |
[LLVMdev] [cfe-dev] 3.6.1 Release - Patches due before May 4 - Testers needed |
10:18PM |
0 |
[LLVMdev] __eh_frame info changes in Clang? |
10:08PM |
2 |
[LLVMdev] __eh_frame info changes in Clang? |
10:01PM |
0 |
[LLVMdev] Invalid or unaligned stack exception on Windows |
9:58PM |
4 |
[LLVMdev] alias set collapse and LICM |
9:19PM |
0 |
[LLVMdev] seeking a mailing list for llvm ports |
9:06PM |
0 |
[LLVMdev] __eh_frame info changes in Clang? |
8:49PM |
2 |
[LLVMdev] seeking a mailing list for llvm ports |
8:35PM |
1 |
[LLVMdev] [cfe-dev] 3.6.1 Release - Patches due before May 4 - Testers needed |
6:04PM |
4 |
[LLVMdev] Invalid or unaligned stack exception on Windows |
4:45PM |
1 |
[LLVMdev] How to dynamically profile LLVM IR, i.e., doing things along the program execution? |
3:41PM |
0 |
[LLVMdev] forwarding alias set |
12:40PM |
0 |
[LLVMdev] LLVM Weekly - #69, Apr 27th 2015 |
8:37AM |
0 |
[LLVMdev] Machine Level IR text-based serialization |
|
Sunday April 26 2015 |
Time | Replies | Subject |
7:54PM |
0 |
[LLVMdev] Floating point atomic load and add |
2:50PM |
0 |
[LLVMdev] How to compile a simple C program with clang on Windows 8.1? |
1:31PM |
0 |
[LLVMdev] Floating point atomic load and add |
7:50AM |
3 |
[LLVMdev] How to compile a simple C program with clang on Windows 8.1? |
6:58AM |
0 |
[LLVMdev] convert LLVM IR to another IR without SSA |
4:52AM |
0 |
[LLVMdev] alias analysis on llvm internal globals |
|
Saturday April 25 2015 |
Time | Replies | Subject |
11:32PM |
3 |
[LLVMdev] alias analysis on llvm internal globals |
10:20PM |
0 |
[LLVMdev] Heads-up: splitting out C++-specific parts of TSan and MSan runtimes |
10:07PM |
0 |
[LLVMdev] Invalid or unaligned stack exception on Windows |
8:19PM |
2 |
[LLVMdev] Invalid or unaligned stack exception on Windows |
2:51PM |
1 |
[LLVMdev] convert LLVM IR to another IR without SSA |
1:06PM |
0 |
[LLVMdev] Target-independent machine-code analysis pass on LLVM |
12:50PM |
1 |
[LLVMdev] Target-independent machine-code analysis pass on LLVM |
2:16AM |
0 |
[LLVMdev] Speculative loads and alignment |
|
Friday April 24 2015 |
Time | Replies | Subject |
11:43PM |
0 |
[LLVMdev] convert LLVM IR to another IR without SSA |
11:14PM |
2 |
[LLVMdev] RFC: implicit null checks in llvm |
9:55PM |
2 |
[LLVMdev] Floating point atomic load and add |
9:25PM |
0 |
[LLVMdev] Floating point atomic load and add |
9:24PM |
0 |
[LLVMdev] RFC: implicit null checks in llvm |
9:15PM |
3 |
[LLVMdev] Floating point atomic load and add |
9:06PM |
2 |
[LLVMdev] Multiple connected components in live interval |
9:06PM |
0 |
[LLVMdev] Floating point atomic load and add |
8:55PM |
2 |
[LLVMdev] convert LLVM IR to another IR without SSA |
8:53PM |
4 |
[LLVMdev] Floating point atomic load and add |
8:49PM |
1 |
[LLVMdev] unwind move *NOW* |
8:32PM |
0 |
[LLVMdev] unwind move *NOW* |
8:19PM |
0 |
[LLVMdev] RFC: Metadata attachments to function definitions |
8:19PM |
0 |
[LLVMdev] convert LLVM IR to another IR without SSA |
8:10PM |
0 |
[LLVMdev] Loss of precision with very large branch weights |
7:51PM |
1 |
[LLVMdev] Loss of precision with very large branch weights |
7:44PM |
2 |
[LLVMdev] Loss of precision with very large branch weights |
7:40PM |
0 |
[LLVMdev] Loss of precision with very large branch weights |
7:29PM |
0 |
[LLVMdev] Loss of precision with very large branch weights |
7:28PM |
3 |
[LLVMdev] Loss of precision with very large branch weights |
7:21PM |
0 |
[LLVMdev] Loss of precision with very large branch weights |
7:17PM |
2 |
[LLVMdev] convert LLVM IR to another IR without SSA |
7:14PM |
3 |
[LLVMdev] unwind move *NOW* |
6:46PM |
2 |
[LLVMdev] Loss of precision with very large branch weights |
6:44PM |
0 |
[LLVMdev] Loss of precision with very large branch weights |
6:36PM |
2 |
[LLVMdev] Loss of precision with very large branch weights |
6:32PM |
0 |
[LLVMdev] Loss of precision with very large branch weights |
6:18PM |
5 |
[LLVMdev] Loss of precision with very large branch weights |
5:44PM |
0 |
[LLVMdev] LLVM buildmaster will be restarted tonight |
4:51PM |
2 |
[LLVMdev] Speculative loads and alignment |
4:13PM |
1 |
[LLVMdev] MIPS - Filling delay slots |
3:51PM |
1 |
[LLVMdev] Proposed Mips patches for LLVM 3.6.1 |
3:26PM |
2 |
[LLVMdev] RFC: implicit null checks in llvm |
3:11PM |
0 |
[LLVMdev] MISched: What does it mean when PressureChange objects are not valid? |
2:37PM |
0 |
[LLVMdev] [cfe-dev] unofficial github llvm-mirror: announce, frequency update, ownership |
10:46AM |
0 |
[LLVMdev] SmallString + raw_svector_ostream combination should be more efficient |
10:17AM |
1 |
[LLVMdev] C API for hooking MCJIT's resolving of out-of-module references? |
8:53AM |
2 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
5:56AM |
2 |
[LLVMdev] [cfe-dev] unofficial github llvm-mirror: announce, frequency update, ownership |
5:26AM |
1 |
[LLVMdev] undefined reference to 'llvm.x86.sse2.sqrt.pd.v2f64' |
12:17AM |
0 |
[LLVMdev] RFC: implicit null checks in llvm |
|
Thursday April 23 2015 |
Time | Replies | Subject |
11:07PM |
2 |
[LLVMdev] RFC: implicit null checks in llvm |
10:31PM |
0 |
[LLVMdev] RFC: implicit null checks in llvm |
8:46PM |
0 |
[LLVMdev] RFC: implicit null checks in llvm |
8:37PM |
0 |
[LLVMdev] unofficial github llvm-mirror: announce, frequency update, ownership |
8:29PM |
1 |
[LLVMdev] RFC: implicit null checks in llvm |
5:41PM |
1 |
[LLVMdev] RFC: Missing canonicalization in LLVM |
5:28PM |
0 |
[LLVMdev] RFC: Missing canonicalization in LLVM |
5:18PM |
4 |
[LLVMdev] RFC: implicit null checks in llvm |
4:33PM |
0 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
4:07PM |
2 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
2:09PM |
0 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
1:17PM |
2 |
[LLVMdev] RFC: Missing canonicalization in LLVM |
1:03PM |
2 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
12:21PM |
0 |
[LLVMdev] High-level software pipelining pass |
12:14PM |
0 |
[LLVMdev] IRBuilder and "ad hoc" optimizations |
11:57AM |
0 |
[LLVMdev] IRBuilder and "ad hoc" optimizations |
9:30AM |
3 |
[LLVMdev] Buildbot for Windows native LLVM/Clang testing |
9:26AM |
0 |
[LLVMdev] Buildbot for Windows native LLVM/Clang testing |
9:19AM |
2 |
[LLVMdev] Buildbot for Windows native LLVM/Clang testing |
9:13AM |
0 |
[LLVMdev] Buildbot for Windows native LLVM/Clang testing |
9:08AM |
2 |
[LLVMdev] Buildbot for Windows native LLVM/Clang testing |
8:50AM |
4 |
[LLVMdev] IRBuilder and "ad hoc" optimizations |
8:39AM |
0 |
[LLVMdev] Questions about C as used/implemented in practice |
7:11AM |
0 |
[LLVMdev] Missed vectorization opportunities? |
6:44AM |
0 |
[LLVMdev] RFC: implicit null checks in llvm |
6:33AM |
1 |
[LLVMdev] Adding MachineOperands that are not part of MCInstrDesc. |
5:05AM |
5 |
[LLVMdev] RFC: implicit null checks in llvm |
3:30AM |
1 |
[LLVMdev] MCJIT fully position independent code, and the runtime linker |
2:10AM |
0 |
[LLVMdev] Operands Not processed Assert |
1:39AM |
1 |
[LLVMdev] Get precise line/column debug info from LLVM IR |
1:31AM |
0 |
[LLVMdev] unwind's permanent residence |
1:20AM |
0 |
[LLVMdev] Get precise line/column debug info from LLVM IR |
1:09AM |
2 |
[LLVMdev] Get precise line/column debug info from LLVM IR |
|
Wednesday April 22 2015 |
Time | Replies | Subject |
8:47PM |
0 |
[LLVMdev] Function calls only being JIT'd once by Kaleidoscope with MCJIT? |
6:44PM |
1 |
[LLVMdev] Missed vectorization opportunities? |
5:00PM |
1 |
[LLVMdev] unwind's permanent residence |
4:32PM |
0 |
[LLVMdev] Multiple connected components in live interval |
4:04PM |
0 |
[LLVMdev] unwind's permanent residence |
3:29PM |
0 |
[LLVMdev] Missed vectorization opportunities? |
3:12PM |
0 |
[LLVMdev] Adding MachineOperands that are not part of MCInstrDesc. |
2:48PM |
2 |
[LLVMdev] Adding MachineOperands that are not part of MCInstrDesc. |
11:35AM |
1 |
[LLVMdev] Missed vectorization opportunities? |
11:16AM |
0 |
[LLVMdev] Missed vectorization opportunities? |
11:01AM |
4 |
[LLVMdev] Missed vectorization opportunities? |
10:17AM |
4 |
[LLVMdev] unwind's permanent residence |
10:12AM |
0 |
[LLVMdev] unwind's permanent residence |
6:53AM |
0 |
[LLVMdev] what is the Line number of Phi Node with addr2line |
6:49AM |
2 |
[LLVMdev] Multiple connected components in live interval |
5:23AM |
3 |
[LLVMdev] what is the Line number of Phi Node with addr2line |
5:14AM |
0 |
[LLVMdev] what is the Line number of Phi Node with addr2line |
5:10AM |
3 |
[LLVMdev] what is the Line number of Phi Node with addr2line |
4:37AM |
0 |
[LLVMdev] Use clang to generate LLVM IR with -O3, how to visit these load operations after -reg2mem |
4:29AM |
2 |
[LLVMdev] Use clang to generate LLVM IR with -O3, how to visit these load operations after -reg2mem |
4:24AM |
0 |
[LLVMdev] what is the Line number of Phi Node with addr2line |
4:12AM |
2 |
[LLVMdev] what is the Line number of Phi Node with addr2line |
4:11AM |
0 |
[LLVMdev] Use clang to generate LLVM IR with -O3, how to visit these load operations after -reg2mem |
3:34AM |
2 |
[LLVMdev] Use clang to generate LLVM IR with -O3, how to visit these load operations after -reg2mem |
2:40AM |
2 |
[LLVMdev] unwind's permanent residence |
|
Tuesday April 21 2015 |
Time | Replies | Subject |
10:43PM |
0 |
[LLVMdev] what's the best way to insert an instruction after the current instruction |
10:40PM |
2 |
[LLVMdev] what's the best way to insert an instruction after the current instruction |
10:36PM |
0 |
[LLVMdev] what's the best way to insert an instruction after the current instruction |
10:36PM |
0 |
[LLVMdev] Using an alias analysis pass |
10:17PM |
2 |
[LLVMdev] what's the best way to insert an instruction after the current instruction |
10:11PM |
2 |
[LLVMdev] Function calls only being JIT'd once by Kaleidoscope with MCJIT? |
10:07PM |
0 |
[LLVMdev] Function calls only being JIT'd once by Kaleidoscope with MCJIT? |
9:52PM |
2 |
[LLVMdev] Using an alias analysis pass |
8:54PM |
0 |
[LLVMdev] Machine Level IR text-based serialization |
6:00PM |
0 |
[LLVMdev] RFC: Missing canonicalization in LLVM |
5:35PM |
0 |
[LLVMdev] Multiple connected components in live interval |
5:30PM |
0 |
[LLVMdev] libclang_rt.asan-x86_64.a: No such file or directory |
5:12PM |
6 |
[LLVMdev] Machine Level IR text-based serialization |
4:34PM |
1 |
[LLVMdev] LLVM project: SMACK Software Verifier |
4:18PM |
2 |
[LLVMdev] RFC: Missing canonicalization in LLVM |
4:16PM |
2 |
[LLVMdev] Function calls only being JIT'd once by Kaleidoscope with MCJIT? |
4:15PM |
0 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
3:54PM |
2 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
3:07PM |
1 |
[LLVMdev] Function calls only being JIT'd once by Kaleidoscope with MCJIT? |
2:40PM |
2 |
[LLVMdev] Multiple connected components in live interval |
2:26PM |
0 |
[LLVMdev] Function calls only being JIT'd once by Kaleidoscope with MCJIT? |
12:39PM |
0 |
[LLVMdev] Multiple connected components in live interval |
12:35PM |
3 |
[LLVMdev] libclang_rt.asan-x86_64.a: No such file or directory |
8:51AM |
0 |
[LLVMdev] LLVM Weekly - #68, Apr 20th 2015 |
6:29AM |
1 |
[LLVMdev] what's meaning of the last field of an LLVM intrinsic instrucation |
6:21AM |
0 |
[LLVMdev] what's meaning of the last field of an LLVM intrinsic instrucation |
5:57AM |
2 |
[LLVMdev] what's meaning of the last field of an LLVM intrinsic instrucation |
4:21AM |
2 |
[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely? |
2:03AM |
1 |
[LLVMdev] link issue with InitializeNativeTarget |
|
Monday April 20 2015 |
Time | Replies | Subject |
10:57PM |
0 |
[LLVMdev] Does LLVM optimize rudimentary i16 -> i32 conversions |
10:44PM |
1 |
[LLVMdev] ConstantFolding code owner nomination |
9:10PM |
2 |
[LLVMdev] SmallString + raw_svector_ostream combination should be more efficient |
8:49PM |
2 |
[LLVMdev] [lld] Linker cannot handle sections with non-unique names |
8:44PM |
0 |
[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely? |
8:33PM |
2 |
[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely? |
8:25PM |
0 |
[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely? |
8:19PM |
3 |
[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely? |
8:11PM |
0 |
[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely? |
8:00PM |
3 |
[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely? |
7:17PM |
0 |
[LLVMdev] SmallString + raw_svector_ostream combination should be more efficient |
6:45PM |
0 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
6:09PM |
2 |
[LLVMdev] question about alignment of structures on the stack (arm 32) |
5:44PM |
1 |
[LLVMdev] RFC: Metadata attachments to function definitions |
5:18PM |
2 |
[LLVMdev] Multiple connected components in live interval |
5:01PM |
0 |
[LLVMdev] ConstantFolding code owner nomination |
4:37PM |
0 |
[LLVMdev] More code owners needed |
4:04PM |
2 |
[LLVMdev] ConstantFolding code owner nomination |
4:01PM |
4 |
[LLVMdev] More code owners needed |
3:43PM |
1 |
[LLVMdev] CodeGen runtime tests |
3:19PM |
0 |
[LLVMdev] SmallString + raw_svector_ostream combination should be more efficient |
3:17PM |
0 |
[LLVMdev] CodeGen runtime tests |
2:59PM |
0 |
[LLVMdev] [lld] Linker cannot handle sections with non-unique names |
1:07PM |
2 |
[LLVMdev] CodeGen runtime tests |
11:03AM |
0 |
[LLVMdev] Multiple connected components in live interval |
8:34AM |
4 |
[LLVMdev] [lld] Linker cannot handle sections with non-unique names |
6:25AM |
1 |
[LLVMdev] ORC jit example (was: refs to LLVM consultants) |
2:22AM |
0 |
[LLVMdev] Web server restart at 9:30 PDT |
12:36AM |
0 |
[LLVMdev] how can I create an SSE instrinsics sqrt? |
|
Sunday April 19 2015 |
Time | Replies | Subject |
10:44PM |
0 |
[LLVMdev] [lld] Linker cannot handle sections with non-unique names |
8:59PM |
0 |
[LLVMdev] global allocation IR instruction |
8:38PM |
3 |
[LLVMdev] global allocation IR instruction |
4:09PM |
0 |
[LLVMdev] function pointer alias analysis |
2:40PM |
6 |
[LLVMdev] SmallString + raw_svector_ostream combination should be more efficient |
5:56AM |
0 |
[LLVMdev] remove redundant load by GVN() does not work |
3:45AM |
1 |
[LLVMdev] Code template for creating an llvm module from scratch |
3:32AM |
2 |
[LLVMdev] remove redundant load by GVN() does not work |
1:45AM |
0 |
[LLVMdev] LLVM IR for inline functions |
1:36AM |
2 |
[LLVMdev] LLVM IR for inline functions |
12:16AM |
2 |
[LLVMdev] function pointer alias analysis |
|
Saturday April 18 2015 |
Time | Replies | Subject |
11:52AM |
4 |
[LLVMdev] [lld] Linker cannot handle sections with non-unique names |
4:00AM |
2 |
[LLVMdev] Does LLVM optimize rudimentary i16 -> i32 conversions |
3:52AM |
2 |
[LLVMdev] how can I create an SSE instrinsics sqrt? |
3:50AM |
0 |
[LLVMdev] how can I create an SSE instrinsics sqrt? |
2:59AM |
0 |
[LLVMdev] RFC: Metadata attachments to function definitions |
2:15AM |
2 |
[LLVMdev] RFC: Metadata attachments to function definitions |
12:37AM |
1 |
[LLVMdev] Why would one use SExt vs CreateIntCast |
12:21AM |
2 |
[LLVMdev] how can I create an SSE instrinsics sqrt? |
12:19AM |
0 |
[LLVMdev] how can I create an SSE instrinsics sqrt? |
|
Friday April 17 2015 |
Time | Replies | Subject |
11:24PM |
1 |
[LLVMdev] RFC: Indirect Call Promotion LLVM Pass |
10:46PM |
0 |
[LLVMdev] RFC: Indirect Call Promotion LLVM Pass |
9:13PM |
3 |
[LLVMdev] RFC: Indirect Call Promotion LLVM Pass |
7:28PM |
0 |
[LLVMdev] how to use "new instruction()" |
7:22PM |
2 |
[LLVMdev] how to use "new instruction()" |
7:17PM |
0 |
[LLVMdev] how to use "new instruction()" |
5:48PM |
2 |
[LLVMdev] how to use "new instruction()" |
4:52PM |
2 |
[LLVMdev] Multiple connected components in live interval |
2:17PM |
0 |
[LLVMdev] Multiple connected components in live interval |
8:56AM |
0 |
[LLVMdev] how to use "new instruction()" |
8:16AM |
0 |
[LLVMdev] Is bitcast now needed in LLVM? |
8:14AM |
2 |
[LLVMdev] Is bitcast now needed in LLVM? |
8:04AM |
0 |
[LLVMdev] Is bitcast now needed in LLVM? |
7:43AM |
3 |
[LLVMdev] Is bitcast now needed in LLVM? |
7:43AM |
2 |
[LLVMdev] how to use "new instruction()" |
6:55AM |
0 |
[LLVMdev] how to use "new instruction()" |
6:40AM |
2 |
[LLVMdev] how to use "new instruction()" |
6:38AM |
0 |
[LLVMdev] how to use "new instruction()" |
4:57AM |
1 |
[LLVMdev] Padding in Aggregates Useful ? |
3:52AM |
2 |
[LLVMdev] how to use "new instruction()" |
3:32AM |
0 |
[LLVMdev] how to use "new instruction()" |
2:54AM |
1 |
[LLVMdev] where should volatileness really live in the AA API? |
2:12AM |
1 |
[LLVMdev] where should volatileness really live in the AA API? |
2:05AM |
3 |
[LLVMdev] how to use "new instruction()" |
1:46AM |
1 |
[LLVMdev] LazyValueInfo.getPredicateAt |
1:31AM |
0 |
[LLVMdev] where should volatileness really live in the AA API? |
1:16AM |
0 |
[LLVMdev] how to use "new instruction()" |
12:53AM |
2 |
[LLVMdev] how to use "new instruction()" |
12:48AM |
0 |
[LLVMdev] how to use "new instruction()" |
12:38AM |
2 |
[LLVMdev] how to use "new instruction()" |
12:09AM |
0 |
[LLVMdev] bytecode stripping from clang -emit-llvm |
|
Thursday April 16 2015 |
Time | Replies | Subject |
11:25PM |
2 |
[LLVMdev] Multiple connected components in live interval |
10:50PM |
0 |
[LLVMdev] Multiple connected components in live interval |
10:00PM |
0 |
[LLVMdev] MS fork |
9:24PM |
0 |
[LLVMdev] RFC: Metadata attachments to function definitions |
9:01PM |
0 |
[LLVMdev] [cfe-dev] A problem with names that can not be demangled. |
8:46PM |
0 |
[LLVMdev] [cfe-dev] A problem with names that can not be demangled. |
8:43PM |
2 |
[LLVMdev] bytecode stripping from clang -emit-llvm |
8:41PM |
0 |
[LLVMdev] About the "debugger target" |
8:24PM |
1 |
[LLVMdev] Code review for gather and scatter intrinsics |
7:48PM |
0 |
[LLVMdev] Code review for gather and scatter intrinsics |
7:17PM |
2 |
[LLVMdev] Code review for gather and scatter intrinsics |
7:15PM |
2 |
[LLVMdev] RFC: Metadata attachments to function definitions |
6:21PM |
0 |
[LLVMdev] ORC jit example (was: refs to LLVM consultants) |
6:19PM |
1 |
[LLVMdev] LazyValueInfo.getPredicateAt |
5:35PM |
0 |
[LLVMdev] Exception filter IR model |
5:27PM |
0 |
[LLVMdev] LazyValueInfo.getPredicateAt |
5:05PM |
2 |
[LLVMdev] Exception filter IR model |
5:04PM |
2 |
[LLVMdev] MS fork |
3:59PM |
0 |
[LLVMdev] Record does not have a field named `SoftFail' |
3:31PM |
1 |
[LLVMdev] How to change the linker of clang |
2:49PM |
1 |
[LLVMdev] How to remove a pesky store? |
2:44PM |
1 |
[LLVMdev] CPU information in the LLVMTargetMachine constructor |
2:24PM |
0 |
[LLVMdev] CPU information in the LLVMTargetMachine constructor |
2:17PM |
0 |
[LLVMdev] Code review for gather and scatter intrinsics |
2:08PM |
2 |
[LLVMdev] ORC jit example (was: refs to LLVM consultants) |
1:58PM |
2 |
[LLVMdev] Multiple connected components in live interval |
1:44PM |
2 |
[LLVMdev] Code review for gather and scatter intrinsics |
1:07PM |
2 |
[LLVMdev] CPU information in the LLVMTargetMachine constructor |
12:22PM |
3 |
[LLVMdev] LazyValueInfo.getPredicateAt |
8:46AM |
0 |
[LLVMdev] double* to <2 x double>* |
7:46AM |
3 |
[LLVMdev] double* to <2 x double>* |
6:15AM |
0 |
[LLVMdev] Compile SPEC2006 with clang-3.2, multi definition errors. |
6:00AM |
2 |
[LLVMdev] Compile SPEC2006 with clang-3.2, multi definition errors. |
2:06AM |
0 |
[LLVMdev] error building LLVM |
12:59AM |
0 |
[LLVMdev] where is type symbol table now |
12:01AM |
2 |
[LLVMdev] [RuntimeDyld] Heads up non-X86 RuntimeDyldELF users |
|
Wednesday April 15 2015 |
Time | Replies | Subject |
10:32PM |
2 |
[LLVMdev] About the "debugger target" |
9:16PM |
0 |
[LLVMdev] How to do bitcast for double to <2 x double> |
9:13PM |
1 |
[LLVMdev] How to do bitcast for double to <2 x double> |
8:57PM |
2 |
[LLVMdev] How to do bitcast for double to <2 x double> |
8:03PM |
0 |
[LLVMdev] How to do bitcast for double to <2 x double> |
7:50PM |
2 |
[LLVMdev] where is type symbol table now |
7:22PM |
0 |
[LLVMdev] RFC building a target MCAsmParser |
6:51PM |
2 |
[LLVMdev] How to do bitcast for double to <2 x double> |
6:48PM |
0 |
[LLVMdev] MS fork |
5:13PM |
0 |
[LLVMdev] Instruction combiner multiplication canonicalization |
5:08PM |
2 |
[LLVMdev] RFC: Metadata attachments to function definitions |
5:06PM |
0 |
[LLVMdev] RFC: Metadata attachments to function definitions |
5:03PM |
0 |
[LLVMdev] RFC: Metadata attachments to function definitions |
4:55PM |
0 |
[LLVMdev] RFC: Metadata attachments to function definitions |
4:46PM |
2 |
[LLVMdev] RFC: Metadata attachments to function definitions |
4:08PM |
0 |
[LLVMdev] ORC jit example (was: refs to LLVM consultants) |
3:59PM |
0 |
[LLVMdev] RFC: Metadata attachments to function definitions |
3:11PM |
3 |
[LLVMdev] RFC: Metadata attachments to function definitions |
2:01PM |
2 |
[LLVMdev] MS fork |
10:54AM |
2 |
[LLVMdev] ORC jit example (was: refs to LLVM consultants) |
10:14AM |
0 |
[LLVMdev] MS fork |
9:05AM |
0 |
[LLVMdev] enhancing tbaa alias information for array accesses. |
8:52AM |
2 |
[LLVMdev] Instruction combiner multiplication canonicalization |
5:59AM |
4 |
[LLVMdev] RFC: Metadata attachments to function definitions |
5:12AM |
2 |
[LLVMdev] MS fork |
4:33AM |
2 |
[LLVMdev] RFC: Metadata attachments to function definitions |
2:03AM |
2 |
[LLVMdev] MISched: Difference between Latency and ResourceCycles |
|
Tuesday April 14 2015 |
Time | Replies | Subject |
8:51PM |
0 |
[LLVMdev] [cfe-dev] A problem with names that can not be demangled. |
7:44PM |
5 |
[LLVMdev] [cfe-dev] A problem with names that can not be demangled. |
6:21PM |
0 |
[LLVMdev] RFC building a target MCAsmParser |
6:19PM |
0 |
[LLVMdev] LLVM buildmaster will be unavailable for short time |
6:16PM |
0 |
[LLVMdev] RFC building a target MCAsmParser |
5:58PM |
7 |
[LLVMdev] RFC building a target MCAsmParser |
4:10PM |
0 |
[LLVMdev] [RFC] Setting preserve-bc-use-list-order=true by default |
4:06PM |
2 |
[LLVMdev] [RFC] Setting preserve-bc-use-list-order=true by default |
2:24PM |
0 |
[LLVMdev] refs to LLVM consultants |
6:31AM |
1 |
[LLVMdev] loop strength reduction and zext/sext formulae |
4:53AM |
0 |
[LLVMdev] What is the best tool for dumping exception handling info within object files on OS X? |
|
Monday April 13 2015 |
Time | Replies | Subject |
11:38PM |
1 |
[LLVMdev] Format of special case list for sanitizers |
10:14PM |
1 |
[LLVMdev] Announcing LLILC: An LLVM based compiler for dotnet CoreCLR. |
9:30PM |
0 |
[LLVMdev] seeking consultant for JIT client |
8:39PM |
0 |
[LLVMdev] Format of special case list for sanitizers |
6:25PM |
1 |
[LLVMdev] [WinEH] Cloning blocks that reference non-cloned PHI nodes |
4:45PM |
0 |
[LLVMdev] buildbot problem |
4:12PM |
0 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
12:23PM |
0 |
[LLVMdev] LLVM Weekly - #67, Apr 13th 2015 |
8:27AM |
0 |
[LLVMdev] GSOC proposal on KCOFI |
6:38AM |
1 |
[LLVMdev] LLVM Make issues |
4:30AM |
0 |
[LLVMdev] ubsan and log_path? |
1:19AM |
1 |
[LLVMdev] Confusion between GetElementPtr and C++ API |
|
Sunday April 12 2015 |
Time | Replies | Subject |
9:59PM |
2 |
[LLVMdev] ubsan and log_path? |
9:47PM |
2 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
6:27PM |
0 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
11:15AM |
0 |
[LLVMdev] How do -ON optimization levels relate to -passes pipeline? |
5:16AM |
2 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
5:09AM |
0 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
4:58AM |
2 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
4:51AM |
0 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
3:03AM |
2 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
1:21AM |
2 |
[LLVMdev] Installing llvm 3.4 |
1:20AM |
0 |
[LLVMdev] Issues with compiling the Hello pass |
12:49AM |
0 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
12:15AM |
2 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
|
Saturday April 11 2015 |
Time | Replies | Subject |
10:33PM |
0 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
6:46PM |
1 |
[LLVMdev] compiler-rt |
9:39AM |
1 |
[LLVMdev] Different signatures or smart casting? |
6:28AM |
1 |
[LLVMdev] MMX/SSE subtarget feature in IR |
6:01AM |
0 |
[LLVMdev] MMX/SSE subtarget feature in IR |
4:19AM |
1 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
4:15AM |
0 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
3:14AM |
2 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
2:22AM |
1 |
[LLVMdev] Different signatures or smart casting? |
2:04AM |
2 |
[LLVMdev] __eh_frame info changes in Clang? |
1:48AM |
0 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
12:43AM |
2 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
12:37AM |
0 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
12:29AM |
2 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
12:22AM |
0 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
12:07AM |
2 |
[LLVMdev] How doesn't llvm generate IR for logical negate operation |
12:00AM |
0 |
[LLVMdev] [WinEH] Cloning blocks that reference non-cloned PHI nodes |
|
Friday April 10 2015 |
Time | Replies | Subject |
11:47PM |
0 |
[LLVMdev] [RFC][CodeGen] What CLI should we provide for overriding the target decision on whether to run a pass (GlobalMerge) ? |
11:36PM |
2 |
[LLVMdev] [WinEH] Cloning blocks that reference non-cloned PHI nodes |
11:06PM |
0 |
[LLVMdev] [WinEH] Cloning blocks that reference non-cloned PHI nodes |
10:45PM |
3 |
[LLVMdev] [WinEH] Cloning blocks that reference non-cloned PHI nodes |
9:32PM |
1 |
[LLVMdev] LLD: Removing Native file format? |
8:42PM |
0 |
[LLVMdev] printd ( me, again ) |
8:01PM |
2 |
[LLVMdev] MMX/SSE subtarget feature in IR |
7:24PM |
0 |
[LLVMdev] LLD: Removing Native file format? |
6:54PM |
2 |
[LLVMdev] [RFC][CodeGen] What CLI should we provide for overriding the target decision on whether to run a pass (GlobalMerge) ? |
6:05PM |
0 |
[LLVMdev] Different signatures or smart casting? |
5:22PM |
0 |
[LLVMdev] Optimization on Atomics (and the OpenMP memory model) |
5:12PM |
4 |
[LLVMdev] Optimization on Atomics (and the OpenMP memory model) |
4:12PM |
0 |
[LLVMdev] [RFC] Setting preserve-bc-use-list-order=true by default |
1:46PM |
1 |
[LLVMdev] Intercepting dlinfo in memory sanitizer |
1:03PM |
3 |
[LLVMdev] Different signatures or smart casting? |
12:12PM |
1 |
[LLVMdev] Euro LLVM 2015 reminder and CFP deadline. |
11:57AM |
0 |
[LLVMdev] Euro LLVM 2015 reminder and CFP deadline. |
9:59AM |
0 |
[LLVMdev] Intercepting dlinfo in memory sanitizer |
9:50AM |
0 |
[LLVMdev] MMX/SSE subtarget feature in IR |
4:40AM |
1 |
[LLVMdev] LLVM Alias Analysis |
3:45AM |
0 |
[LLVMdev] LLVM Alias Analysis |
3:13AM |
2 |
[LLVMdev] LLVM Alias Analysis |
2:22AM |
2 |
[LLVMdev] Intercepting dlinfo in memory sanitizer |
2:19AM |
0 |
[LLVMdev] LLVM Alias Analysis |
|
Thursday April 9 2015 |
Time | Replies | Subject |
10:59PM |
2 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
10:58PM |
2 |
[LLVMdev] TBAA metadata |
9:51PM |
0 |
[LLVMdev] code coverage instrumentation |
9:34PM |
2 |
[LLVMdev] LLD: Removing Native file format? |
9:14PM |
0 |
[LLVMdev] LLD: Removing Native file format? |
8:58PM |
0 |
[LLVMdev] TBAA metadata |
8:33PM |
1 |
[LLVMdev] LLD: Removing Native file format? |
8:11PM |
2 |
[LLVMdev] TBAA metadata |
8:04PM |
0 |
[LLVMdev] LLD: Removing Native file format? |
7:37PM |
3 |
[LLVMdev] [RFC] Setting preserve-bc-use-list-order=true by default |
7:17PM |
6 |
[LLVMdev] LLD: Removing Native file format? |
7:14PM |
2 |
[LLVMdev] MMX/SSE subtarget feature in IR |
7:10PM |
0 |
[LLVMdev] BNF for IL/IR interpreter |
7:00PM |
1 |
[LLVMdev] [cfe-dev] want to intercept array dereferences |
7:00PM |
0 |
[LLVMdev] Intercepting dlinfo in memory sanitizer |
6:48PM |
0 |
[LLVMdev] MMX/SSE subtarget feature in IR |
6:43PM |
0 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
6:37PM |
2 |
[LLVMdev] BNF for IL/IR interpreter |
6:27PM |
2 |
[LLVMdev] MMX/SSE subtarget feature in IR |
6:25PM |
2 |
[LLVMdev] code coverage instrumentation |
6:24PM |
0 |
[LLVMdev] [cfe-dev] want to intercept array dereferences |
6:24PM |
2 |
[LLVMdev] Intercepting dlinfo in memory sanitizer |
6:06PM |
0 |
[LLVMdev] [RFC] Setting preserve-bc-use-list-order=true by default |
5:59PM |
3 |
[LLVMdev] [cfe-dev] want to intercept array dereferences |
4:35PM |
2 |
[LLVMdev] BasicBlock.h in the binary and in the source differ |
4:21PM |
0 |
[LLVMdev] BasicBlock.h in the binary and in the source differ |
4:17PM |
2 |
[LLVMdev] BasicBlock.h in the binary and in the source differ |
4:15PM |
0 |
[LLVMdev] BasicBlock.h in the binary and in the source differ |
3:58PM |
3 |
[LLVMdev] BasicBlock.h in the binary and in the source differ |
8:15AM |
0 |
[LLVMdev] __sync_add_and_fetch in objc block for global variable on ARM |
7:58AM |
2 |
[LLVMdev] __sync_add_and_fetch in objc block for global variable on ARM |
7:41AM |
0 |
[LLVMdev] Fwd: How to Remove Stack allocation |
5:08AM |
3 |
[LLVMdev] Looking for advice on how to debug a problem with C++ style exception handling code that my compiler generates. |
|
Wednesday April 8 2015 |
Time | Replies | Subject |
10:39PM |
0 |
[LLVMdev] [RFC] Raise minimum required CMake version to 3.0 |
10:36PM |
3 |
[LLVMdev] [RFC] Raise minimum required CMake version to 3.0 |
10:35PM |
0 |
[LLVMdev] [RFC] Raise minimum required CMake version to 3.0 |
10:31PM |
0 |
[LLVMdev] EntryToken assertion in RemoveNodeFromCSEMaps? |
8:45PM |
0 |
[LLVMdev] [RFC] Raise minimum required CMake version to 3.0 |
8:44PM |
0 |
[LLVMdev] LLVM buildmaster will be restarted tonight |
8:32PM |
4 |
[LLVMdev] [RFC] Raise minimum required CMake version to 3.0 |
8:32PM |
0 |
[LLVMdev] [RFC] Raise minimum required CMake version to 3.0 |
8:19PM |
2 |
[LLVMdev] [RFC] Raise minimum required CMake version to 3.0 |
7:00PM |
0 |
[LLVMdev] Dynamic Compilation |
6:33PM |
0 |
[LLVMdev] Modify a module at runtime in MCJIT |
6:15PM |
0 |
[LLVMdev] how much RAM do I really need to build a devel version of LLVM? |
5:59PM |
0 |
[LLVMdev] LLD: make atoms in files non-const |
5:46PM |
0 |
[LLVMdev] CUDA front-end (CUDA to LLVM IR) |
5:39PM |
1 |
[LLVMdev] CUDA front-end (CUDA to LLVM IR) |
5:21PM |
2 |
[LLVMdev] CUDA front-end (CUDA to LLVM IR) |
5:19PM |
0 |
[LLVMdev] CUDA front-end (CUDA to LLVM IR) |
5:12PM |
0 |
[LLVMdev] CUDA front-end (CUDA to LLVM IR) |
5:01PM |
5 |
[LLVMdev] CUDA front-end (CUDA to LLVM IR) |
4:19PM |
4 |
[LLVMdev] [RFC] OpenMP offload infrastructure (iteration 2) |
1:56PM |
0 |
[LLVMdev] Reminder - Bug fixes for 3.6.1 must me merged by May 4. |
1:53PM |
0 |
[LLVMdev] __sync_add_and_fetch in objc block for global variable on ARM |
11:35AM |
0 |
[LLVMdev] Add a new language to LLVM 3.6 Framework |
10:00AM |
2 |
[LLVMdev] 3.7 release data? |
9:16AM |
1 |
[LLVMdev] Add a new language to LLVM 3.6 Framework |
8:21AM |
2 |
[LLVMdev] __sync_add_and_fetch in objc block for global variable on ARM |
7:14AM |
0 |
[LLVMdev] Moderators needed for EuroLLVM Developers' meeting |
6:56AM |
0 |
[LLVMdev] want to intercept array dereferences |
6:24AM |
2 |
[LLVMdev] want to intercept array dereferences |
5:46AM |
0 |
[LLVMdev] want to intercept array dereferences |
5:36AM |
2 |
[LLVMdev] want to intercept array dereferences |
1:32AM |
2 |
[LLVMdev] LLVM Alias Analysis |
|
Tuesday April 7 2015 |
Time | Replies | Subject |
11:19PM |
4 |
[LLVMdev] how much RAM do I really need to build a devel version of LLVM? |
10:58PM |
3 |
[LLVMdev] LLD: make atoms in files non-const |
7:45PM |
0 |
[LLVMdev] any linux distro with llvm/clang/klee packages available |
7:44PM |
0 |
[LLVMdev] IC profiling infrastructure |
7:19PM |
3 |
[LLVMdev] any linux distro with llvm/clang/klee packages available |
7:17PM |
0 |
[LLVMdev] (no subject) |
3:20PM |
0 |
[LLVMdev] How to see what's going on behind llc through clang/clang++ |
3:14PM |
0 |
[LLVMdev] problems the klee toolchain built |
3:11PM |
0 |
[LLVMdev] klee problems configuring |
2:32PM |
1 |
[LLVMdev] Cast to SCEVAddRecExpr |
2:11PM |
2 |
[LLVMdev] How to see what's going on behind llc through clang/clang++ |
9:39AM |
1 |
[LLVMdev] Is it Possible to Set a specified bit of a specified register? |
4:31AM |
0 |
[LLVMdev] LLVMContextImpl.h not installed? |
|
Monday April 6 2015 |
Time | Replies | Subject |
11:45PM |
0 |
[LLVMdev] uCLibc support for klee |
11:16PM |
0 |
[LLVMdev] PDB support in LLVM |
10:58PM |
0 |
[LLVMdev] "distinct" metadata nodes are ...? |
10:42PM |
2 |
[LLVMdev] PDB support in LLVM |
10:34PM |
0 |
[LLVMdev] inconsistent wording in the LangRef regarding "shl nsw" |
10:00PM |
0 |
[LLVMdev] klee invalid llvmobj directory |
9:56PM |
3 |
[LLVMdev] uCLibc support for klee |
9:22PM |
0 |
[LLVMdev] llvm DSA - reproduce the result in PLDI 07 paper |
8:56PM |
2 |
[LLVMdev] llvm DSA - reproduce the result in PLDI 07 paper |
8:44PM |
1 |
[LLVMdev] How to enable use of 64bit load/store for 32bit architecture |
8:35PM |
0 |
[LLVMdev] How to enable use of 64bit load/store for 32bit architecture |
8:14PM |
0 |
[LLVMdev] LLVM_ENABLE_THREADING=ON by default in Windows, is this right? |
6:26PM |
2 |
[LLVMdev] inconsistent wording in the LangRef regarding "shl nsw" |
6:20PM |
2 |
[LLVMdev] "distinct" metadata nodes are ...? |
5:37PM |
0 |
[LLVMdev] "distinct" metadata nodes are ...? |
5:26PM |
2 |
[LLVMdev] "distinct" metadata nodes are ...? |
3:27PM |
1 |
[LLVMdev] problems building llvm-gcc-4.2 on fedora 21 |
3:13PM |
0 |
[LLVMdev] problems building llvm-gcc-4.2 on fedora 21 |
3:06PM |
0 |
[LLVMdev] Need help getting klee installed on debian 7.8 |
10:02AM |
0 |
[LLVMdev] alloca not in first bb behaving differently |
9:55AM |
0 |
[LLVMdev] LLVM Weekly - #66, Apr 6th 2015 |
9:13AM |
0 |
[LLVMdev] inconsistent wording in the LangRef regarding "shl nsw" |
7:59AM |
2 |
[LLVMdev] inconsistent wording in the LangRef regarding "shl nsw" |
3:54AM |
2 |
[LLVMdev] Unreachable br in IR but still seems to be executed |
|
Sunday April 5 2015 |
Time | Replies | Subject |
11:47PM |
4 |
[LLVMdev] Format of special case list for sanitizers |
10:30PM |
2 |
[LLVMdev] problems building llvm-gcc-4.2 on fedora 21 |
3:52PM |
2 |
[LLVMdev] alloca not in first bb behaving differently |
1:24PM |
0 |
[LLVMdev] alloca not in first bb behaving differently |
9:44AM |
2 |
[LLVMdev] alloca not in first bb behaving differently |
3:55AM |
0 |
[LLVMdev] alloca not in first bb behaving differently |
3:28AM |
3 |
[LLVMdev] alloca not in first bb behaving differently |
|
Saturday April 4 2015 |
Time | Replies | Subject |
11:06PM |
3 |
[LLVMdev] LLVM_ENABLE_THREADING=ON by default in Windows, is this right? |
12:46PM |
0 |
[LLVMdev] Ravi - a Lua Dialect using LLVM |
6:10AM |
1 |
[LLVMdev] [PATCH] fix outs/ins of MOV16mr instruction (X86) |
|
Friday April 3 2015 |
Time | Replies | Subject |
11:17PM |
0 |
[LLVMdev] Sharing and re-using Codegen'd LLVM IR |
11:12PM |
1 |
[LLVMdev] [lld][RFC] TargetLayout class removing |
8:37PM |
2 |
[LLVMdev] Enabling level 4 warnings by default for MSVC builds |
8:30PM |
0 |
[LLVMdev] [lld][RFC] TargetLayout class removing |
8:29PM |
2 |
[LLVMdev] [lld][RFC] TargetLayout class removing |
7:40PM |
0 |
[LLVMdev] [lld][RFC] TargetLayout class removing |
7:36PM |
3 |
[LLVMdev] [lld][RFC] TargetLayout class removing |
1:20AM |
0 |
[LLVMdev] why are volatile memory accesses ordered? |
1:18AM |
2 |
[LLVMdev] why are volatile memory accesses ordered? |
1:09AM |
0 |
[LLVMdev] why are volatile memory accesses ordered? |
1:04AM |
3 |
[LLVMdev] why are volatile memory accesses ordered? |
12:02AM |
2 |
[LLVMdev] How to enable use of 64bit load/store for 32bit architecture |
|
Thursday April 2 2015 |
Time | Replies | Subject |
9:07PM |
0 |
[LLVMdev] How to enable use of 64bit load/store for 32bit architecture |
8:35PM |
2 |
[LLVMdev] How to enable use of 64bit load/store for 32bit architecture |
8:23PM |
0 |
[LLVMdev] LLVM buildmaster will be restarted tonight |
8:20PM |
0 |
[LLVMdev] How to enable use of 64bit load/store for 32bit architecture |
6:47PM |
0 |
[LLVMdev] Review Request: Fix for a bug found in applying R_AARCH64_ADR_GOT_PAGE relocation |
6:43PM |
2 |
[LLVMdev] How to enable use of 64bit load/store for 32bit architecture |
5:45PM |
0 |
[LLVMdev] unsupported GC: shadow-stack when using MCJIT |
5:28PM |
0 |
[LLVMdev] [PATCH] fix outs/ins of MOV16mr instruction (X86) |
4:12PM |
0 |
[LLVMdev] Cross Compiling LLVM's test-suite |
2:51PM |
3 |
[LLVMdev] Cross Compiling LLVM's test-suite |
2:32PM |
0 |
[LLVMdev] Moderators needed for EuroLLVM Developers' meeting |
5:54AM |
2 |
[LLVMdev] [PATCH] fix outs/ins of MOV16mr instruction (X86) |
3:07AM |
1 |
[LLVMdev] LTO, Code Generation Options, etc |
2:15AM |
1 |
[LLVMdev] Dynamic linking (dlopen/dlsym) against LLVM from a C program |
12:32AM |
0 |
[LLVMdev] Optimizing out redundant alloca involving byval params |
12:07AM |
0 |
[LLVMdev] LTO, Code Generation Options, etc |
|
Wednesday April 1 2015 |
Time | Replies | Subject |
10:21PM |
0 |
[LLVMdev] Dynamic linking (dlopen/dlsym) against LLVM from a C program |
9:48PM |
2 |
[LLVMdev] Dynamic linking (dlopen/dlsym) against LLVM from a C program |
9:29PM |
0 |
[LLVMdev] Trouble building LLVM 3.5.1 on Windows using VS 2013 |
9:06PM |
1 |
[LLVMdev] Missing libclang_rt.san-x86_64.a file for Compiler-rt |
8:27PM |
0 |
[LLVMdev] Workaround for Bug 22963? |
7:28PM |
0 |
[LLVMdev] Invalid or unaligned stack |
7:00PM |
1 |
[LLVMdev] LLVM Shared DLL not supported reason |
6:56PM |
2 |
[LLVMdev] Workaround for Bug 22963? |
5:48PM |
2 |
[LLVMdev] unsupported GC: shadow-stack when using MCJIT |
5:36PM |
0 |
[LLVMdev] Missing libclang_rt.san-x86_64.a file for Compiler-rt |
5:31PM |
0 |
[LLVMdev] LLVM Shared DLL not supported reason |
4:56PM |
0 |
[LLVMdev] Workaround for Bug 22963? |
4:48PM |
0 |
[LLVMdev] LLVM JIT |
4:46PM |
3 |
[LLVMdev] LLVM Shared DLL not supported reason |
4:41PM |
0 |
[LLVMdev] Cast to SCEVAddRecExpr |
4:06PM |
2 |
[LLVMdev] Invalid or unaligned stack |
4:03PM |
0 |
[LLVMdev] LLVM Shared DLL not supported reason |
3:37PM |
0 |
[LLVMdev] LLVM JIT |
3:19PM |
0 |
[LLVMdev] Dynamic linking (dlopen/dlsym) against LLVM from a C program |
2:58PM |
2 |
[LLVMdev] Missing libclang_rt.san-x86_64.a file for Compiler-rt |
2:55PM |
0 |
[LLVMdev] [RFC] Setting preserve-bc-use-list-order=true by default |
2:20PM |
1 |
[LLVMdev] Mul & div support for wider-than-legal types |
10:41AM |
0 |
[LLVMdev] [Job Ad] LLVM Compiler Engineer Position at Synopsys |
10:39AM |
0 |
[LLVMdev] where should volatileness really live in the AA API? |
10:06AM |
2 |
[LLVMdev] Cast to SCEVAddRecExpr |
8:27AM |
1 |
[LLVMdev] why we assume malloc() always returns a non-null pointer in instruction combing? |
7:57AM |
0 |
[LLVMdev] why we assume malloc() always returns a non-null pointer in instruction combing? |
7:27AM |
4 |
[LLVMdev] LLVM JIT |
7:15AM |
3 |
[LLVMdev] why we assume malloc() always returns a non-null pointer in instruction combing? |
5:42AM |
0 |
[LLVMdev] unsupported GC: shadow-stack when using MCJIT |
5:22AM |
2 |
[LLVMdev] Workaround for Bug 22963? |
4:59AM |
2 |
[LLVMdev] unsupported GC: shadow-stack when using MCJIT |
4:52AM |
0 |
[LLVMdev] unsupported GC: shadow-stack when using MCJIT |
4:52AM |
0 |
[LLVMdev] why we assume malloc() always returns a non-null pointer in instruction combing? |
3:59AM |
3 |
[LLVMdev] LTO, Code Generation Options, etc |
2:59AM |
2 |
[LLVMdev] why we assume malloc() always returns a non-null pointer in instruction combing? |
2:10AM |
4 |
[LLVMdev] [RFC] Setting preserve-bc-use-list-order=true by default |
2:08AM |
0 |
[LLVMdev] Why the fault? |
1:47AM |
2 |
[LLVMdev] Why the fault? |
1:03AM |
2 |
[LLVMdev] unsupported GC: shadow-stack when using MCJIT |
12:29AM |
0 |
[LLVMdev] unsupported GC: shadow-stack when using MCJIT |