Displaying 3 results from an estimated 3 matches for "getintrinsiccost".
2015 May 05
1
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
...or example, take vector type V8i16 on X86 target
With llvm.sad() intrinsic:
VC1 (Vector Cost) = Cost associated with "PSAD" instruction.
W/ llvm.absd() and llvm.hadd()
VC2 = Cost associated with "absolute diff" + "horizontal add" ( ??? )
As I will be querying with getIntrinsicCost(ID) for these two intrinsics separately, Will VC1==VC2?
May be I am missing something obvious?
Regards,
Shahid
> -----Original Message-----
> From: Renato Golin [mailto:renato.golin at linaro.org]
> Sent: Tuesday, May 05, 2015 7:28 PM
> To: Shahid, Asghar-ahmad
> Cc: James Molloy;...
2015 May 05
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
On 4 May 2015 at 08:37, Shahid, Asghar-ahmad
<Asghar-ahmad.Shahid at amd.com> wrote:
> My worry is regarding the query for cost calculation for specific SAD
> instructions such as ‘psad’ (X86) or ‘usad’ (ARM) in Loop Vectorizer.
Hi Shahid,
The vectorizer's cost model has the ability to return different costs
for the same instruction based on the arguments (scalar/vector,
2015 May 06
2
[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
...trinsic:
> > VC1 (Vector Cost) = Cost associated with "PSAD" instruction.
> >
> > W/ llvm.absd() and llvm.hadd()
> > VC2 = Cost associated with "absolute diff" + "horizontal add" ( ???
> > )
> >
> > As I will be querying with getIntrinsicCost(ID) for these two intrinsics
> separately, Will VC1==VC2?
>
> I see. You are correct to say that this is a crude approximation.
>
> The way we do today is to get one of them and treat as "cheap", or if not
> possible, to hope it'll dilute amidst other more expensiv...