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Hi Asghar-Ahmed, I saw your last ping - sorry, I'm away on vacation and back on Wednesday. Generally, I'm not sure that having both absd/hadd and sad are compatible with the discussions going on in other threads, for example my thread about min and max. Given that those two intrinsics are fairly trivial to match , I don't see the need to have two different canonical forms. James On Mon, 4 May 2015 at 07:55, Shahid, Asghar-ahma...

Hi Renato, Thanks for your response. My concern was actually this. For example, take vector type V8i16 on X86 target With llvm.sad() intrinsic: VC1 (Vector Cost) = Cost associated with "PSAD" instruction. W/ llvm.absd() and llvm.hadd() VC2 = Cost associated with "absolute diff" + "horizontal add" ( ??? ) As I will be querying with getIntrinsicCost(ID) for these two intrinsics separately, Will VC1==VC2? May be I am missing something obvious? Regards, Shahid > -----Original Message----...

On 4 May 2015 at 08:37, Shahid, Asghar-ahmad <Asghar-ahmad.Shahid at amd.com> wrote: > My worry is regarding the query for cost calculation for specific SAD > instructions such as ‘psad’ (X86) or ‘usad’ (ARM) in Loop Vectorizer. Hi Shahid, The vectorizer's cost model has the ability to return different costs for the same instruction based on the arguments (scalar/vector,

...in cost modeling for these idioms which is complex down the lane. Pls find attached a patch regarding this which is incomplete & dirty at this moment, however, it may help in this discussion. Regards, Shahid -------------- next part -------------- A non-text attachment was scrubbed... Name: absd_hadd_sad_intrinsic.patch Type: application/octet-stream Size: 30121 bytes Desc: absd_hadd_sad_intrinsic.patch URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150501/facd5cdb/attachment.obj>

...t make sense in general? Regards, Shahid > -----Original Message----- > From: Renato Golin [mailto:renato.golin at linaro.org] > Sent: Tuesday, May 05, 2015 8:40 PM > To: Shahid, Asghar-ahmad > Cc: James Molloy; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics > > On 5 May 2015 at 15:41, Shahid, Asghar-ahmad <Asghar- > ahmad.Shahid at amd.com> wrote: > > With llvm.sad() intrinsic: > > VC1 (Vector Cost) = Cost associated with "PSAD" instruction. > > > > W/ llvm.absd() and llvm.hadd() &g...

...9;horizontal add'. Regards, Shahid > -----Original Message----- > From: Renato Golin [mailto:renato.golin at linaro.org] > Sent: Wednesday, May 06, 2015 3:22 PM > To: Shahid, Asghar-ahmad > Cc: James Molloy; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics > > On 6 May 2015 at 06:43, Shahid, Asghar-ahmad <Asghar- > ahmad.Shahid at amd.com> wrote: > > That’s right. I agree with your *pattern vs complexity* thinking. > > > > So I would drop llvm.sad() and go ahead with the remaining two. > > &...