llvm dev - Nov 2012 - [LLVMdev] Compiling for several operand memories

Hello,
My target has two data memories, each with its own load/store instructions but
also has some instructions using both memories. I want to be able to access both
memories in C-programs through the address space attribute.
I have two ideas so far:
Either: use two sets of addressing modes in InstrInfo.td:
def ADDRrr_A : ComplexPattern<i16, 2, “SelectADDRrr_A", [], []>;
def ADDRri : ComplexPattern<i16, 2, "SelectADDRri", [frameindex],
[]>;
and
def ADDRrr_B : ComplexPattern<i16, 2, "SelectADDRrr_B", [], []>;

Or: do something in one of the lowering functions to catch load and stores, look
at their address space attribute to pick the right assembly instruction

Can someone hint me on how this can be implemented? Any input would be greatly
appreciated.

best
-Magnus
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20121005/21cb0267/attachment.html>

Have not gotten much further on this, I can so far only use one memory with 

(for example)
def LDr1   : F1<  (outs GenRegs:$dst), (ins GenRegs:$addr),
                  "ld*0* $dst, ($addr)",
                  [(set GenRegs:$dst, (load GenRegs:$addr))],IIGenLoad>;

and

def LDrr   : F1<  (outs GenRegs:$dst), (ins MEMrr:$addr),
                  "ld*0* $dst, ($addr)",
                  [(set GenRegs:$dst, (load ADDRrr:$addr))],IIGenLoad>;

What i want to do is to be able to also have these two:

def LDr1   : F1<  (outs GenRegs:$dst), (ins GenRegs:$addr),
                  "ld*1* $dst, ($addr)",
                  [(set GenRegs:$dst, (load GenRegs:$addr))],IIGenLoad>;

and

def LDrr   : F1<  (outs GenRegs:$dst), (ins MEMrr:$addr),
                  "ld*1* $dst, ($addr)",
                  [(set GenRegs:$dst, (load ADDRrr:$addr))],IIGenLoad>;

but they should only match when accessing data structres whose address space
attribute is set to 1.
Can I use the predicate field in the instruction class to achieve this? If
so, how :/ ?

 -Magnus



--
View this message in context:
http://llvm.1065342.n5.nabble.com/Compiling-for-several-operand-memories-tp49698p50817.html
Sent from the LLVM - Dev mailing list archive at Nabble.com.

Hi Magnus,

We've the same situation in our back-end, two memories with its 
corresponding loads/stores each one. In order to select between two 
different loads (and stores), we have defined two complex patterns 
requiring its parent node (SDNPWantParent) so we can get the address 
space number.

def MEMA : ComplexPattern<iPTR, 3, "SelectAddrA", [],
[SDNPWantParent]>;
def MEMB : ComplexPattern<iPTR, 3, "SelectAddrB", [],
[SDNPWantParent]>;

Then in SelectAddrA/B, you can specify the address space number for 
which you want your select function to work on.

bool SelectAddrA(SDNode *Parent, ...) {
...
AddrSpace = cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace();
if (AddrSpace !=A)
     return false;
...
}

Hope this helps!

Regards,
Ivan

On 06/11/2012 21:21, Magnus wrote:
> Have not gotten much further on this, I can so far only use one memory with
>
> (for example)
> def LDr1   : F1<  (outs GenRegs:$dst), (ins GenRegs:$addr),
>                    "ld*0* $dst, ($addr)",
>                    [(set GenRegs:$dst, (load
GenRegs:$addr))],IIGenLoad>;
>
> and
>
> def LDrr   : F1<  (outs GenRegs:$dst), (ins MEMrr:$addr),
>                    "ld*0* $dst, ($addr)",
>                    [(set GenRegs:$dst, (load ADDRrr:$addr))],IIGenLoad>;
>
> What i want to do is to be able to also have these two:
>
> def LDr1   : F1<  (outs GenRegs:$dst), (ins GenRegs:$addr),
>                    "ld*1* $dst, ($addr)",
>                    [(set GenRegs:$dst, (load
GenRegs:$addr))],IIGenLoad>;
>
> and
>
> def LDrr   : F1<  (outs GenRegs:$dst), (ins MEMrr:$addr),
>                    "ld*1* $dst, ($addr)",
>                    [(set GenRegs:$dst, (load ADDRrr:$addr))],IIGenLoad>;
>
> but they should only match when accessing data structres whose address
space
> attribute is set to 1.
> Can I use the predicate field in the instruction class to achieve this? If
> so, how :/ ?
>
>   -Magnus
>
>
>
> --
> View this message in context:
http://llvm.1065342.n5.nabble.com/Compiling-for-several-operand-memories-tp49698p50817.html
> Sent from the LLVM - Dev mailing list archive at Nabble.com.
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev