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Ramin Guner

2014-Jun-07 08:04 UTC

[LLVMdev] Load/Store Instruction Error

Hi all,

I  started to write an LLVM backend for custom CPU. I created XXXInstrInfo
but there are some problems. I searched for it but I couldn't find
anything. Can anyone help me?

include "XXXInstrFormats.td"
def simm16 : Operand<i32> {
    let DecoderMethod = "DecodeSimm16";
}
def mem : Operand<i32> {
    let PrintMethod = "printMemOperand";
    let MIOperandInfo = (ops GPRegs, GPRegs);
    let EncoderMethod = "getMemEncoding";
}
def addr : ComplexPattern<i32, 2, "SelectAddr", [frameindex],
[SDNPWantParent]>;

def LDRAM : FG1<0b000001, (outs GPRegs:$dst), (ins mem:$src), "ldram
$dst,$src", [(set GPRegs:$dst, (load addr:$src))]>;
def STRAM : FG1<0b000010, (outs), (ins GPRegs:$src, mem:$dst), "stram
$dst,$src", [(store GPRegs:$src, addr:$dst)]>;
def ADD : FG2<0b000000, (outs GPRegs:$dst), (ins GPRegs:$src1,
GPRegs:$src2), "add $dst,$src1,$src2", [(set GPRegs:$dst, (add
GPRegs:$src1, GPRegs:$src2))]>;

Error Message:
LDRAM: (set GPRegs:{i32:f32}:$dst, (ld:{i32:f32}
addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_load>>)
Included from
/home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXOther.td:10:
Included from /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXX.td:1:
/home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXInstrInfo.td:34:1:
error: In LDRAM: Could not infer all types in pattern!
def LDRAM : FG1<0b000001, (outs GPRegs:$dst), (ins mem:$src), "ldram
$dst,$src", [(set GPRegs:$dst, (load addr:$src))]>;
^
STRAM: (st GPRegs:{i32:f32}:$src,
addr:iPTR:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>>
Included from
/home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXOther.td:10:
Included from /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXX.td:1:
/home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXInstrInfo.td:36:1:
error: In STRAM: Could not infer all types in pattern!
def STRAM : FG1<0b000010, (outs), (ins GPRegs:$src, mem:$dst), "stram
$dst,$src", [(store GPRegs:$src, addr:$dst)]>;
^

Thanks in advance.
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Daniil Troshkov

2014-Jun-07 15:28 UTC

head link

[LLVMdev] Load/Store Instruction Error

Hi!

There is doc
http://llvm.org/docs/WritingAnLLVMBackend.html
look for ComplexPattern:
> def STrr  : F3_1< 3, 0b000100, (outs), (ins MEMrr:$addr, IntRegs:$src),
>                  "st $src, [$addr]", [(store i32:$src,
ADDRrr:$addr)]>;
>ADDRrr is a memory mode that is also defined in SparcInstrInfo.td:
>def ADDRrr : ComplexPattern<i32, 2, "SelectADDRrr", [], []>;
Maybe ComplexPattern is what you want...


On Sat, Jun 7, 2014 at 12:04 PM, Ramin Guner <webvlkn at gmail.com> wrote:
> Hi all,
>
> I  started to write an LLVM backend for custom CPU. I created XXXInstrInfo
> but there are some problems. I searched for it but I couldn't find
> anything. Can anyone help me?
>
> include "XXXInstrFormats.td"
> def simm16 : Operand<i32> {
>     let DecoderMethod = "DecodeSimm16";
> }
> def mem : Operand<i32> {
>     let PrintMethod = "printMemOperand";
>     let MIOperandInfo = (ops GPRegs, GPRegs);
>     let EncoderMethod = "getMemEncoding";
> }
> def addr : ComplexPattern<i32, 2, "SelectAddr", [frameindex],
> [SDNPWantParent]>;
>
> def LDRAM : FG1<0b000001, (outs GPRegs:$dst), (ins mem:$src),
"ldram
> $dst,$src", [(set GPRegs:$dst, (load addr:$src))]>;
> def STRAM : FG1<0b000010, (outs), (ins GPRegs:$src, mem:$dst),
"stram
> $dst,$src", [(store GPRegs:$src, addr:$dst)]>;
> def ADD : FG2<0b000000, (outs GPRegs:$dst), (ins GPRegs:$src1,
> GPRegs:$src2), "add $dst,$src1,$src2", [(set GPRegs:$dst, (add
> GPRegs:$src1, GPRegs:$src2))]>;
>
> Error Message:
> LDRAM: (set GPRegs:{i32:f32}:$dst, (ld:{i32:f32}
>
addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_load>>)
> Included from
> /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXOther.td:10:
> Included from /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXX.td:1:
> /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXInstrInfo.td:34:1:
> error: In LDRAM: Could not infer all types in pattern!
> def LDRAM : FG1<0b000001, (outs GPRegs:$dst), (ins mem:$src),
"ldram
> $dst,$src", [(set GPRegs:$dst, (load addr:$src))]>;
> ^
> STRAM: (st GPRegs:{i32:f32}:$src,
>
addr:iPTR:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>>
> Included from
> /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXOther.td:10:
> Included from /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXX.td:1:
> /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXInstrInfo.td:36:1:
> error: In STRAM: Could not infer all types in pattern!
> def STRAM : FG1<0b000010, (outs), (ins GPRegs:$src, mem:$dst),
"stram
> $dst,$src", [(store GPRegs:$src, addr:$dst)]>;
> ^
>
> Thanks in advance.
>
>
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
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Tim Northover

2014-Jun-07 18:39 UTC

head link

[LLVMdev] Load/Store Instruction Error

Hi Ramin,

On 7 June 2014 09:04, Ramin Guner <webvlkn at gmail.com>
wrote:> Error Message:
> LDRAM: (set GPRegs:{i32:f32}:$dst, (ld:{i32:f32}
>
addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_load>>)
> Included from
Each particular instance of a pattern has to be well-typed. In this
case you can see that LLVM can't decide whether you intended the
pattern to be loading i32 or f32 (the "{i32:f32}" tags).

So you have to explicitly pick one and annotate the type. In this case
(and for the LD only), you'd probably end up writing something like:

def LDRAM : FG1<0b000001, (outs GPRegs:$dst), (ins mem:$src), "ldram
$dst,$src", [(set GPRegs:$dst, (i32 (load addr:$src)))]>;
def : Pat<(f32 (load addr:$src)), (LDRAM addr:$src)>;

using the second "Pat" instantiation to get the other version of the
load.

Cheers.

Tim.

Ramin Guner

2014-Jun-07 19:53 UTC

head link

[LLVMdev] Load/Store Instruction Error

In the first definition, I think you defined that the loaded data contains
an i32. But the second definition (Pat) is not clear.
Actually, I do not too much knowledge about Patters, PatFrags and
ComplexPatterns etc. and there is no document about them.
Some explanation will be good for me.

Thanks.


2014-06-07 21:39 GMT+03:00 Tim Northover <t.p.northover at gmail.com>:
> Hi Ramin,
>
> On 7 June 2014 09:04, Ramin Guner <webvlkn at gmail.com> wrote:
> > Error Message:
> > LDRAM: (set GPRegs:{i32:f32}:$dst, (ld:{i32:f32}
> >
addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_load>>)
> > Included from
>
> Each particular instance of a pattern has to be well-typed. In this
> case you can see that LLVM can't decide whether you intended the
> pattern to be loading i32 or f32 (the "{i32:f32}" tags).
>
> So you have to explicitly pick one and annotate the type. In this case
> (and for the LD only), you'd probably end up writing something like:
>
> def LDRAM : FG1<0b000001, (outs GPRegs:$dst), (ins mem:$src),
"ldram
> $dst,$src", [(set GPRegs:$dst, (i32 (load addr:$src)))]>;
> def : Pat<(f32 (load addr:$src)), (LDRAM addr:$src)>;
>
> using the second "Pat" instantiation to get the other version of
the load.
>
> Cheers.
>
> Tim.
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