| Tuesday November 30 2021 |
| Time | Replies | Subject |
|---|
| 9:51PM |
2 |
Question regarding correctness of debug information generated by LLC |
| 9:40PM |
1 |
Loop Opt WG Meeting on Dec 1st, 2021 |
| 9:38PM |
1 |
Loop Opt WG Meeting on Dec 1st, 2021 |
| 9:35PM |
0 |
Loop Opt WG Meeting on Dec 1st, 2021 |
| 9:07PM |
1 |
[cfe-dev] Release 13.0.1-rc1 has been tagged |
| 8:35PM |
1 |
[cfe-dev] Release 13.0.1-rc1 has been tagged |
| 8:00PM |
2 |
Possible GlobalModRef bug -- arg-less calls produce wrong ref info. |
| 6:36PM |
3 |
[RFC] Raise the minimum Visual Studio version to VS2019 |
| 6:22PM |
1 |
[flang-dev] Status of Bugzilla Migration |
| 6:11PM |
1 |
[flang-dev] Status of Bugzilla Migration |
| 5:46PM |
0 |
[MC] Tablegen code emitter catch invalid immediate value in assembly instruction |
| 5:01PM |
1 |
Function register clobber propagation |
| 4:45PM |
1 |
Question regarding correctness of debug information generated by LLC |
| 3:26PM |
1 |
Function register clobber propagation |
| 2:57PM |
2 |
Inline assembly and poison values |
| 11:48AM |
1 |
Status of Bugzilla Migration |
| 9:54AM |
1 |
[cfe-dev] Feedback on feature (and status of lld linker script support?) |
| 9:51AM |
2 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 9:16AM |
2 |
Proposal: Make the VE target official |
| 8:36AM |
1 |
Proposal: Make the VE target official |
| 8:20AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 6:07AM |
9 |
Release 13.0.1-rc1 has been tagged |
| 5:58AM |
1 |
[cfe-dev] Feedback on feature (and status of lld linker script support?) |
| 2:14AM |
1 |
[External] Re: How can I build LLVM with my gcc toolchain exactly |
| |
| Monday November 29 2021 |
| Time | Replies | Subject |
|---|
| 11:37PM |
1 |
Regarding sparse kernel benchmarks in MLIR |
| 11:02PM |
1 |
Regarding sparse kernel benchmarks in MLIR |
| 6:38PM |
1 |
Regarding sparse kernel benchmarks in MLIR |
| 6:28PM |
1 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 6:19PM |
1 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 6:15PM |
1 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 5:54PM |
1 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 5:31PM |
0 |
LLVM Weekly - #413, November 29th 2021 |
| 1:12PM |
1 |
getOrInsertFunction issue |
| 1:07PM |
1 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 12:55PM |
1 |
Proposal: Make the VE target official |
| 12:49PM |
1 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 12:35PM |
1 |
Proposal: Make the VE target official |
| 10:36AM |
1 |
Proposal: Make the VE target official |
| 8:32AM |
1 |
Proposal: Make the VE target official |
| |
| Sunday November 28 2021 |
| Time | Replies | Subject |
|---|
| 9:52PM |
0 |
N2676 and LLVM Alias Analysis Technical Call |
| 8:33PM |
1 |
Encoding/formating problems in migrated GitHub issues |
| 8:05PM |
1 |
Encoding/formating problems in migrated GitHub issues |
| 7:14PM |
2 |
Interested in contributing to LLVM complier Infrastructure |
| 5:09PM |
1 |
[ASAN] [Regression] Stack pointer corruption on ARMv7 |
| 4:29PM |
2 |
Someone is squatting the LLVM project's on GitHub |
| 4:21PM |
1 |
Someone is squatting the LLVM project's on GitHub |
| 4:18PM |
1 |
IMPORTANT: Invitations to join LLVM github organization is sent to everyone who filled bugzilla transition survey |
| 4:16PM |
1 |
Someone is squatting the LLVM project's on GitHub |
| 3:17PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 5:02AM |
1 |
Interested in contributing to LLVM complier Infrastructure |
| |
| Friday November 26 2021 |
| Time | Replies | Subject |
|---|
| 4:18PM |
1 |
DominatorTree, JumpThreading and EarlyCSE non-determinism |
| 2:27PM |
1 |
[RFC] Raise the minimum Visual Studio version to VS2019 |
| 12:07PM |
1 |
Exceptions not working when cross compiling for ARM Cortex M4 with clang and precompiled libraries from ARM GNU GCC Toolchain |
| 11:21AM |
2 |
Exceptions not working when cross compiling for ARM Cortex M4 with clang and precompiled libraries from ARM GNU GCC Toolchain |
| 9:01AM |
1 |
Dumping branch weights in loop unroll phase |
| 7:34AM |
1 |
[cfe-dev] IMPORTANT: LLVM Bugzilla migration |
| 7:33AM |
1 |
[cfe-dev] IMPORTANT: LLVM Bugzilla migration |
| 7:16AM |
1 |
[cfe-dev] IMPORTANT: LLVM Bugzilla migration |
| 2:03AM |
1 |
[cfe-dev] IMPORTANT: LLVM Bugzilla migration |
| |
| Thursday November 25 2021 |
| Time | Replies | Subject |
|---|
| 6:10PM |
1 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 2:37PM |
2 |
Question about supporting zext on IVUsers and LSR |
| 1:51PM |
1 |
[RFC] Raise the minimum Visual Studio version to VS2019 |
| 12:57PM |
1 |
[RFC] Raise the minimum Visual Studio version to VS2019 |
| 12:29PM |
1 |
[RFC] Raise the minimum Visual Studio version to VS2019 |
| 11:41AM |
1 |
Exceptions not working when cross compiling for ARM Cortex M4 with clang and precompiled libraries from ARM GNU GCC Toolchain |
| 10:50AM |
2 |
[RFC] : LLVM IR should allow bitcast between address spaces with the same size |
| 10:26AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 9:41AM |
1 |
Exceptions not working when cross compiling for ARM Cortex M4 with clang and precompiled libraries from ARM GNU GCC Toolchain |
| 8:05AM |
0 |
IMPORTANT: Bugzilla migration is underway |
| 7:06AM |
0 |
Dumping branch weights in loop unroll phase |
| 7:05AM |
0 |
IMPORTANT: Bugzilla migration will commence in 1 hour |
| 1:43AM |
1 |
[GlobalISel] Why GlobalISel does not support big endian ISA? |
| |
| Wednesday November 24 2021 |
| Time | Replies | Subject |
|---|
| 10:48PM |
1 |
Question regarding correctness of debug information generated by LLC |
| 10:24PM |
1 |
Question regarding correctness of debug information generated by LLC |
| 9:45PM |
0 |
CANCELLED RISC-V LLVM sync-up call 25th November 2021 |
| 7:07PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 6:30PM |
1 |
Question about LLVM backend |
| 6:14PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 6:01PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 4:46PM |
1 |
Dumping branch weights in loop unroll phase |
| 4:22PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 1:20PM |
0 |
[GlobalISel] Why GlobalISel does not support big endian ISA? |
| 10:11AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 10:07AM |
2 |
Proposal: Introduce memory comparison intrinsics |
| 10:01AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 9:36AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 8:52AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 8:41AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 8:34AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 3:45AM |
0 |
LLVM build master will be restarted soon |
| |
| Tuesday November 23 2021 |
| Time | Replies | Subject |
|---|
| 11:16PM |
1 |
Complex intrinsics proposal and roundtable |
| 9:15PM |
0 |
[RFC] Asynchronous unwind tables attribute |
| 9:09PM |
1 |
-fhash-long-section-names=N, -fhashed-section-names=map.csv |
| 7:29PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 7:20PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 7:15PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 6:29PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 6:26PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 6:00PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 5:59PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 5:45PM |
2 |
Google summer code |
| 5:42PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 5:32PM |
1 |
[RFC] Proposal for TLX: Tensor LLVM eXtensions |
| 5:31PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 5:06PM |
0 |
How can I build LLVM with my gcc toolchain exactly |
| 5:03PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 5:00PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 4:53PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 4:50PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 4:49PM |
3 |
IMPORTANT: LLVM Bugzilla migration |
| 4:47PM |
1 |
[RFC] Raise the minimum Visual Studio version to VS2019 |
| 4:41PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 4:39PM |
2 |
IMPORTANT: LLVM Bugzilla migration |
| 4:37PM |
2 |
How to place a variable / function at a given absolute address in memory |
| 4:36PM |
2 |
IMPORTANT: LLVM Bugzilla migration |
| 4:29PM |
2 |
IMPORTANT: LLVM Bugzilla migration |
| 4:22PM |
2 |
IMPORTANT: LLVM Bugzilla migration |
| 4:03PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 3:58PM |
2 |
IMPORTANT: LLVM Bugzilla migration |
| 3:49PM |
6 |
IMPORTANT: LLVM Bugzilla migration |
| 2:56PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 1:45PM |
1 |
Google summer code |
| 12:57PM |
1 |
Use of C++17 in the LLVM codebase |
| 11:55AM |
2 |
[RFC] Raise the minimum Visual Studio version to VS2019 |
| 8:51AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 7:51AM |
1 |
Complex intrinsics proposal and roundtable |
| 7:30AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 7:29AM |
1 |
Proposal: Introduce memory comparison intrinsics |
| 6:58AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 5:02AM |
1 |
[External] Re: How can I build LLVM with my gcc toolchain exactly |
| 4:11AM |
2 |
IMPORTANT: LLVM Bugzilla migration |
| 3:14AM |
1 |
[External] Re: How can I build LLVM with my gcc toolchain exactly |
| 1:39AM |
1 |
DebugInfo: Couple of recent size underflow issues |
| 12:34AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 12:14AM |
1 |
DebugInfo: Couple of recent size underflow issues |
| |
| Monday November 22 2021 |
| Time | Replies | Subject |
|---|
| 11:45PM |
3 |
IMPORTANT: LLVM Bugzilla migration |
| 10:07PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 10:04PM |
0 |
Future of Loop Optimization Working Group |
| 9:36PM |
1 |
Improving LLVM string attributes |
| 9:25PM |
1 |
Exceptions not working when cross compiling for ARM Cortex M4 with clang and precompiled libraries from ARM GNU GCC Toolchain |
| 9:08PM |
1 |
lld suspect behavior .group/rela/text input sections |
| 9:03PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 8:35PM |
2 |
IMPORTANT: LLVM Bugzilla migration |
| 8:30PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 7:28PM |
1 |
Exceptions not working when cross compiling for ARM Cortex M4 with clang and precompiled libraries from ARM GNU GCC Toolchain |
| 6:18PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 6:08PM |
1 |
Why are the sanitizer compiled with -fno-stack-protector ? |
| 5:58PM |
0 |
LLVM Weekly - #412, November 22nd 2021 |
| 5:42PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 5:01PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 4:22PM |
3 |
Proposal: Introduce memory comparison intrinsics |
| 3:05PM |
1 |
When is it OK to use loads and stores with struct types ? |
| 2:02PM |
1 |
Question about LLVM backend and TableGen |
| 1:31PM |
1 |
How can I build LLVM with my gcc toolchain exactly |
| 1:22PM |
1 |
Question about LLVM backend and TableGen |
| 1:06PM |
1 |
How to get started with contribution |
| 10:58AM |
1 |
[RFC] Introduce non-capturing stores [second try] |
| 9:32AM |
2 |
clang-tidy pre-merge checks in Phabricator not working? |
| 9:28AM |
1 |
clang-tidy pre-merge checks in Phabricator not working? |
| 9:06AM |
1 |
clang-tidy pre-merge checks in Phabricator not working? |
| 9:04AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 7:46AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| |
| Sunday November 21 2021 |
| Time | Replies | Subject |
|---|
| 7:01PM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 6:46PM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 6:21PM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 2:58PM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 2:27PM |
0 |
How to get the passed Argument of every GPU kernel CallInst in LLVM-IR produced by HIPCC |
| 11:38AM |
2 |
IMPORTANT: LLVM Bugzilla migration |
| 11:29AM |
1 |
Exceptions not working when cross compiling for ARM Cortex M4 with clang and precompiled libraries from ARM GNU GCC Toolchain |
| 10:10AM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 1:02AM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 12:52AM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 12:36AM |
1 |
MemoryBuffer: Migrating to Expected/llvm::Error from ErrorOr/std::error_code |
| 12:33AM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 12:06AM |
1 |
[RFC] Asynchronous unwind tables attribute |
| |
| Saturday November 20 2021 |
| Time | Replies | Subject |
|---|
| 7:40PM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 7:12PM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 3:56PM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 2:22PM |
1 |
Exceptions not working when cross compiling for ARM Cortex M4 with clang and precompiled libraries from ARM GNU GCC Toolchain |
| 1:16PM |
1 |
Question about LLVM backend and TableGen |
| 11:58AM |
1 |
IMPORTANT: LLVM Bugzilla migration |
| 10:53AM |
6 |
IMPORTANT: LLVM Bugzilla migration |
| 10:12AM |
1 |
How to get started with contribution |
| 10:11AM |
0 |
fasm-blocks |
| 8:26AM |
1 |
[RFC] Asynchronous unwind tables attribute |
| 12:20AM |
1 |
Why are the sanitizer compiled with -fno-stack-protector ? |
| |
| Friday November 19 2021 |
| Time | Replies | Subject |
|---|
| 12:28PM |
1 |
How can I build LLVM with my gcc toolchain exactly |
| 3:29AM |
0 |
[Job Ad] SiFive is hiring LLVM developers! |
| |
| Thursday November 18 2021 |
| Time | Replies | Subject |
|---|
| 9:03PM |
2 |
Complex intrinsics proposal and roundtable |
| 6:47PM |
1 |
Strip IR metadata information in a unit test |
| 6:42PM |
1 |
Strip IR metadata information in a unit test |
| 6:33PM |
1 |
Strip IR metadata information in a unit test |
| 5:23PM |
1 |
Strip IR metadata information in a unit test |
| 5:14PM |
1 |
Strip IR metadata information in a unit test |
| |
| Wednesday November 17 2021 |
| Time | Replies | Subject |
|---|
| 11:56PM |
1 |
how to add createLowerSwitchPass to PassManager object? |
| 9:11PM |
1 |
Improving LLVM string attributes |
| 8:48PM |
1 |
NVPTX codegen for llvm.sin (and friends) |
| 8:17PM |
2 |
NVPTX codegen for llvm.sin (and friends) |
| 8:05PM |
1 |
NVPTX codegen for llvm.sin (and friends) |
| 7:46PM |
1 |
GitHub push access |
| 7:40PM |
1 |
NVPTX codegen for llvm.sin (and friends) |
| 7:20PM |
1 |
NVPTX codegen for llvm.sin (and friends) |
| 6:52PM |
0 |
LLD for Mach-O Round Table Agenda |
| 4:09PM |
1 |
Improving LLVM string attributes |
| 2:17PM |
2 |
[RFC] Introduction of the 'unknown_provenance' LLVM-IR constant |
| 1:08PM |
2 |
Bug 50482 - optimizer malloc |
| 11:18AM |
3 |
[RFC] Asynchronous unwind tables attribute |
| 4:44AM |
2 |
[RFC] Introduce non-capturing stores [second try] |
| 3:18AM |
1 |
Bug 50482 - optimizer malloc |
| 1:53AM |
2 |
Static Analysis for GPU Program Performance in LLVM |
| |
| Tuesday November 16 2021 |
| Time | Replies | Subject |
|---|
| 11:19PM |
1 |
Bug 50482 - optimizer malloc |
| 10:01PM |
1 |
Trouble with arcanist |
| 9:06PM |
1 |
Trouble with arcanist |
| 6:33PM |
1 |
Bug 50482 - optimizer malloc |
| 5:44PM |
1 |
Debug-info round table agenda |
| 1:07PM |
1 |
Missed optimization of bitwise expressions |
| 12:55PM |
1 |
Missed optimization of bitwise expressions |
| 11:07AM |
0 |
VPlan round table agenda |
| 9:11AM |
0 |
Get Error by using the pass "-targetpassconfig" with opt |
| 9:09AM |
2 |
Missed optimization of bitwise expressions |
| |
| Monday November 15 2021 |
| Time | Replies | Subject |
|---|
| 10:57PM |
0 |
2021 LLVM Developers' Meeting starts tomorrow! Registration required to participate. |
| 10:27PM |
1 |
status of CodeGen in new Pass Manager |
| 9:42PM |
1 |
status of CodeGen in new Pass Manager |
| 9:00PM |
1 |
status of CodeGen in new Pass Manager |
| 7:48PM |
1 |
status of CodeGen in new Pass Manager |
| 6:34PM |
1 |
status of CodeGen in new Pass Manager |
| 6:18PM |
3 |
[RFC] Proposal for TLX: Tensor LLVM eXtensions |
| 6:16PM |
0 |
LLVM Weekly - #411, November 15th 2021 |
| 6:12PM |
1 |
Broken LIT tests on Sanitizer Builds |
| 6:11PM |
1 |
Broken LIT tests on Sanitizer Builds |
| 6:07PM |
1 |
Broken LIT tests on Sanitizer Builds |
| 2:46PM |
0 |
An update on the Program Repository Project |
| 8:39AM |
1 |
objcopy --prefix-symbols and undefined symbols |
| 7:25AM |
1 |
ORC JIT Weekly #44 -- MachO debugging support enabled |
| 3:33AM |
0 |
LLVM GPU News #23, November 12 2021 |
| |
| Sunday November 14 2021 |
| Time | Replies | Subject |
|---|
| 10:16PM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 3:52PM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 2:09PM |
1 |
Auto-vectorization command flag not work in clang-13 |
| |
| Saturday November 13 2021 |
| Time | Replies | Subject |
|---|
| 3:07PM |
1 |
[cfe-dev] Update on Bugzilla migration |
| 6:14AM |
1 |
status of CodeGen in new Pass Manager |
| 2:01AM |
1 |
[RFC] Removing optimization size level from LLVM and relying on minsize/optsize |
| 1:09AM |
1 |
how to add createLowerSwitchPass to PassManager object? |
| 1:01AM |
1 |
objcopy --prefix-symbols and undefined symbols |
| 12:03AM |
0 |
[EXTERNAL] Re: [RFC] Removing optimization size level from LLVM and relying on minsize/optsize |
| |
| Friday November 12 2021 |
| Time | Replies | Subject |
|---|
| 11:07PM |
1 |
[RFC] Removing optimization size level from LLVM and relying on minsize/optsize |
| 10:17PM |
1 |
status of CodeGen in new Pass Manager |
| 10:17PM |
1 |
[RFC] Removing optimization size level from LLVM and relying on minsize/optsize |
| 9:31PM |
1 |
[RFC] Removing optimization size level from LLVM and relying on minsize/optsize |
| 8:11PM |
2 |
[cfe-dev] Update on Bugzilla migration |
| 8:09PM |
1 |
[RFC] Removing optimization size level from LLVM and relying on minsize/optsize |
| 8:03PM |
2 |
[RFC] Removing optimization size level from LLVM and relying on minsize/optsize |
| 7:53PM |
1 |
Update on Bugzilla migration |
| 7:48PM |
1 |
Update on Bugzilla migration |
| 7:45PM |
3 |
Update on Bugzilla migration |
| 7:36PM |
1 |
Update on Bugzilla migration |
| 7:30PM |
1 |
lld suspect behavior .group/rela/text input sections |
| 7:28PM |
1 |
[RFC] Proposal for TLX: Tensor LLVM eXtensions |
| 7:15PM |
1 |
Update on Bugzilla migration |
| 6:55PM |
1 |
status of CodeGen in new Pass Manager |
| 6:54PM |
1 |
how to add createLowerSwitchPass to PassManager object? |
| 6:51PM |
1 |
status of CodeGen in new Pass Manager |
| 6:30PM |
0 |
[Job Ad] LLVM jobs at MediaTek |
| 6:26PM |
2 |
status of CodeGen in new Pass Manager |
| 4:39PM |
0 |
[IR] GlobalIFunc with declaration as resolver |
| 8:21AM |
1 |
[DebugInfo][RFC] Enabling "instruction referencing" variable locations for x86_64 |
| |
| Thursday November 11 2021 |
| Time | Replies | Subject |
|---|
| 11:21PM |
1 |
How to get the TypeIndex for the class/structure given its member function's TypeIndex in PdbAstBuilder? |
| 10:41PM |
1 |
[DebugInfo][RFC] Enabling "instruction referencing" variable locations for x86_64 |
| 9:08PM |
1 |
New Pass Manager '<' '>' syntax |
| 8:41PM |
1 |
New Pass Manager '<' '>' syntax |
| 8:17PM |
0 |
Assembler Validates Instruction's Immediate Input |
| 7:59PM |
1 |
Missed optimization of bitwise expressions |
| 7:48PM |
1 |
[DebugInfo][RFC] Enabling "instruction referencing" variable locations for x86_64 |
| 6:58PM |
2 |
Should we have a "GPU working group"? |
| 6:53PM |
1 |
Should we have a "GPU working group"? |
| 6:51PM |
1 |
Should we have a "GPU working group"? |
| 6:32PM |
1 |
Should we have a "GPU working group"? |
| 6:22PM |
3 |
Should we have a "GPU working group"? |
| 5:02PM |
1 |
[RFC] Simple GVN hoist |
| 4:47PM |
0 |
Should we have a "GPU working group"? |
| 4:39PM |
1 |
Should we have a "GPU working group"? |
| 4:35PM |
2 |
Missed optimization of bitwise expressions |
| 3:44PM |
2 |
Should we have a "GPU working group"? |
| 2:54PM |
1 |
Where does doInitialization() fit into the new PassManager model? |
| 12:16PM |
0 |
CANCELLED RISC-V LLVM sync-up call 11th November 2021 |
| 11:34AM |
1 |
Missed optimization of bitwise expressions |
| 8:34AM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 8:09AM |
1 |
Proposal: Make the VE target official |
| |
| Wednesday November 10 2021 |
| Time | Replies | Subject |
|---|
| 9:03PM |
1 |
Should we have a "GPU working group"? |
| 8:56PM |
2 |
Should we have a "GPU working group"? |
| 7:48PM |
1 |
[DebugInfo][RFC] Enabling "instruction referencing" variable locations for x86_64 |
| 6:15PM |
0 |
Does TSA support recursive/re-entrant mutexes? |
| 5:52PM |
1 |
Proposal: Make the VE target official |
| 5:00PM |
1 |
Proposal: Make the VE target official |
| 2:34PM |
1 |
PowerPC LLVM support much appreciated |
| 2:08PM |
2 |
Proposal: Make the VE target official |
| 2:06PM |
1 |
PowerPC LLVM support much appreciated |
| 1:47PM |
1 |
PowerPC LLVM support much appreciated |
| 9:46AM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 9:30AM |
1 |
Speculative FP operation. |
| 9:30AM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 8:25AM |
1 |
Adding a new polymorphic type for the WebAssembly backend |
| |
| Tuesday November 9 2021 |
| Time | Replies | Subject |
|---|
| 11:59PM |
0 |
[RFC] MLGO Regalloc: learned eviction policy for regalloc |
| 9:32PM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 9:23PM |
1 |
[EXTERNAL] [RFC] [llvm-cov] Renaming option -name-whitelist to -name-allowlist in llvm-cov |
| 9:21PM |
1 |
RFC: Source-based MC/DC Code Coverage |
| 8:44PM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 7:57PM |
0 |
[Job Ad] Cerebras is hiring LLVM developers! |
| 7:17PM |
1 |
[RFC] [llvm-cov] Renaming option -name-whitelist to -name-allowlist in llvm-cov |
| 6:10PM |
1 |
Where does doInitialization() fit into the new PassManager model? |
| 5:02PM |
1 |
[RFC] Introduce non-capturing stores [second try] |
| 3:43PM |
0 |
Future of Loop Optimization Working Group |
| 10:47AM |
0 |
Trip counts for loops with unknown strides |
| 8:57AM |
1 |
Understanding and controlling some of the AVX shuffle emission paths |
| 3:59AM |
1 |
Where does doInitialization() fit into the new PassManager model? |
| 3:58AM |
0 |
How should i know a clang flag option is default on? |
| 12:36AM |
1 |
Memory SSA for this problem? |
| |
| Monday November 8 2021 |
| Time | Replies | Subject |
|---|
| 10:53PM |
4 |
[RFC] Introduce non-capturing stores [second try] |
| 10:37PM |
1 |
[RFC] Simple GVN hoist |
| 9:43PM |
1 |
Proposal: Make the VE target official |
| 9:41PM |
1 |
Memory SSA for this problem? |
| 8:19PM |
1 |
Memory SSA for this problem? |
| 7:44PM |
0 |
[InstrProfiling] Lightweight Instrumentation |
| 6:04PM |
0 |
LLVM Weekly - #410, November 8th 2021 |
| 3:52PM |
2 |
Proposal: Make the VE target official |
| 3:31PM |
1 |
Re-using a node in a DAG output pattern in TableGen |
| 2:54PM |
1 |
Proposal: Make the VE target official |
| 2:37PM |
0 |
AArch64 immediate expansion questions |
| 12:37PM |
1 |
Re-using a node in a DAG output pattern in TableGen |
| 10:09AM |
1 |
Proposal: Make the VE target official |
| 7:58AM |
0 |
Getting Code coverage in memory/queue |
| 6:07AM |
0 |
ORC JIT Weekly #43 -- MachOPlatform updated to use allocation actions |
| 5:03AM |
1 |
Proposal: writing calls that can nevertheless be removed |
| 4:56AM |
0 |
LLVM build master will be restarted soon |
| |
| Sunday November 7 2021 |
| Time | Replies | Subject |
|---|
| 11:38PM |
1 |
Statepoint GC: query about non-relocating statepoints and instcombine |
| 12:21PM |
1 |
Accidental Remote Branches Created on Github |
| 8:02AM |
0 |
[BPF] Change the JMP instruction format in LLVM? |
| |
| Saturday November 6 2021 |
| Time | Replies | Subject |
|---|
| 6:46PM |
1 |
Accidental Remote Branches Created on Github |
| 7:44AM |
2 |
Scalar Evolution Analysis |
| 12:56AM |
3 |
Accidental Remote Branches Created on Github |
| 12:48AM |
1 |
Accidental Remote Branches Created on Github |
| |
| Friday November 5 2021 |
| Time | Replies | Subject |
|---|
| 12:59AM |
1 |
RFC: IR metadata format for MemProf |
| 12:17AM |
0 |
Does TSA support recursive/re-entrant mutexes? |
| |
| Thursday November 4 2021 |
| Time | Replies | Subject |
|---|
| 11:20PM |
1 |
Beginner's first contribution |
| 4:14PM |
1 |
k registers in extended asm |
| 2:48PM |
0 |
MLGO monthly meeting this Friday (Nov 6) |
| 12:42PM |
1 |
Preparing BOLT for LLVM monorepo |
| |
| Wednesday November 3 2021 |
| Time | Replies | Subject |
|---|
| 10:53PM |
0 |
RFC: Generalizing Hexagon's VLIWMachineScheduler |
| 7:53PM |
1 |
Consolidating copies of google/benchmark in the repo (Was: Proposal: introduce dependency on abseil when building benchmarks) |
| 5:27PM |
0 |
SBCC Code Coverage |
| 4:51PM |
0 |
[2021 LLVM Dev Mtg] Last call for round tables |
| 1:06PM |
1 |
SCEV on vector element |
| 12:51PM |
1 |
Proposal: Make the VE target official |
| 8:50AM |
1 |
Preparing BOLT for LLVM monorepo |
| 8:28AM |
1 |
Preparing BOLT for LLVM monorepo |
| 7:04AM |
1 |
Preparing BOLT for LLVM monorepo |
| 6:37AM |
3 |
Preparing BOLT for LLVM monorepo |
| 1:50AM |
2 |
Proposal: writing calls that can nevertheless be removed |
| |
| Tuesday November 2 2021 |
| Time | Replies | Subject |
|---|
| 11:12PM |
1 |
LiveRegUnits vs LivePhysRegs |
| 11:09PM |
1 |
[RFC] Eliminating non-IR floating-point controls in the selection DAG |
| 10:15PM |
1 |
Preparing BOLT for LLVM monorepo |
| 9:56PM |
1 |
Preparing BOLT for LLVM monorepo |
| 9:30PM |
1 |
Preparing BOLT for LLVM monorepo |
| 8:58PM |
1 |
Preparing BOLT for LLVM monorepo |
| 8:52PM |
6 |
Preparing BOLT for LLVM monorepo |
| 7:08PM |
1 |
LiveRegUnits vs LivePhysRegs |
| 5:40PM |
1 |
[RFC] llvm-bisectd: a bisection daemon for supporting bisection with parallel builds |
| 5:22PM |
1 |
[RFC] llvm-bisectd: a bisection daemon for supporting bisection with parallel builds |
| 4:00PM |
1 |
Getting SMLoc from debug metadata |
| 2:28PM |
1 |
Getting SMLoc from debug metadata |
| 2:01PM |
1 |
[lldb-dev] Upstream an LLDB language plugin for D and support of custom expressions |
| 1:33PM |
0 |
Does TSA support recursive/re-entrant mutexes? |
| 11:51AM |
1 |
LiveRegUnits vs LivePhysRegs |
| 10:56AM |
1 |
External linkage functions which allocate memory |
| 9:16AM |
1 |
[External] Re: Performance benefits shown in [RFC: CSSPGO with Pseudo-Instrumentation] can't be reproduced. |
| 7:43AM |
1 |
Proposal: writing calls that can nevertheless be removed |
| 7:40AM |
1 |
Proposal: writing calls that can nevertheless be removed |
| 6:42AM |
1 |
[External] Re: Performance benefits shown in [RFC: CSSPGO with Pseudo-Instrumentation] can't be reproduced. |
| 6:07AM |
1 |
lld suspect behavior .group/rela/text input sections |
| 5:59AM |
0 |
[RFC] Eliminating non-IR floating-point controls in the selection DAG |
| 12:12AM |
0 |
[RFC] Eliminating non-IR floating-point controls in the selection DAG |
| |
| Monday November 1 2021 |
| Time | Replies | Subject |
|---|
| 8:39PM |
0 |
RFC: Code Review Process |
| 8:38PM |
0 |
"Trojan Source" response |
| 8:18PM |
1 |
Moderators urgently needed for 2021 LLVM Dev Mtg |
| 7:15PM |
1 |
Consolidating copies of google/benchmark in the repo (Was: Proposal: introduce dependency on abseil when building benchmarks) |
| 7:05PM |
1 |
RFC: IR metadata format for MemProf |
| 6:52PM |
1 |
[RFC] Pointer authentication for arm64e |
| 6:37PM |
1 |
[RFC] Pointer authentication for arm64e |
| 6:22PM |
1 |
lld suspect behavior .group/rela/text input sections |
| 6:15PM |
0 |
target ABI: call parameters handling |
| 6:10PM |
0 |
LLVM Weekly - #409, November 1st 2021 |
| 5:51PM |
1 |
Consolidating copies of google/benchmark in the repo (Was: Proposal: introduce dependency on abseil when building benchmarks) |
| 5:39PM |
1 |
Consolidating copies of google/benchmark in the repo (Was: Proposal: introduce dependency on abseil when building benchmarks) |
| 4:39PM |
1 |
[DebugInfo] Bugs when emitting debug info with inlined functions |
| 4:13PM |
3 |
Update on Bugzilla migration |
| 4:03PM |
1 |
Proposal: writing calls that can nevertheless be removed |
| 3:34PM |
1 |
Proposal: writing calls that can nevertheless be removed |
| 3:05PM |
1 |
Proposal: writing calls that can nevertheless be removed |
| 2:54PM |
0 |
Consolidating copies of google/benchmark in the repo (Was: Proposal: introduce dependency on abseil when building benchmarks) |
| 1:33PM |
0 |
[RFC] Eliminating non-IR floating-point controls in the selection DAG |
| 12:27PM |
2 |
Proposal: writing calls that can nevertheless be removed |
| 11:36AM |
1 |
Question about hoisting LoadInst in LICM pass using MemorySSA/AliasAnalysis |
| 10:35AM |
1 |
run-clang-tidy |
| 9:02AM |
1 |
Question about hoisting LoadInst in LICM pass using MemorySSA/AliasAnalysis |
| 8:39AM |
1 |
Question about hoisting LoadInst in LICM pass using MemorySSA/AliasAnalysis |
| 7:47AM |
1 |
Question about hoisting LoadInst in LICM pass using MemorySSA/AliasAnalysis |