Tuesday October 31 2017 |
Time | Replies | Subject |
11:55PM |
3 |
Cross compiling for Baremetal ARM without using GCC |
11:01PM |
0 |
Using C++14 code in LLVM |
10:45PM |
2 |
Using C++14 code in LLVM |
10:26PM |
0 |
Using C++14 code in LLVM |
10:22PM |
0 |
Status of llvm.invariant.{start|end} |
10:21PM |
2 |
A query language for LLVM IR (XPath) |
10:18PM |
3 |
Using C++14 code in LLVM |
10:00PM |
1 |
[RFC] ASan: patches to support 32-byte shadow granularity |
9:56PM |
0 |
Using C++14 code in LLVM |
9:45PM |
4 |
Using C++14 code in LLVM |
9:29PM |
2 |
[RFC] ASan: patches to support 32-byte shadow granularity |
9:22PM |
0 |
Using C++14 code in LLVM |
9:11PM |
3 |
Using C++14 code in LLVM |
9:08PM |
2 |
Using C++14 code in LLVM |
9:07PM |
2 |
Status of llvm.invariant.{start|end} |
8:57PM |
0 |
Using C++14 code in LLVM |
7:50PM |
0 |
Status of llvm.invariant.{start|end} |
7:38PM |
2 |
Less aggressive on the first allocation of CSR if detecting an early exit |
6:49PM |
0 |
Using lnt to track lld performance |
6:43PM |
1 |
PGO — opt -instrprof pass programatically? |
6:02PM |
2 |
lld: sigbus error handling |
5:00PM |
0 |
A query language for LLVM IR (XPath) |
4:17PM |
2 |
Status of llvm.invariant.{start|end} |
3:18PM |
0 |
Status of llvm.invariant.{start|end} |
3:03PM |
2 |
Reaching definitions on Machine IR post register allocation |
10:02AM |
1 |
RFC: Generate plain !tbaa tags in place of !tbaa.struct ones |
9:49AM |
0 |
Reaching definitions on Machine IR post register allocation |
8:44AM |
2 |
RFC: Generate plain !tbaa tags in place of !tbaa.struct ones |
8:37AM |
3 |
An ambiguity in TBAA info format |
3:46AM |
1 |
LLVM PDB Support |
3:11AM |
0 |
RFC: Generate plain !tbaa tags in place of !tbaa.struct ones |
1:20AM |
0 |
Less aggressive on the first allocation of CSR if detecting an early exit |
12:24AM |
0 |
Gold linker warning: Cannot export local symbol |
|
Monday October 30 2017 |
Time | Replies | Subject |
11:48PM |
0 |
An ambiguity in TBAA info format |
11:33PM |
1 |
lld: sigbus error handling |
11:32PM |
0 |
lld: sigbus error handling |
11:31PM |
0 |
lld: sigbus error handling |
11:16PM |
1 |
EnableFastISel |
11:09PM |
0 |
November LLVM bay-area social is this Thursday! |
9:57PM |
2 |
An ambiguity in TBAA info format |
9:50PM |
0 |
EnableFastISel |
9:12PM |
2 |
lld: sigbus error handling |
9:03PM |
0 |
lld: sigbus error handling |
8:54PM |
0 |
[llvm-dev, cfe-dev] Fix failures uncovered by randomly shuffling containers before sorting |
8:43PM |
0 |
LLVM PDB Support |
8:41PM |
0 |
Code coverage BoF - notes and updates |
8:09PM |
0 |
LLVM Weekly - #200, Oct 30th 2017 |
5:20PM |
2 |
Less aggressive on the first allocation of CSR if detecting an early exit |
5:12PM |
0 |
adding msvcr100.dll interception support to compiler-rt ? |
4:27PM |
0 |
LLVM Fatal Error: Alignment is limited to 32 bytes |
3:48PM |
0 |
Flaky dataflow sanitizer test |
11:16AM |
1 |
RFC: Adding a JSON library to LLVM Support |
9:37AM |
1 |
LLVM PDB Support |
9:13AM |
0 |
Reaching definitions on Machine IR post register allocation |
9:09AM |
0 |
LLVM PDB Support |
7:03AM |
4 |
LLVM PDB Support |
1:01AM |
2 |
Status of llvm.invariant.{start|end} |
|
Sunday October 29 2017 |
Time | Replies | Subject |
11:55PM |
0 |
CCState.AllocateRegBlock from TargetCallingConv.td? |
10:59PM |
0 |
Sparc64 stack realignment broken |
10:19PM |
0 |
RFC: Adding a JSON library to LLVM Support |
4:04PM |
0 |
Updating LLVM Publications Page |
3:30PM |
4 |
Updating LLVM Publications Page |
2:08PM |
3 |
adding msvcr100.dll interception support to compiler-rt ? |
1:49PM |
2 |
A query language for LLVM IR (XPath) |
3:23AM |
0 |
Name of libllvm-5.0 on ubuntu xenial is libllvm5.0? |
|
Saturday October 28 2017 |
Time | Replies | Subject |
11:45PM |
0 |
Updating LLVM Publications Page |
11:07PM |
1 |
lld: Merging Symbol and SymbolBody |
4:42PM |
1 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
9:45AM |
1 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
9:22AM |
2 |
Updating LLVM Publications Page |
8:28AM |
1 |
LLVM 3.3 path profiling output reader |
1:30AM |
0 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
12:51AM |
2 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
12:01AM |
0 |
Infinite loops with no side effects |
|
Friday October 27 2017 |
Time | Replies | Subject |
11:50PM |
0 |
Less aggressive on the first allocation of CSR if detecting an early exit |
8:32PM |
2 |
Less aggressive on the first allocation of CSR if detecting an early exit |
8:23PM |
1 |
RFC: Adding a JSON library to LLVM Support |
8:12PM |
4 |
Infinite loops with no side effects |
8:08PM |
0 |
Infinite loops with no side effects |
8:06PM |
0 |
RFC: Adding a JSON library to LLVM Support |
7:53PM |
10 |
RFC: Adding a JSON library to LLVM Support |
7:51PM |
2 |
Infinite loops with no side effects |
7:37PM |
0 |
Infinite loops with no side effects |
6:36PM |
0 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
6:31PM |
1 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
6:27PM |
1 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
6:15PM |
0 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
6:10PM |
5 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
4:47PM |
0 |
LLVM buildmaster will be updated and restarted tonight |
3:38PM |
0 |
LLVM Compiler Social Zurich - November 9, 2017 - RISC-V @ETH Tech talk |
2:03PM |
0 |
Arm HPC Workshop - 12/13th Dec - Tokyo |
1:01PM |
0 |
[JIT] Correct memory mapping? - SOLVED |
12:03PM |
3 |
Dominator tree side effect or intentional |
10:28AM |
1 |
Profiling data structure |
10:22AM |
0 |
Why does LLVm 3.8.0 recognize fputs_unlocked as a vararg function? |
10:01AM |
2 |
Why does LLVm 3.8.0 recognize fputs_unlocked as a vararg function? |
8:50AM |
0 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
5:08AM |
3 |
Infinite loops with no side effects |
4:01AM |
3 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
3:56AM |
0 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
3:42AM |
0 |
Updating LLVM Publications Page |
3:14AM |
6 |
RFC: We need to explicitly state that some functions are reserved by LLVM |
1:52AM |
0 |
Small change to Codegen prepare |
1:18AM |
2 |
Publication - Devirtualization in LLVM |
12:12AM |
0 |
LLVM 6.0's LoopUnroll PASS is not able to work? |
|
Thursday October 26 2017 |
Time | Replies | Subject |
11:09PM |
1 |
[lld] Flavour option purpose |
9:45PM |
1 |
custom-crossover libFuzzer test |
9:30PM |
2 |
[lld] Flavour option purpose |
9:20PM |
0 |
[lld] Flavour option purpose |
9:06PM |
4 |
[lld] Flavour option purpose |
8:52PM |
0 |
RFC: Switching to the new pass manager by default |
8:43PM |
1 |
[RFC] Making .eh_frame more linker-friendly |
8:16PM |
3 |
RFC: Switching to the new pass manager by default |
8:13PM |
4 |
[RFC] Making .eh_frame more linker-friendly |
8:05PM |
0 |
RFC: Switching to the new pass manager by default |
7:20PM |
0 |
Autocompletion support for llvm opt flags |
7:09PM |
1 |
RFC: Switching to the new pass manager by default |
6:58PM |
0 |
[RFC] Making .eh_frame more linker-friendly |
6:47PM |
1 |
RFC: Adding bit to register MachineOperands to allow post-RA register renaming |
6:19PM |
4 |
[RFC] Making .eh_frame more linker-friendly |
6:07PM |
0 |
Profiling data structure |
6:00PM |
0 |
Whither/whether -mtune support? |
5:56PM |
0 |
[PATCH/RFC] Modifying reassociate for improved CSE: fairly large perf gains |
5:52PM |
0 |
RFC: Adding bit to register MachineOperands to allow post-RA register renaming |
5:40PM |
2 |
Autocompletion support for llvm opt flags |
5:13PM |
0 |
RFC: Switching to the new pass manager by default |
4:54PM |
1 |
LLVM 6.0's LoopUnroll PASS is not able to work? |
4:47PM |
0 |
[RFC] Making .eh_frame more linker-friendly |
3:50PM |
0 |
LLVM disagrees with GCC on bitfield handling |
3:34PM |
2 |
Updating LLVM Publications Page |
2:14PM |
0 |
many warnings building llvm components |
2:10PM |
0 |
error building lldb-server |
12:57PM |
0 |
lli issue with interpreter - "Unknown constant pointer type!" |
12:54PM |
3 |
RFC: Adding bit to register MachineOperands to allow post-RA register renaming |
9:19AM |
1 |
[PATCH for-next 7/9] coverage: introduce support for llvm profiling |
9:19AM |
2 |
[PATCH for-next 0/9] LLVM coverage support for Xen |
8:31AM |
2 |
Profiling data structure |
3:04AM |
1 |
Is every intrinsic norecurse? |
2:20AM |
0 |
LLVM v6.0 Internalize and GlobalDCE PASS can not work together? |
2:07AM |
2 |
LLVM v6.0 Internalize and GlobalDCE PASS can not work together? |
1:42AM |
3 |
[RFC] Making .eh_frame more linker-friendly |
12:41AM |
1 |
[LV] [ScalarEvolution] Feedback on bug 34965 - After r311849 Loop Vectorizer crashes with "The instruction should be scalarized" |
12:32AM |
0 |
[LV] [ScalarEvolution] Feedback on bug 34965 - After r311849 Loop Vectorizer crashes with "The instruction should be scalarized" |
12:29AM |
0 |
How vregs are assigned to operands in IR |
12:28AM |
0 |
[SelectionDAG] Assertion due to MachineMemOperand flags difference. |
12:21AM |
2 |
[LV] [ScalarEvolution] Feedback on bug 34965 - After r311849 Loop Vectorizer crashes with "The instruction should be scalarized" |
|
Wednesday October 25 2017 |
Time | Replies | Subject |
11:28PM |
0 |
[cfe-dev] [RFC] Open sourcing and contributing TAPI back to the LLVM community |
11:21PM |
3 |
How vregs are assigned to operands in IR |
10:21PM |
1 |
Code coverage BoF - notes and updates |
9:45PM |
0 |
Code coverage BoF - notes and updates |
8:20PM |
0 |
RFC: Adding bit to register MachineOperands to allow post-RA register renaming |
6:48PM |
1 |
Lowering llvm.memset for ARM target |
6:36PM |
2 |
[PATCH/RFC] Modifying reassociate for improved CSE: fairly large perf gains |
6:17PM |
0 |
RFC: Switching to the new pass manager by default |
5:50PM |
1 |
Setting the value of MicroOpBufferSize correctly |
5:42PM |
1 |
RFC: Switching to the new pass manager by default |
5:38PM |
5 |
RFC: Switching to the new pass manager by default |
5:32PM |
0 |
RFC: Switching to the new pass manager by default |
5:27PM |
2 |
RFC: Adding bit to register MachineOperands to allow post-RA register renaming |
5:21PM |
0 |
RFC: Switching to the new pass manager by default |
5:19PM |
2 |
RFC: Switching to the new pass manager by default |
5:16PM |
0 |
RFC: Switching to the new pass manager by default |
5:14PM |
2 |
RFC: Switching to the new pass manager by default |
5:10PM |
0 |
RFC: Switching to the new pass manager by default |
4:13PM |
0 |
Profiling data structure |
3:22PM |
0 |
Lowering llvm.memset for ARM target |
2:59PM |
0 |
Empty implementation of SchedulingPriorityQueue::dump |
2:34PM |
2 |
Empty implementation of SchedulingPriorityQueue::dump |
1:20PM |
0 |
LLVM v6.0 Internalize and GlobalDCE PASS can not work together? |
1:12PM |
0 |
[JIT] Correct memory mapping? |
12:34PM |
1 |
Jacobi 5 Point Stencil Code not Vectorizing |
10:47AM |
0 |
Code coverage BoF - notes and updates |
9:06AM |
0 |
Profiling data structure |
8:37AM |
0 |
Finding the entry point function in a LLVM IR |
7:26AM |
4 |
Profiling data structure |
4:34AM |
1 |
Finding the entry point function in a LLVM IR |
4:22AM |
3 |
LLVM v6.0 Internalize and GlobalDCE PASS can not work together? |
2:01AM |
1 |
linkonce expected behavior? |
1:49AM |
0 |
linkonce expected behavior? |
1:41AM |
2 |
linkonce expected behavior? |
1:27AM |
0 |
linkonce expected behavior? |
1:09AM |
2 |
linkonce expected behavior? |
12:28AM |
0 |
custom-crossover libFuzzer test |
|
Tuesday October 24 2017 |
Time | Replies | Subject |
11:55PM |
2 |
custom-crossover libFuzzer test |
9:51PM |
0 |
llvm-rc option parsing |
9:49PM |
2 |
llvm-rc option parsing |
9:48PM |
0 |
[ThinLTO] static library failure with object files with the same name |
9:06PM |
2 |
Code coverage BoF - notes and updates |
8:53PM |
0 |
Code coverage BoF - notes and updates |
8:52PM |
0 |
Full-time job ad: Dynamic Analysis Engineer @ Apple |
8:24PM |
7 |
Code coverage BoF - notes and updates |
8:17PM |
1 |
Jacobi 5 Point Stencil Code not Vectorizing |
6:37PM |
0 |
Jacobi 5 Point Stencil Code not Vectorizing |
1:30PM |
3 |
Jacobi 5 Point Stencil Code not Vectorizing |
4:52AM |
2 |
LLVM 6.0's LoopUnroll PASS is not able to work? |
4:19AM |
0 |
LLVM 6.0's LoopUnroll PASS is not able to work? |
3:09AM |
0 |
[cfe-dev] [RFC] Open sourcing and contributing TAPI back to the LLVM community |
2:49AM |
0 |
lld: sigbus error handling |
1:48AM |
1 |
lld: sigbus error handling |
1:48AM |
3 |
lld: sigbus error handling |
1:40AM |
0 |
lld: sigbus error handling |
1:30AM |
3 |
lld: sigbus error handling |
12:28AM |
0 |
lld: sigbus error handling |
|
Monday October 23 2017 |
Time | Replies | Subject |
10:49PM |
2 |
lld: sigbus error handling |
10:40PM |
0 |
lld: sigbus error handling |
10:21PM |
8 |
lld: sigbus error handling |
9:59PM |
0 |
maximum value for alignstack function attribute? |
9:55PM |
2 |
EnableFastISel |
9:29PM |
0 |
PHI node entries do not match predecessors! |
8:28PM |
1 |
[Green Dragon] Green Dragon Reboot Tonight |
8:02PM |
3 |
maximum value for alignstack function attribute? |
6:22PM |
0 |
LLVM Weekly - #199, Oct 23rd 2017 |
2:19PM |
2 |
Correctly linking against libLLVM (single shared library build) |
2:07PM |
0 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
1:02PM |
0 |
Replace "while" "for" loops with "If-Else" |
11:12AM |
2 |
Finding the entry point function in a LLVM IR |
9:38AM |
0 |
RFC: Switching to the new pass manager by default |
8:03AM |
0 |
Finding the entry point function in a LLVM IR |
6:58AM |
0 |
Jacobi 5 Point Stencil Code not Vectorizing |
6:37AM |
3 |
Jacobi 5 Point Stencil Code not Vectorizing |
3:19AM |
0 |
LLVM Monorepo + YouCompleteMe |
2:06AM |
0 |
Removing the register block in MIR |
|
Sunday October 22 2017 |
Time | Replies | Subject |
6:32PM |
2 |
Replace "while" "for" loops with "If-Else" |
4:37PM |
0 |
How to dump broken IR from LLVM backend? |
7:50AM |
2 |
How to dump broken IR from LLVM backend? |
7:49AM |
1 |
Adding comments to LLVM IR during code generation |
6:53AM |
0 |
How to dump broken IR from LLVM backend? |
6:45AM |
2 |
How to dump broken IR from LLVM backend? |
6:31AM |
0 |
Replace "while" "for" loops with "If-Else" |
6:17AM |
0 |
How to dump broken IR from LLVM backend? |
5:51AM |
2 |
Replace "while" "for" loops with "If-Else" |
4:33AM |
2 |
How to dump broken IR from LLVM backend? |
|
Saturday October 21 2017 |
Time | Replies | Subject |
10:07PM |
1 |
LLVM ERROR: Cannot select: t29: v32f64 = X86ISD::VBROADCAST t9 |
8:21PM |
0 |
Jacobi 5 Point Stencil Code not Vectorizing |
5:43PM |
2 |
conceiving of a frontend feature which requires LLVM support: builtin to determine stack size upper bound |
11:51AM |
2 |
Finding the entry point function in a LLVM IR |
10:58AM |
0 |
Whither/whether -mtune support? |
10:08AM |
1 |
Polly and optimisations |
8:59AM |
1 |
How to use SplitBlockAndInsertIfThen() correctly? |
3:41AM |
0 |
[X86] How to query for Opcode type? |
3:30AM |
2 |
[X86] How to query for Opcode type? |
12:07AM |
2 |
Removing the register block in MIR |
|
Friday October 20 2017 |
Time | Replies | Subject |
10:50PM |
0 |
LLVM buildmaster will be updated and restarted tonight |
10:16PM |
6 |
Whither/whether -mtune support? |
10:16PM |
0 |
"Invalid offset in fixup!"' failed |
9:26PM |
1 |
[RFC] Polly Status and Integration |
8:50PM |
0 |
[RFC] Polly Status and Integration |
6:09PM |
0 |
LLVM cross-compilation cmake issues |
7:22AM |
0 |
Monorepo Arcanist Config? |
7:16AM |
0 |
Monorepo Arcanist Config? |
5:36AM |
0 |
Is every intrinsic norecurse? |
5:23AM |
2 |
Is every intrinsic norecurse? |
1:35AM |
0 |
How to create a 64 bit ConstInt having a value of -1? |
12:26AM |
0 |
Bugzilla github login support |
12:26AM |
2 |
How to create a 64 bit ConstInt having a value of -1? |
|
Thursday October 19 2017 |
Time | Replies | Subject |
9:08PM |
1 |
Adding a third-party dependency in clang-tools-extra |
8:58PM |
1 |
Why x86_64 divq is not used for 128-bit by 64-bit division? |
8:54PM |
0 |
Why x86_64 divq is not used for 128-bit by 64-bit division? |
8:47PM |
2 |
Why x86_64 divq is not used for 128-bit by 64-bit division? |
8:20PM |
0 |
Adding a third-party dependency in clang-tools-extra |
7:55PM |
0 |
LLVM Installation failing |
7:01PM |
0 |
Unable to vectorize stream_cluster distance code |
6:23PM |
2 |
Adding a third-party dependency in clang-tools-extra |
6:06PM |
2 |
Adding a third-party dependency in clang-tools-extra |
4:58PM |
0 |
RFC: AArch64 SVE Assembler/Disassembler patches |
4:50PM |
0 |
Adding a third-party dependency in clang-tools-extra |
3:42PM |
2 |
RFC: AArch64 SVE Assembler/Disassembler patches |
2:39PM |
1 |
RFC: Switching to the new pass manager by default |
1:44PM |
0 |
RFC: AArch64 SVE Assembler/Disassembler patches |
12:12PM |
2 |
RFC: AArch64 SVE Assembler/Disassembler patches |
11:50AM |
0 |
RFC: Switching to the new pass manager by default |
10:48AM |
3 |
Adding a third-party dependency in clang-tools-extra |
7:50AM |
0 |
Using LINK_COMPONENTS with add_llvm_loadable_module |
12:44AM |
0 |
[PATCH] [CMake] Allow parent projects to use in-source builds |
|
Wednesday October 18 2017 |
Time | Replies | Subject |
11:47PM |
2 |
[PATCH] [CMake] Allow parent projects to use in-source builds |
10:03PM |
2 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
5:24PM |
0 |
Is every intrinsic norecurse? |
5:24PM |
2 |
LLVM Installation failing |
4:36PM |
1 |
RFC: Switching to the new pass manager by default |
3:54PM |
0 |
How to emit opt report when using LTO |
3:53PM |
2 |
Is every intrinsic norecurse? |
11:32AM |
0 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
10:57AM |
2 |
How to emit opt report when using LTO |
10:49AM |
2 |
RFC: Generate plain !tbaa tags in place of !tbaa.struct ones |
9:28AM |
0 |
RFC: Switching to the new pass manager by default |
7:05AM |
0 |
Possible bug of Alias Analysis? |
6:50AM |
18 |
RFC: Switching to the new pass manager by default |
6:10AM |
2 |
Possible bug of Alias Analysis? |
5:36AM |
1 |
liblldCommon is broken at head |
5:18AM |
0 |
Possible bug of Alias Analysis? |
2:48AM |
2 |
Possible bug of Alias Analysis? |
12:11AM |
2 |
LLVM cross-compilation cmake issues |
|
Tuesday October 17 2017 |
Time | Replies | Subject |
11:49PM |
0 |
RFC: Trace-based layout. |
5:58PM |
0 |
[RFC] Adding Intrinsics for Masked Vector Integer Division and Remainder |
5:04PM |
0 |
getCacheSize() / subtarget machine id |
4:06PM |
0 |
Called value propagation pass |
3:04PM |
2 |
getCacheSize() / subtarget machine id |
2:48PM |
2 |
getCacheSize() implementation (retrieving subtarget id) |
2:37PM |
1 |
C source code to java byte code |
2:07PM |
0 |
Announcing the first beta release of Zig - LLVM frontend |
11:39AM |
0 |
liblldCommon is broken at head |
9:03AM |
2 |
liblldCommon is broken at head |
7:25AM |
0 |
Possible bug of Alias Analysis? |
6:45AM |
3 |
Possible bug of Alias Analysis? |
5:57AM |
0 |
[RFC] Polly Status and Integration |
5:37AM |
2 |
[RFC] Polly Status and Integration |
5:22AM |
3 |
[RFC] Adding Intrinsics for Masked Vector Integer Division and Remainder |
12:33AM |
0 |
[RFC] Polly Status and Integration |
|
Monday October 16 2017 |
Time | Replies | Subject |
11:51PM |
2 |
[RFC] Polly Status and Integration |
9:04PM |
2 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
8:01PM |
1 |
[llvm-devmeeting] Need one more moderator volunteer! |
7:48PM |
0 |
Need one more moderator volunteer! |
7:20PM |
0 |
LLVM Weekly - #198, Oct 16th 2017 |
6:16PM |
0 |
CMake scripts missing in Windows installer? |
6:05PM |
0 |
Failing test with -debug-pass=Structure |
4:17PM |
0 |
How to match multiple DAG nodes |
3:33PM |
0 |
Is every intrinsic norecurse? |
3:16PM |
0 |
How to match multiple DAG nodes |
1:28PM |
0 |
Machine Scheduler on Power PC: Latency Limit and Register Pressure |
1:03PM |
0 |
Announce of the new LLVM buildbot, bb9.pgr.jp |
11:58AM |
0 |
[RFC] Polly Status and Integration |
11:08AM |
1 |
Stack pointer updates and hoisting/scheduling vs interrupts |
6:51AM |
0 |
[PATCH] [CMake] FreeBSD /usr/local/include |
2:07AM |
0 |
LLD COFF not closing mmaps to input files? |
1:59AM |
2 |
LLD COFF not closing mmaps to input files? |
1:57AM |
0 |
LLD COFF not closing mmaps to input files? |
1:45AM |
2 |
LLD COFF not closing mmaps to input files? |
1:17AM |
0 |
What's LLVM{target}CodeGen vs {target}CodeGen? |
|
Sunday October 15 2017 |
Time | Replies | Subject |
9:55PM |
2 |
Weak undefined symbols and dynamic libraries |
9:12PM |
0 |
IR Pass Ordering Sensitivity |
9:12PM |
0 |
Why does GEP allow src and destination type to have different address spaces? |
7:12PM |
2 |
IR Pass Ordering Sensitivity |
5:16PM |
0 |
darwin bootstrap failure |
5:03PM |
2 |
darwin bootstrap failure |
4:40PM |
0 |
darwin bootstrap failure |
4:20PM |
0 |
stage2/stage3 file comparisons failures in trunk when stage2 uses -DLLVM_REVERSE_ITERATION:BOOL=ON |
3:34PM |
2 |
darwin bootstrap failure |
3:19PM |
0 |
darwin bootstrap failure |
3:06PM |
2 |
darwin bootstrap failure |
2:58PM |
0 |
darwin bootstrap failure |
2:35PM |
2 |
darwin bootstrap failure |
10:22AM |
0 |
question about mem2reg |
3:58AM |
2 |
question about mem2reg |
3:58AM |
0 |
IR Pass Ordering Sensitivity |
2:43AM |
0 |
workaround for windows byval codegen bug? |
|
Saturday October 14 2017 |
Time | Replies | Subject |
11:57PM |
4 |
[RFC] Polly Status and Integration |
10:52PM |
2 |
IR Pass Ordering Sensitivity |
10:28PM |
0 |
[RFC] Polly Status and Integration |
10:00PM |
0 |
[RFC] Polly Status and Integration |
9:57PM |
1 |
darwin bootstrap failure |
9:54PM |
2 |
[RFC] Polly Status and Integration |
8:37PM |
0 |
darwin bootstrap failure |
8:32PM |
2 |
darwin bootstrap failure |
8:30PM |
3 |
[RFC] Polly Status and Integration |
8:22PM |
0 |
darwin bootstrap failure |
8:15PM |
2 |
What's LLVM{target}CodeGen vs {target}CodeGen? |
6:05PM |
0 |
IR Pass Ordering Sensitivity |
4:36PM |
2 |
darwin bootstrap failure |
3:38PM |
0 |
darwin bootstrap failure |
3:32PM |
2 |
darwin bootstrap failure |
3:25PM |
0 |
darwin bootstrap failure |
3:06PM |
3 |
darwin bootstrap failure |
2:25PM |
0 |
darwin bootstrap failure |
1:06PM |
2 |
darwin bootstrap failure |
7:14AM |
1 |
Printing Fixups |
6:27AM |
0 |
Weak undefined symbols and dynamic libraries |
6:03AM |
0 |
Reducing confusion around isUndefined() |
5:06AM |
2 |
IR Pass Ordering Sensitivity |
3:03AM |
0 |
[RFC] Polly Status and Integration |
2:26AM |
2 |
[RFC] Polly Status and Integration |
1:10AM |
2 |
Weak undefined symbols and dynamic libraries |
12:33AM |
1 |
Bug in replaceUsesOfWith: does not keep addrspace consistent in GEP |
12:31AM |
2 |
Reducing confusion around isUndefined() |
12:30AM |
0 |
Bug in replaceUsesOfWith: does not keep addrspace consistent in GEP |
12:17AM |
2 |
Bug in replaceUsesOfWith: does not keep addrspace consistent in GEP |
12:13AM |
0 |
[RFC] Polly Status and Integration |
12:04AM |
0 |
[RFC] Polly Status and Integration |
|
Friday October 13 2017 |
Time | Replies | Subject |
11:29PM |
3 |
[RFC] Polly Status and Integration |
11:05PM |
2 |
[SelectionDAG] Assertion due to MachineMemOperand flags difference. |
10:59PM |
2 |
Why does GEP allow src and destination type to have different address spaces? |
10:54PM |
1 |
Setters for `addrspace`? |
10:49PM |
0 |
Machine Scheduler on Power PC: Latency Limit and Register Pressure |
10:21PM |
0 |
Unit tests in compiler-rt not rebuilding with changes to runtimes? |
10:01PM |
3 |
Machine Scheduler on Power PC: Latency Limit and Register Pressure |
8:46PM |
0 |
Machine Scheduler on Power PC: Latency Limit and Register Pressure |
8:09PM |
2 |
Machine Scheduler on Power PC: Latency Limit and Register Pressure |
5:14PM |
0 |
Advice on creating tests for > 64 bit mul on X86 |
4:57PM |
0 |
[RFC] Add SeaHorn and Crab-llvm to Users.html |
8:51AM |
1 |
[CFP] LLVM toolchain devroom CFP at FOSDEM 2018 |
8:50AM |
0 |
Is llvm.org down for you? |
|
Thursday October 12 2017 |
Time | Replies | Subject |
8:47AM |
0 |
FW: Compiler Engineer Belfast |
8:22AM |
0 |
RFC: Setting MachineInstr flags through storeRegToStackSlot |
7:35AM |
1 |
32-bit pointers, ARM and BPF |
3:13AM |
1 |
[GlobalISel] [X86] unable to legalize instruction |
1:44AM |
2 |
[GlobalISel] [X86] unable to legalize instruction |
12:50AM |
0 |
[GlobalISel] [X86] unable to legalize instruction |
12:39AM |
2 |
[GlobalISel] [X86] unable to legalize instruction |
|
Wednesday October 11 2017 |
Time | Replies | Subject |
11:19PM |
0 |
Tickets Available for the Women in Compilers & Tools Reception |
7:34PM |
1 |
Debugging JIT'ed code with ORC JIT? |
6:29PM |
2 |
TargetRegistry and MC object ownership. |
6:28PM |
0 |
Debugging JIT'ed code with ORC JIT? |
6:26PM |
2 |
Debugging JIT'ed code with ORC JIT? |
6:25PM |
0 |
TargetRegistry and MC object ownership. |
6:12PM |
3 |
TargetRegistry and MC object ownership. |
5:44PM |
0 |
Debugging JIT'ed code with ORC JIT? |
5:13PM |
2 |
Debugging JIT'ed code with ORC JIT? |
4:30PM |
0 |
Policy for compiler-rt ABI stability and external dependencies? |
4:27PM |
1 |
Static dependency analysis based on llvm or clang |
4:03PM |
0 |
{ARM} IfConversion does not detect BX instruction as a branch |
1:09PM |
0 |
How to create an alloca variable of type i64 in LLVM IR? |
11:07AM |
2 |
Policy for compiler-rt ABI stability and external dependencies? |
7:07AM |
0 |
[RFC] Polly Status and Integration |
4:16AM |
1 |
alloca + strd issue on arm freebsd |
4:07AM |
2 |
How to create an alloca variable of type i64 in LLVM IR? |
1:07AM |
2 |
{ARM} IfConversion does not detect BX instruction as a branch |
12:27AM |
2 |
Moderators for the 2017 LLVM Developers' Mtg Needed! (2 slots left!) |
|
Tuesday October 10 2017 |
Time | Replies | Subject |
11:48PM |
0 |
{ARM} IfConversion does not detect BX instruction as a branch |
8:13PM |
4 |
Expose aliasing information in getModRefInfo (or viceversa?) |
8:05PM |
0 |
Expose aliasing information in getModRefInfo (or viceversa?) |
8:01PM |
0 |
Make LLD output COFF relocatable object file (like ELF's -r does). How much work is required to implement this? |
7:54PM |
1 |
how to auto-report LLVM bugs found by fuzzing? |
7:49PM |
2 |
Expose aliasing information in getModRefInfo (or viceversa?) |
7:48PM |
0 |
how to auto-report LLVM bugs found by fuzzing? |
7:41PM |
3 |
Make LLD output COFF relocatable object file (like ELF's -r does). How much work is required to implement this? |
7:32PM |
2 |
[RFC] Add SeaHorn and Crab-llvm to Users.html |
7:21PM |
0 |
alloca + strd issue on arm freebsd |
6:39PM |
0 |
Expose aliasing information in getModRefInfo (or viceversa?) |
6:00PM |
0 |
Make LLD output COFF relocatable object file (like ELF's -r does). How much work is required to implement this? |
5:19PM |
2 |
Expose aliasing information in getModRefInfo (or viceversa?) |
4:16PM |
0 |
Expose aliasing information in getModRefInfo (or viceversa?) |
4:01PM |
0 |
LLVM Compiler Social Zurich - October 12, 2017 |
3:07PM |
0 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
9:18AM |
0 |
LLI crash with inteljitevent enabled |
8:59AM |
1 |
Creating arbitrary data type in LLVM IR |
8:36AM |
2 |
Make LLD output COFF relocatable object file (like ELF's -r does). How much work is required to implement this? |
6:54AM |
0 |
LLVM Linker |
6:31AM |
0 |
Sharing llvm IR infrastructure for Equality saturation |
3:54AM |
2 |
LLVM Linker |
3:31AM |
0 |
Parsing assembly into module while creating a function |
2:05AM |
2 |
Expose aliasing information in getModRefInfo (or viceversa?) |
|
Monday October 9 2017 |
Time | Replies | Subject |
11:39PM |
0 |
Make LLD output COFF relocatable object file (like ELF's -r does). How much work is required to implement this? |
11:05PM |
0 |
Expose aliasing information in getModRefInfo (or viceversa?) |
10:56PM |
0 |
[PATCH] [CMake] Allow parent projects to use in-source builds |
10:32PM |
0 |
Understanding of ldd header allocation |
10:17PM |
2 |
[PATCH] [CMake] Allow parent projects to use in-source builds |
10:09PM |
0 |
Expose aliasing information in getModRefInfo (or viceversa?) |
9:59PM |
0 |
Understanding of ldd header allocation |
9:46PM |
0 |
Is llvm.org down? |
9:33PM |
1 |
Expose aliasing information in getModRefInfo (or viceversa?) |
9:08PM |
2 |
Expose aliasing information in getModRefInfo (or viceversa?) |
9:00PM |
0 |
llvm git down? |
8:57PM |
0 |
Expose aliasing information in getModRefInfo (or viceversa?) |
8:47PM |
3 |
Expose aliasing information in getModRefInfo (or viceversa?) |
8:42PM |
0 |
LLVM Linker |
7:27PM |
0 |
Debugging JIT'ed code with ORC JIT? |
7:00PM |
0 |
LLVM Weekly - #197, Oct 9th 2017 |
6:00PM |
0 |
{ARM} IfConversion does not detect BX instruction as a branch |
5:54PM |
4 |
Understanding of ldd header allocation |
5:48PM |
0 |
LLVM's use of rpath on macOS |
5:25PM |
0 |
[PATCH] [CMake] Allow parent projects to use in-source builds |
3:56PM |
0 |
LLVM Performance Workshop at CGO 2018 |
3:47PM |
2 |
Is llvm.org down? |
3:02PM |
2 |
Make LLD output COFF relocatable object file (like ELF's -r does). How much work is required to implement this? |
2:24PM |
3 |
LLVM's use of rpath on macOS |
1:28PM |
0 |
Trouble when suppressing a portion of fast-math-transformations |
1:20PM |
0 |
llvm.org and bugzill not responding |
10:10AM |
4 |
{ARM} IfConversion does not detect BX instruction as a branch |
9:28AM |
0 |
Is llvm.org down? |
8:38AM |
1 |
Is llvm.org down? |
5:38AM |
0 |
Is llvm.org down? |
5:08AM |
11 |
Is llvm.org down? |
4:36AM |
2 |
[PATCH] [CMake] Allow parent projects to use in-source builds |
|
Sunday October 8 2017 |
Time | Replies | Subject |
1:44PM |
1 |
returning tagged union via registers |
|
Saturday October 7 2017 |
Time | Replies | Subject |
9:12PM |
2 |
Debugging JIT'ed code with ORC JIT? |
12:04PM |
0 |
Binary Value of Immediate field of Vector Load Instruction |
6:13AM |
0 |
Bug 20871 -- is there a fix or work around? |
4:45AM |
2 |
Bug 20871 -- is there a fix or work around? |
|
Friday October 6 2017 |
Time | Replies | Subject |
8:52PM |
0 |
CFI directives for callee saved registers |
7:55PM |
2 |
CFI directives for callee saved registers |
5:09PM |
1 |
Newly added ThreadPoolExecutor causes deadlock in lld |
4:21PM |
0 |
[cfe-dev] Status of the devirtualization in LLVM/Clang |
9:47AM |
2 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
4:19AM |
0 |
Status of PBQP register allocator? |
1:59AM |
0 |
Beginner Bugs - Need help tagging |
1:52AM |
4 |
Beginner Bugs - Need help tagging |
|
Thursday October 5 2017 |
Time | Replies | Subject |
10:36PM |
0 |
Bug 20871 -- is there a fix or work around? |
9:41PM |
2 |
Status of PBQP register allocator? |
11:34AM |
0 |
Conversion of const llvm::MCExpr * to string |
4:03AM |
0 |
Moderators for the 2017 LLVM Developers' Mtg Needed! |
2:03AM |
3 |
Bug 20871 -- is there a fix or work around? |
1:12AM |
0 |
RFC: Insertion of nops for performance stability |
1:05AM |
2 |
Conversion of const llvm::MCExpr * to string |
|
Wednesday October 4 2017 |
Time | Replies | Subject |
10:48PM |
0 |
Minimal glibc version supported by LLVM build |
10:17PM |
2 |
Minimal glibc version supported by LLVM build |
10:02PM |
0 |
Question: Should we consider valid a variable defined #ifndef NDEBUG scope and used in assert? |
9:58PM |
2 |
Question: Should we consider valid a variable defined #ifndef NDEBUG scope and used in assert? |
9:53PM |
0 |
Question: Should we consider valid a variable defined #ifndef NDEBUG scope and used in assert? |
9:41PM |
3 |
Question: Should we consider valid a variable defined #ifndef NDEBUG scope and used in assert? |
9:30PM |
0 |
Minimal glibc version supported by LLVM build |
9:19PM |
2 |
Minimal glibc version supported by LLVM build |
8:08PM |
1 |
Loop Rotation in MachineBlockPlacement |
8:03PM |
0 |
Fix for PR24155 on PPC |
7:38PM |
0 |
Minimal glibc version supported by LLVM build |
6:50PM |
1 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
6:24PM |
0 |
Minimal glibc version supported by LLVM build |
6:23PM |
2 |
Minimal glibc version supported by LLVM build |
6:18PM |
1 |
Minimal glibc version supported by LLVM build |
6:17PM |
0 |
Minimal glibc version supported by LLVM build |
5:24PM |
0 |
Relocations used for PPC32 in non-PIC mode |
5:18PM |
0 |
[RFC] Adding a cls intrinsic for AArch64 |
5:04PM |
2 |
Relocations used for PPC32 in non-PIC mode |
4:28PM |
0 |
Relocations used for PPC32 in non-PIC mode |
4:03PM |
2 |
Relocations used for PPC32 in non-PIC mode |
3:34PM |
2 |
Fix for PR24155 on PPC |
12:32PM |
0 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
10:42AM |
3 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
9:32AM |
2 |
Trouble when suppressing a portion of fast-math-transformations |
7:08AM |
7 |
Minimal glibc version supported by LLVM build |
5:17AM |
0 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
4:49AM |
2 |
Unit tests in compiler-rt not rebuilding with changes to runtimes? |
4:37AM |
0 |
LOAD instruction source register selection |
3:55AM |
0 |
'cl::opt' and range checking |
|
Tuesday October 3 2017 |
Time | Replies | Subject |
11:28PM |
0 |
About LLVM Pass dependency |
10:41PM |
0 |
Changing Alignment of global variables in LLVM |
10:39PM |
2 |
Changing Alignment of global variables in LLVM |
10:34PM |
0 |
Changing Alignment of global variables in LLVM |
10:25PM |
2 |
Changing Alignment of global variables in LLVM |
9:42PM |
1 |
TargetMachine vs LLVMTargetMachine |
9:37PM |
0 |
TargetMachine vs LLVMTargetMachine |
9:34PM |
1 |
PGO information at LTO/thinLTO link step |
9:30PM |
2 |
TargetMachine vs LLVMTargetMachine |
9:15PM |
0 |
PGO information at LTO/thinLTO link step |
9:10PM |
2 |
PGO information at LTO/thinLTO link step |
9:00PM |
0 |
PGO information at LTO/thinLTO link step |
8:55PM |
2 |
PGO information at LTO/thinLTO link step |
8:46PM |
0 |
PGO information at LTO/thinLTO link step |
8:38PM |
2 |
PGO information at LTO/thinLTO link step |
8:29PM |
2 |
New Pass Manager with flto[=thin] not enabled (??) |
8:18PM |
0 |
PGO information at LTO/thinLTO link step |
7:54PM |
3 |
PGO information at LTO/thinLTO link step |
7:38PM |
0 |
New Pass Manager with flto[=thin] not enabled (??) |
7:22PM |
0 |
General question about enabling partial inlining |
7:13PM |
2 |
New Pass Manager with flto[=thin] not enabled (??) |
7:08PM |
0 |
New Pass Manager with flto[=thin] not enabled (??) |
6:57PM |
2 |
New Pass Manager with flto[=thin] not enabled (??) |
6:00PM |
0 |
Is DependenceAnalysisWrapperPass IsCFGOnlyPass 'true' correct? |
5:43PM |
0 |
Unit tests in compiler-rt not rebuilding with changes to runtimes? |
5:30PM |
1 |
About LLVM Pass dependency |
4:45PM |
0 |
Change in optimisation with UB in mind |
4:45PM |
0 |
General question about enabling partial inlining |
4:21PM |
5 |
General question about enabling partial inlining |
4:13PM |
0 |
About LLVM Pass dependency |
4:13PM |
0 |
Trouble when suppressing a portion of fast-math-transformations |
4:08PM |
1 |
Trouble when suppressing a portion of fast-math-transformations |
3:52PM |
0 |
TargetMachine vs LLVMTargetMachine |
3:08PM |
0 |
General question about enabling partial inlining |
1:43PM |
2 |
Change in optimisation with UB in mind |
1:24PM |
2 |
'cl::opt' and range checking |
12:08PM |
0 |
Volunteers for Hackers Lab Needed! |
11:58AM |
2 |
Unit tests in compiler-rt not rebuilding with changes to runtimes? |
11:20AM |
0 |
Change in optimisation with UB in mind |
10:37AM |
2 |
Change in optimisation with UB in mind |
10:26AM |
0 |
Trouble when suppressing a portion of fast-math-transformations |
10:02AM |
2 |
Trouble when suppressing a portion of fast-math-transformations |
9:05AM |
0 |
Trouble when suppressing a portion of fast-math-transformations |
9:00AM |
2 |
About LLVM Pass dependency |
4:58AM |
0 |
Change in optimisation with UB in mind |
4:36AM |
2 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
4:34AM |
0 |
invalid code generated on Windows x86_64 using skylake-specific features |
4:14AM |
2 |
invalid code generated on Windows x86_64 using skylake-specific features |
3:57AM |
2 |
TargetMachine vs LLVMTargetMachine |
1:27AM |
1 |
SSE instructions and alignment of the return value of 'new' |
1:03AM |
2 |
Trouble when suppressing a portion of fast-math-transformations |
12:48AM |
2 |
Trouble when suppressing a portion of fast-math-transformations |
12:15AM |
0 |
SSE instructions and alignment of the return value of 'new' |
|
Monday October 2 2017 |
Time | Replies | Subject |
11:33PM |
0 |
LLVM buildmaster will be updated and restarted tonight |
11:22PM |
1 |
Should we switch to --hash-style=both by default in LLD ? |
11:15PM |
0 |
October LLVM bay-area social is this Thursday! |
11:15PM |
0 |
Should we switch to --hash-style=both by default in LLD ? |
10:55PM |
0 |
Should we switch to --hash-style=both by default in LLD ? |
10:44PM |
0 |
SSE instructions and alignment of the return value of 'new' |
10:33PM |
2 |
Should we switch to --hash-style=both by default in LLD ? |
10:11PM |
5 |
SSE instructions and alignment of the return value of 'new' |
10:09PM |
0 |
[EXT] Should we switch to --hash-style=both by default in LLD ? |
10:00PM |
2 |
[EXT] Should we switch to --hash-style=both by default in LLD ? |
9:59PM |
0 |
Where did Alive go? |
9:21PM |
2 |
Where did Alive go? |
8:51PM |
0 |
SchedClasses |
7:17PM |
0 |
load with alignment of 1 crashes from being unaligned |
5:37PM |
0 |
invalid code generated on Windows x86_64 using skylake-specific features |
4:56PM |
0 |
LLVM Weekly - #196, Oct 2nd 2017 |
4:37PM |
0 |
Is ArrayRef supposed to be immutable? |
4:37PM |
0 |
Should we switch to --hash-style=both by default in LLD ? |
4:28PM |
2 |
Should we switch to --hash-style=both by default in LLD ? |
4:10PM |
0 |
Trouble when suppressing a portion of fast-math-transformations |
4:10PM |
0 |
Where did Alive go? |
1:45PM |
2 |
Trouble when suppressing a portion of fast-math-transformations |
12:35PM |
0 |
Should we switch to --hash-style=both by default in LLD ? |
12:29PM |
1 |
Should we switch to --hash-style=both by default in LLD ? |
12:23PM |
4 |
Should we switch to --hash-style=both by default in LLD ? |
11:26AM |
1 |
emulated-tls & lld lto |
8:25AM |
0 |
About LoopDeletion and infinite loops ... again! (RFC?) |
8:21AM |
0 |
About LoopDeletion and infinite loops ... again! (RFC?) |
5:50AM |
0 |
How to get variable annotations? |
|
Sunday October 1 2017 |
Time | Replies | Subject |
11:05PM |
0 |
Trouble when suppressing a portion of fast-math-transformations |
11:01PM |
2 |
Is ArrayRef supposed to be immutable? |
5:56PM |
0 |
Implementation of encoding scheme |
2:16PM |
0 |
Clang/LLVM JIT - When to use "registerEHFrames()" |
1:52PM |
0 |
Is ArrayRef supposed to be immutable? |
12:32PM |
0 |
What should a truncating store do? |
1:49AM |
2 |
load with alignment of 1 crashes from being unaligned |
1:27AM |
1 |
invalid code generated on Windows x86_64 using skylake-specific features |
12:35AM |
2 |
Is ArrayRef supposed to be immutable? |
12:21AM |
0 |
Is ArrayRef supposed to be immutable? |