llvm dev - Sep 2017

Saturday September 30 2017
TimeRepliesSubject
7:33PM 2 invalid code generated on Windows x86_64 using skylake-specific features
3:02AM 4 About LoopDeletion and infinite loops ... again! (RFC?)
2:43AM 1 About LoopDeletion and infinite loops ... again! (RFC?)
2:17AM 1 About LoopDeletion and infinite loops ... again! (RFC?)
 
Friday September 29 2017
TimeRepliesSubject
11:51PM 2 SchedClasses
7:21PM 0 [RFC] Polly Status and Integration
5:42PM 1 HiPE calling convention
11:34AM 1 Change in optimisation with UB in mind
11:12AM 1 HiPE calling convention
10:03AM 1 Process of integrating Polly into LLVM
4:20AM 1 [RFC] Polly Status and Integration
1:36AM 2 Trouble when suppressing a portion of fast-math-transformations
1:15AM 1 [RFC] Polly Status and Integration
12:56AM 1 Trouble when suppressing a portion of fast-math-transformations
 
Thursday September 28 2017
TimeRepliesSubject
8:35PM 2 [RFC] Adding a cls intrinsic for AArch64
7:37PM 2 Clang/LLVM JIT - When to use "registerEHFrames()"
7:03PM 1 BoF: Co-ordinating RISC-V development in LLVM, AND RISC-V LLVM working session event
2:04PM 1 Clang/LLVM JIT - When to use "registerEHFrames()"
1:36PM 1 VMOVNTDQ in LLVM
1:31PM 1 VMOVNTDQ in LLVM
1:10PM 1 VMOVNTDQ in LLVM
1:32AM 1 Question regarding GlobalMappingLayer in LLVM 5
1:22AM 1 [RFC] PT.2 Add IR level interprocedural outliner for code size.
1:07AM 2 [RFC] PT.2 Add IR level interprocedural outliner for code size.
 
Wednesday September 27 2017
TimeRepliesSubject
11:01PM 1 [RFC] PT.2 Add IR level interprocedural outliner for code size.
10:52PM 1 [SPIR-V] SPIR-V in LLVM
10:23PM 2 [RFC] PT.2 Add IR level interprocedural outliner for code size.
9:54PM 1 [RFC] Polly Status and Integration
9:08PM 1 Clang/LLVM JIT - When to use "registerEHFrames()"
5:36PM 1 [MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
5:32PM 1 OrcJIT + CUDA Prototype for Cling
4:28PM 1 [RFC] PT.2 Add IR level interprocedural outliner for code size.
4:25PM 1 [SPIR-V] SPIR-V in LLVM
4:18PM 0 Custom lower multiple return values
3:44PM 1 RFC: first steps toward CFG-level IR manipulation
3:18PM 0 [WebAssembly] relocations for dwarf
12:54PM 0 PEI::replaceFrameIndices() endless loop
12:21PM 2 [SPIR-V] SPIR-V in LLVM
8:30AM 1 Build error
5:30AM 1 Errors linking with LLVM 5.0 - dump() missing
3:24AM 1 [MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
12:24AM 1 [RFC] PT.2 Add IR level interprocedural outliner for code size.
 
Tuesday September 26 2017
TimeRepliesSubject
11:21PM 2 RFC phantom memory intrinsic
10:47PM 1 [MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
10:36PM 1 Missing dwarf FDE
10:33PM 1 [MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
10:11PM 1 [MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
9:39PM 1 [MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
7:50PM 0 TableGen questions.
6:54PM 2 Errors linking with LLVM 5.0 - dump() missing
2:04PM 1 Errors linking with LLVM 5.0 - dump() missing
1:31PM 1 RFC phantom memory intrinsic
10:05AM 1 Difference between -mattr=+soft-float and -float-abi=soft
9:22AM 1 Difference between -mattr=+soft-float and -float-abi=soft
8:49AM 2 Moderators for the 2017 LLVM Developers' Mtg Needed!
8:09AM 1 Difference between -mattr=+soft-float and -float-abi=soft
7:00AM 1 [RFC] Polly Status and Integration
3:06AM 0 Latency in mails form llvm-dev / llvm-commits
2:52AM 1 RFC phantom memory intrinsic
1:47AM 1 Errors linking with LLVM 5.0 - dump() missing
1:19AM 1 Errors linking with LLVM 5.0 - dump() missing
1:03AM 1 Errors linking with LLVM 5.0 - dump() missing
 
Monday September 25 2017
TimeRepliesSubject
11:03PM 1 TableGen questions.
10:41PM 1 Phab down: `AphrontQueryException`
10:12PM 1 Potential infinite loop in MemorySSAUpdater
10:03PM 1 [RFC] Polly Status and Integration
9:53PM 1 Errors linking with LLVM 5.0 - dump() missing
9:47PM 1 Errors linking with LLVM 5.0 - dump() missing
9:43PM 1 Errors linking with LLVM 5.0 - dump() missing
9:43PM 1 Errors linking with LLVM 5.0 - dump() missing
9:41PM 1 Errors linking with LLVM 5.0 - dump() missing
9:37PM 1 Errors linking with LLVM 5.0 - dump() missing
9:35PM 1 Errors linking with LLVM 5.0 - dump() missing
9:29PM 1 Errors linking with LLVM 5.0 - dump() missing
9:27PM 0 What should a truncating store do?
9:13PM 1 Some questions regarding ORC JIT apis
8:22PM 1 Errors linking with LLVM 5.0 - dump() missing
8:13PM 1 Errors linking with LLVM 5.0 - dump() missing
7:56PM 1 Errors linking with LLVM 5.0 - dump() missing
7:35PM 1 Errors linking with LLVM 5.0 - dump() missing
7:13PM 1 What should a truncating store do?
6:40PM 3 Errors linking with LLVM 5.0 - dump() missing
6:28PM 0 [cfe-dev] Call frame information query
6:22PM 0 2017 LLVM Dev Meeting - Schedule Online, Registration Closing & Room Block Expiring
6:08PM 1 What should a truncating store do?
5:46PM 1 '__builtin_nanl' and soft-FP64 support
5:44PM 1 Assertion in 'DwarfDebug.cpp'
5:27PM 0 GPU Compiler Engineering Opportunities at AMD
5:20PM 0 5.0.1 Release Schedule
5:10PM 0 LLVM Weekly - #195, Sep 25th 2017
4:14PM 2 What should a truncating store do?
3:39PM 1 SVN revisions no longer visible through diffusion
3:32PM 1 SVN revisions no longer visible through diffusion
3:13PM 1 GTest: Unit tests layout
2:55PM 1 Assertion in 'DwarfDebug.cpp'
12:35PM 1 '__builtin_nanl' and soft-FP64 support
9:31AM 1 Clang/LLVM JIT - When to use "registerEHFrames()"
7:17AM 1 Control Flow information query
6:40AM 1 Potential infinite loop in MemorySSAUpdater
5:11AM 1 [GreenDragon] Jenkins Core and Plugin Maintenance
 
Sunday September 24 2017
TimeRepliesSubject
7:12PM 1 Spill Weight In InlineSpiller
8:24AM 1 Volunteers for Hackers Lab Needed!
5:46AM 0 [iovisor-dev] [PATCH RFC 0/4] Initial 32-bit eBPF encoding support
 
Saturday September 23 2017
TimeRepliesSubject
10:36PM 1 Some questions regarding ORC JIT apis
7:30PM 1 Adding a function type qualifier with particular keyword
7:16PM 1 Adding a function type qualifier with particular keyword
5:12PM 1 Potential infinite loop in MemorySSAUpdater
4:55PM 1 Potential infinite loop in MemorySSAUpdater
3:57PM 1 Potential infinite loop in MemorySSAUpdater
3:38PM 1 Potential infinite loop in MemorySSAUpdater
2:42PM 0 [iovisor-dev] [PATCH RFC 0/4] Initial 32-bit eBPF encoding support
2:18PM 1 SVN revisions no longer visible through diffusion
9:59AM 1 SVN revisions no longer visible through diffusion
4:19AM 1 Process of integrating Polly into LLVM
 
Friday September 22 2017
TimeRepliesSubject
9:04PM 1 Question regarding GlobalMappingLayer in LLVM 5
8:34PM 0 AphrontQueryException from Phabricator
6:42PM 1 No longer able to run lit tests within a sub-tool
6:38PM 1 No longer able to run lit tests within a sub-tool
6:36PM 1 No longer able to run lit tests within a sub-tool
6:31PM 1 No longer able to run lit tests within a sub-tool
6:27PM 1 No longer able to run lit tests within a sub-tool
6:22PM 1 No longer able to run lit tests within a sub-tool
6:04PM 0 [cfe-dev] Cross translational unit analysis in codechecker
5:41PM 2 Where did Alive go?
5:34PM 1 SchedClasses
5:32PM 1 Build clang front end only for few languages ( say C and C++ )
2:33PM 1 Some questions regarding ORC JIT apis
1:47PM 1 [RFC] Polly Status and Integration
7:17AM 1 Effectiveness of llvm optimisation passes
5:45AM 1 [Hexagon] Type Legalization
5:33AM 1 [RFC] Polly Status and Integration
5:25AM 1 [RFC] Polly Status and Integration
5:22AM 2 [RFC] Polly Status and Integration
5:19AM 1 [Hexagon] Type Legalization
5:10AM 4 Effectiveness of llvm optimisation passes
5:09AM 1 [RFC] Polly Status and Integration
5:06AM 2 RFC: [X86] Can we begin removing AutoUpgrade support for x86 instrinsics added in early 3.X versions
5:06AM 2 [Hexagon] Type Legalization
5:04AM 1 Effectiveness of llvm optimisation passes
5:03AM 1 [RFC] Polly Status and Integration
4:55AM 0 [iovisor-dev] [PATCH RFC 3/4] New 32-bit register set
4:53AM 0 IMPORTANT: *.llvm.org certificates being renewed (impacts SVN) FRIDAY Sept 22
3:59AM 2 [RFC] Polly Status and Integration
3:02AM 1 [RFC] PT.2 Add IR level interprocedural outliner for code size.
2:45AM 1 [RFC] PT.2 Add IR level interprocedural outliner for code size.
2:10AM 1 [RFC] PT.2 Add IR level interprocedural outliner for code size.
2:08AM 0 Get function implementation for indirect CallInst.
12:31AM 0 LLVM buildmaster will be updated and restarted tonight
 
Thursday September 21 2017
TimeRepliesSubject
11:11PM 1 Can I differentiate an imm with an imm used in memory offset in MI pass?
10:56PM 0 llvm-link: Missing Dwarf DIE references
8:27PM 1 Can I differentiate an imm with an imm used in memory offset in MI pass?
6:56PM 0 [iovisor-dev] [PATCH RFC 0/4] Initial 32-bit eBPF encoding support
6:23PM 0 Wrong Register use in directives
3:29PM 1 [llvm-cov] Single file HTML output when filtering on function names.
8:41AM 1 Improve ScopedPrinter::printNumber? (was: [llvm] r313816 - [llvm-readobj] Fix 'Teach readobj to dump .res files'.)
8:18AM 1 VSelect Instruction Error
7:23AM 1 RFC: [X86] Can we begin removing AutoUpgrade support for x86 instrinsics added in early 3.X versions
 
Wednesday September 20 2017
TimeRepliesSubject
9:16PM 1 RFC: [X86] Can we begin removing AutoUpgrade support for x86 instrinsics added in early 3.X versions
8:00PM 1 RFC: [X86] Can we begin removing AutoUpgrade support for x86 instrinsics added in early 3.X versions
7:31PM 1 RFC: [X86] Can we begin removing AutoUpgrade support for x86 instrinsics added in early 3.X versions
7:20PM 1 RFC: [X86] Can we begin removing AutoUpgrade support for x86 instrinsics added in early 3.X versions
5:23PM 1 [llvm-cov] Single file HTML output when filtering on function names.
5:13PM 1 Jump Threading duplicates dbg.declare intrinsics for fragments, bug?
4:53PM 1 Where did Alive go?
4:04PM 0 [RFC] Polly Status and Integration
3:14PM 1 Store lowering -> Cannot select FrameIndex.
2:09PM 1 Updating LLVM Tests for Patch
2:08PM 1 [llvm-cov] Single file HTML output when filtering on function names.
12:49PM 0 TTA-based Co-design Environment (TCE) v1.16 released
12:27PM 1 Please help: SVN is broken
10:17AM 2 Updating LLVM Tests for Patch
8:43AM 2 Jump Threading duplicates dbg.declare intrinsics for fragments, bug?
6:29AM 1 Spill Weight In InlineSpiller
1:33AM 2 Please help: SVN is broken
1:00AM 0 llvm-link: Missing Dwarf DIE references
12:33AM 3 [RFC] Polly Status and Integration
 
Tuesday September 19 2017
TimeRepliesSubject
11:58PM 1 RFC: Use closures to delay construction of optimization remarks
11:05PM 1 Where did Alive go?
10:52PM 1 Where did Alive go?
7:02PM 0 nios-II ISA backend
6:35PM 1 How to add optimizations to InstCombine correctly?
5:49PM 1 Help with segfault in llvm_shutdown with LLVM 5.0 Release build
5:31PM 1 Dependency Info from AST
5:12PM 1 What is the correct Targettripple for generating a X86 COFF-Files on windows?
5:09PM 1 What is the correct Targettripple for generating a X86 COFF-Files on windows?
5:09PM 2 Dependency Info from AST
4:12PM 1 Dependency Info from AST
3:46PM 1 Jump Threading duplicates dbg.declare intrinsics for fragments, bug?
3:44PM 1 Jump Threading duplicates dbg.declare intrinsics for fragments, bug?
3:40PM 1 Jump Threading duplicates dbg.declare intrinsics for fragments, bug?
3:35PM 1 Interleaved debug info on arm
3:26PM 1 Describing subreg load for vectors without using vector_insert
1:58PM 2 How to add optimizations to InstCombine correctly?
1:33PM 2 Jump Threading duplicates dbg.declare intrinsics for fragments, bug?
12:36PM 1 Changes to 'ADJCALLSTACK*' and 'callseq_*' between LLVM v4.0 and v5.0
12:27PM 1 Jump Threading duplicates dbg.declare intrinsics for fragments, bug?
11:23AM 1 How to add optimizations to InstCombine correctly?
8:51AM 1 Do I need to modify the AddrLoc of LLD for ARC target?
6:44AM 0 [iovisor-dev] [PATCH RFC 3/4] New 32-bit register set
5:13AM 1 Interleaved debug info on arm
3:20AM 2 Help with segfault in llvm_shutdown with LLVM 5.0 Release build
12:45AM 0 LLVM compiler developer
12:17AM 2 RFC: Trace-based layout.
 
Monday September 18 2017
TimeRepliesSubject
11:43PM 2 [ThinLTO] static library failure with object files with the same name
10:12PM 0 compiling for the ipad
9:29PM 0 [PATCH RFC 0/4] Initial 32-bit eBPF encoding support
9:02PM 0 Fwd: Seattle/King County based meetup
8:40PM 0 Seattle/King County based meetup
8:28PM 1 llvm-link: Missing Dwarf DIE references
8:17PM 1 [ThinLTO] static library failure with object files with the same name
8:16PM 1 RFC: Trace-based layout.
7:09PM 1 [RFC] 'Review corner' section in LLVM Weekly
7:01PM 1 compiling for the ipad
6:56PM 0 LLVM Weekly - #194, Sep 18th 2017
6:43PM 0 Counterintuitive use of LLVMBool in C-API?
5:45PM 4 Interleaved debug info on arm
3:25PM 0 unsupported option '-fsanitize=dataflow' for target 'i386-unknown-linux-gnu'
2:17PM 0 PSA: svn tree conflict
12:44PM 1 Do I need to modify the AddrLoc of LLD for ARC target?
12:40PM 1 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
12:22PM 0 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
11:10AM 1 Resend: assertion in MachineCopyPropagation::isNopCopy
10:44AM 1 Clang/LLVM 5.0 optnone attribute with -O0
10:39AM 1 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
5:27AM 1 Clang/LLVM 5.0 optnone attribute with -O0
5:12AM 1 Clang/LLVM 5.0 optnone attribute with -O0
2:40AM 1 Equality saturation: Status & how-to-upstream discussion
12:35AM 3 Equality saturation: Status & how-to-upstream discussion
 
Sunday September 17 2017
TimeRepliesSubject
10:56PM 1 assertion triggered since update to llvm 5
10:53PM 1 assertion triggered since update to llvm 5
9:40PM 1 assertion triggered since update to llvm 5
8:21PM 1 assertion triggered since update to llvm 5
8:06PM 3 assertion triggered since update to llvm 5
7:47PM 1 assertion triggered since update to llvm 5
7:26PM 1 assertion triggered since update to llvm 5
6:12PM 1 assertion triggered since update to llvm 5
5:45PM 1 assertion triggered since update to llvm 5
4:32PM 1 [ThinLTO] static library failure with object files with the same name
2:24PM 1 Usage of base register other than ebp for array accesses
2:06PM 1 Live Register Spilling
9:52AM 1 Sharing llvm IR infrastructure for Equality saturation
5:43AM 1 RFC: Use closures to delay construction of optimization remarks
5:40AM 1 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
 
Saturday September 16 2017
TimeRepliesSubject
11:49PM 2 RFC: Use closures to delay construction of optimization remarks
11:39PM 1 RFC: Use closures to delay construction of optimization remarks
5:48PM 1 assertion triggered since update to llvm 5
3:36PM 2 LLVM mtriple for aarch64-win32-msvc ?
1:46PM 1 How to add optimizations to InstCombine correctly?
9:37AM 0 Loop unroll error
3:00AM 1 LLVM mtriple for aarch64-win32-msvc ?
2:54AM 1 IVUsers pass is fragile. Is this okay? How can it be resolved?
 
Friday September 15 2017
TimeRepliesSubject
9:37PM 1 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
9:28PM 1 What should a truncating store do?
9:21PM 1 RFC: Use closures to delay construction of optimization remarks
9:20PM 1 LLVM mtriple for aarch64-win32-msvc ?
8:41PM 1 What should a truncating store do?
7:29PM 2 LLVM mtriple for aarch64-win32-msvc ?
7:16PM 0 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
7:10PM 1 What should a truncating store do?
6:30PM 1 What should a truncating store do?
5:55PM 1 What should a truncating store do?
5:42PM 1 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
4:39PM 1 Changes to 'ADJCALLSTACK*' and 'callseq_*' between LLVM v4.0 and v5.0
3:38PM 0 DIVA - Debug Information Visual Analyser
2:45PM 1 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
12:49PM 1 What should a truncating store do?
12:49PM 1 Do I need to modify the AddrLoc of LLD for ARC target?
12:09PM 1 Changes to 'ADJCALLSTACK*' and 'callseq_*' between LLVM v4.0 and v5.0
11:53AM 0 Do I need to modify the AddrLoc of LLD for ARC target?
10:24AM 0 Do I need to modify the AddrLoc of LLD for ARC target?
6:25AM 1 TLS in RuntimeDyld / Linux x86_64
4:33AM 1 Do I need to modify the AddrLoc of LLD for ARC target?
4:04AM 1 [RFC] Polly Status and Integration
3:31AM 1 IVUsers pass is fragile. Is this okay? How can it be resolved?
2:35AM 1 [RFC] noalias intrinsic
2:30AM 1 IVUsers pass is fragile. Is this okay? How can it be resolved?
2:24AM 1 RFC: Trace-based layout.
1:53AM 2 RFC: Trace-based layout.
1:25AM 1 Live Register Spilling
1:17AM 0 RFC: Trace Based Layout
1:15AM 1 [RFC] noalias intrinsic
 
Thursday September 14 2017
TimeRepliesSubject
9:34PM 1 Segmentation fault in lowerVectorShuffle
5:31PM 1 Live Register Spilling
3:57PM 1 [GlobalISel][RFC] Thoughts on MachineModulePass
3:43PM 1 IVUsers pass is fragile. Is this okay? How can it be resolved?
1:57PM 1 Dependency Info from AST
11:05AM 1 Question about 'DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT'
9:36AM 2 Do I need to modify the AddrLoc of LLD for ARC target?
8:34AM 1 [RFC] noalias intrinsic
6:16AM 1 Do I need to modify the AddrLoc of LLD for ARC target?
5:23AM 2 How to add optimizations to InstCombine correctly?
5:06AM 1 How to add optimizations to InstCombine correctly?
4:03AM 1 Live Register Spilling
 
Wednesday September 13 2017
TimeRepliesSubject
10:43PM 1 IVUsers pass is fragile. Is this okay? How can it be resolved?
9:46PM 1 RFC phantom memory intrinsic
7:25PM 3 Performance of large llvm::ConstantDataArrays
6:44PM 1 PSA: Potential lit workflow change
6:43PM 1 PSA: Potential lit workflow change
6:42PM 1 PSA: Potential lit workflow change
6:39PM 1 PSA: Potential lit workflow change
6:23PM 1 Adding pragma related metadata to only one loop
6:14PM 0 trunc and zext
6:01PM 1 IVUsers pass is fragile. Is this okay? How can it be resolved?
5:21PM 1 How to add optimizations to InstCombine correctly?
5:18PM 2 How to add optimizations to InstCombine correctly?
5:11PM 1 General question about enabling partial inlining
5:11PM 1 How to add optimizations to InstCombine correctly?
5:01PM 1 How to add optimizations to InstCombine correctly?
4:19PM 1 PSA: Potential lit workflow change
3:52PM 1 sanitizer test case failures after OS update
3:42PM 1 sanitizer test case failures after OS update
3:31PM 1 sanitizer test case failures after OS update
2:03PM 1 Updating from LLVM v4.0 to v5.0
12:30PM 1 [RFC] Polly Status and Integration
12:23PM 1 RFC phantom memory intrinsic
12:05PM 1 [RFC] Polly Status and Integration
11:53AM 1 [RFC] Polly Status and Integration
11:43AM 2 [RFC] Polly Status and Integration
7:16AM 1 [RFC] Polly Status and Integration
3:54AM 1 RFC phantom memory intrinsic
3:26AM 3 [RFC] Polly Status and Integration
2:37AM 1 sanitizer test case failures after OS update
1:15AM 2 sanitizer test case failures after OS update
 
Tuesday September 12 2017
TimeRepliesSubject
9:16PM 1 [GreenDragon] Emergency Reboot
6:37PM 1 InstCombine, graph rewriting, Equality saturation
6:15PM 1 InstCombine, graph rewriting, Equality saturation
6:07PM 1 Reaching definitions on Machine IR post register allocation
6:01PM 1 Reaching definitions on Machine IR post register allocation
5:26PM 1 RFC phantom memory intrinsic
5:26PM 1 Link error: undefined reference to APIInt functions
4:50PM 1 Register pressure calculation in the machine scheduler and live-through registers
2:28PM 1 Difference between Predicates and Requires in td file
1:44PM 1 Register pressure calculation in the machine scheduler and live-through registers
8:33AM 2 InstCombine, graph rewriting, Equality saturation
7:54AM 2 RFC phantom memory intrinsic
6:00AM 2 Reaching definitions on Machine IR post register allocation
5:47AM 2 [RFC] Polly Status and Integration
5:29AM 1 Register pressure calculation in the machine scheduler and live-through registers
3:25AM 1 [ThinLTO] static library failure with object files with the same name
3:24AM 1 Performance of large llvm::ConstantDataArrays
1:57AM 1 Building LLVM's fuzzers
1:17AM 1 Live Register Spilling
 
Monday September 11 2017
TimeRepliesSubject
9:21PM 1 [ThinLTO] static library failure with object files with the same name
8:50PM 1 InstCombine, graph rewriting, Equality saturation
8:32PM 2 InstCombine, graph rewriting, Equality saturation
7:58PM 1 Unify debug and optimized variable locations with llvm.dbg.addr [was: DW_OP_LLVM_memory]
7:55PM 1 Using source-based code coverage on baremetal
7:35PM 1 Unify debug and optimized variable locations with llvm.dbg.addr [was: DW_OP_LLVM_memory]
7:01PM 1 [RFC] llvm-dwarfdump's command line interface
6:52PM 1 Building LLVM's fuzzers
6:52PM 1 [Release-testers] [cfe-dev] [5.0.0 Release] The final tag is in
6:49PM 1 [RFC] llvm-dwarfdump's command line interface
6:24PM 0 LLVM Weekly - #193, Sept 11th 2017
5:32PM 1 Different ways of running lit
5:26PM 1 [RFC] Polly Status and Integration
4:48PM 2 InstCombine, graph rewriting, Equality saturation
4:48PM 1 Different ways of running lit
3:50PM 2 InstCombine, graph rewriting, Equality saturation
3:14PM 1 InstCombine, graph rewriting, Equality saturation
2:22PM 0 RPATH in LLVM bitcode
1:44PM 1 plugin-opt=save-temps doesn't work in LLVM Gold 5.0.0
1:27PM 1 Lowering llvm.memset for ARM target
10:15AM 1 Register pressure calculation in the machine scheduler and live-through registers
9:37AM 1 Using source-based code coverage on baremetal
5:32AM 3 Different ways of running lit
2:01AM 2 Live Register Spilling
1:57AM 1 Live Register Spilling
 
Sunday September 10 2017
TimeRepliesSubject
7:41PM 1 [Release-testers] [5.0.0 Release] The final tag is in
7:07PM 1 Question about quad-register
6:56PM 1 [Release-testers] [5.0.0 Release] The final tag is in
5:16PM 1 [cfe-dev] 3 stage ninja bootstrap on darwin?
3:07PM 1 plugin-opt=save-temps doesn't work in LLVM Gold 5.0.0
8:34AM 1 Performance of large llvm::ConstantDataArrays
5:42AM 0 Topics for the LLVM Foundation BoF at the DevMtg?
5:18AM 1 Performance of large llvm::ConstantDataArrays
3:20AM 1 Wrong types for attribute
3:17AM 1 Question about quad-register
2:42AM 1 Register Allocators Documentation
1:16AM 1 Register Allocators Documentation
 
Saturday September 9 2017
TimeRepliesSubject
10:46AM 1 Register Allocators Documentation
5:36AM 1 Building LLVM's fuzzers
4:27AM 2 InstCombine, graph rewriting, Equality saturation
3:31AM 1 InstCombine, graph rewriting, Equality saturation
12:32AM 1 InstCombine, graph rewriting, Equality saturation
 
Friday September 8 2017
TimeRepliesSubject
11:43PM 0 Pre-built binaries LLVM 4.0.1 for Ubuntu are missing
11:30PM 1 Performance of large llvm::ConstantDataArrays
9:39PM 1 [RFC] llvm-dwarfdump's command line interface
9:32PM 3 [RFC] llvm-dwarfdump's command line interface
9:25PM 2 [RFC] llvm-dwarfdump's command line interface
7:20PM 0 Segmentation fault observed when a std::exception is thrown in a C++ program compiled with clang/llvm-5.0.0 as Objective-C++
7:04PM 1 [ThinLTO] static library failure with object files with the same name
6:37PM 1 Status of debuginfo-tests
6:06PM 1 Live Register Spilling
6:00PM 1 Change commit list associated with debuginfo-tests?
5:45PM 1 Status of debuginfo-tests
5:32PM 1 Unify debug and optimized variable locations with llvm.dbg.addr [was: DW_OP_LLVM_memory]
5:32PM 1 [cfe-dev] [RFC] Open sourcing and contributing TAPI back to the LLVM community
5:16PM 1 Aliasing Issue after vectorization
4:29PM 2 [cfe-dev] [RFC] Open sourcing and contributing TAPI back to the LLVM community
4:23PM 1 Status of debuginfo-tests
4:00PM 1 Status of debuginfo-tests
1:52PM 1 [RFC] Polly Status and Integration
1:49PM 1 [RFC] Polly Status and Integration
1:27PM 0 OPC_EmitMergeInputChains1_0 failed while lowering callseq_start
1:00PM 1 Performance of large llvm::ConstantDataArrays
12:33PM 2 [Release-testers] [5.0.0 Release] The final tag is in
8:48AM 1 Is LLVM's C-Api Unicode aware?
7:10AM 1 Live Register Spilling
6:55AM 1 Reaching definitions on Machine IR post register allocation
6:06AM 3 Performance of large llvm::ConstantDataArrays
5:10AM 1 InstCombine, graph rewriting, Equality saturation
1:52AM 1 [RFC] Open sourcing and contributing TAPI back to the LLVM community
12:01AM 4 [RFC] Open sourcing and contributing TAPI back to the LLVM community
 
Thursday September 7 2017
TimeRepliesSubject
9:46PM 2 DragonEgg for GCC v8.x and LLVM v6.x is just able to work
9:18PM 2 Unify debug and optimized variable locations with llvm.dbg.addr [was: DW_OP_LLVM_memory]
8:15PM 1 Status of debuginfo-tests
7:41PM 1 Status of debuginfo-tests
7:31PM 1 Status of debuginfo-tests
7:19PM 1 Status of debuginfo-tests
7:11PM 1 Status of debuginfo-tests
7:02PM 1 Status of debuginfo-tests
7:01PM 1 RFC: Unify debug and optimized variable locations with llvm.dbg.addr [was: DW_OP_LLVM_memory]
7:01PM 1 Status of debuginfo-tests
6:57PM 1 Status of debuginfo-tests
6:51PM 2 Status of debuginfo-tests
6:49PM 1 Status of debuginfo-tests
6:47PM 2 Status of debuginfo-tests
6:45PM 0 LLVM 5.0.0 Release
6:41PM 1 Status of debuginfo-tests
6:40PM 1 Status of debuginfo-tests
6:37PM 1 Status of debuginfo-tests
6:36PM 1 emulated-tls + LTO
6:34PM 1 Status of debuginfo-tests
6:34PM 2 Status of debuginfo-tests
6:26PM 3 Status of debuginfo-tests
6:23PM 2 Status of debuginfo-tests
6:11PM 1 Unify debug and optimized variable locations with llvm.dbg.addr [was: DW_OP_LLVM_memory]
5:53PM 1 emulated-tls + LTO
5:52PM 1 InstCombine, graph rewriting, Equality saturation
5:46PM 3 RFC: Unify debug and optimized variable locations with llvm.dbg.addr [was: DW_OP_LLVM_memory]
5:33PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
5:32PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
5:10PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
4:46PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
3:44PM 1 [ThinLTO] static library failure with object files with the same name
3:24PM 1 Lowering llvm.memset for ARM target
3:18PM 1 [ThinLTO] static library failure with object files with the same name
2:51PM 1 '-fsave-optimization-record' and VS2015 built compiler
2:36PM 1 '-fsave-optimization-record' and VS2015 built compiler
2:10PM 2 '-fsave-optimization-record' and VS2015 built compiler
6:00AM 1 TableGen : Difference between CodeEmitter and InstrInfo
4:10AM 1 DragonEgg for GCC v8.x and LLVM v6.x is just able to work
12:37AM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
12:20AM 1 Temporary disable ASan's allocator check
12:01AM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
 
Wednesday September 6 2017
TimeRepliesSubject
10:36PM 1 [RFC] mir-canon: A new tool for canonicalizing MIR for cleaner diffing.
9:42PM 1 Temporary disable ASan's allocator check
9:35PM 1 InstCombine, graph rewriting, Equality saturation
9:26PM 1 Using source-based code coverage on baremetal
9:01PM 3 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
8:43PM 1 libFuzzer: issue with weak symbols on Mac
8:40PM 1 libFuzzer: issue with weak symbols on Mac
8:28PM 2 [ThinLTO] static library failure with object files with the same name
8:20PM 1 libFuzzer: issue with weak symbols on Mac
8:14PM 1 Temporary disable ASan's allocator check
8:10PM 1 [ThinLTO] static library failure with object files with the same name
6:14PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
6:00PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
5:50PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
5:18PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
5:01PM 2 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
4:14PM 0 OPC_EmitMergeInputChains1_0 failed while lowering callseq_start
3:43PM 1 Temporary disable ASan's allocator check
2:44PM 2 [SCEV] Mul/UDiv folding
12:06PM 1 What the current state of Asan/Container Overflow detection?
11:42AM 1 Reaching definitions on Machine IR post register allocation
10:38AM 1 [Release-testers] [5.0.0 Release] The final tag is in
10:24AM 2 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
10:03AM 0 DeveloperPolicy: "Attribution of Changes" policy question
9:51AM 1 Using source-based code coverage on baremetal
4:53AM 1 [RFC] Adding ARC backend
1:55AM 3 Using source-based code coverage on baremetal
12:04AM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
 
Tuesday September 5 2017
TimeRepliesSubject
11:26PM 1 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
11:16PM 3 [RFC] PT.2 Add IR level interprocedural outliner for code size.
10:58PM 0 Looking for dogfooders of LLVM's PDB Debug Info on Windows
10:57PM 3 InstCombine, graph rewriting, Equality saturation
10:56PM 0 Coherent Logix - Sr. Compiler Engineer (LLVM)
9:34PM 1 [ThinLTO] static library failure with object files with the same name
9:18PM 0 September LLVM bay-area social is this Thursday!
9:09PM 1 [ThinLTO] static library failure with object files with the same name
8:26PM 0 How to change the metadata at an IR Node
8:24PM 1 Where to find the list of passes run by clang/opt with -O3
8:21PM 1 Unexpected dag combine in arm64
8:09PM 1 [ThinLTO] static library failure with object files with the same name
8:00PM 3 RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
7:53PM 1 Where to find the list of passes run by clang/opt with -O3
7:51PM 1 Where to find the list of passes run by clang/opt with -O3
7:23PM 1 Lowering llvm.memset for ARM target
6:24PM 2 [5.0.0 Release] The final tag is in
4:30PM 1 fortran compiler merge?
3:16PM 1 Where to find the list of passes run by clang/opt with -O3
2:40PM 1 fortran compiler merge?
1:09PM 1 Manipulate Register allocation in basic block level
12:17PM 2 alloca
12:09PM 0 Wrongly passing struct pointer
11:01AM 1 Unexpected dag combine in arm64
10:11AM 1 Phabricator down for rebooting
5:37AM 1 [RFC] Polly Status and Integration
5:36AM 1 Issues in Vector Add Instruction Machine Code Emission
5:34AM 1 Issues in Vector Add Instruction Machine Code Emission
5:27AM 1 Issues in Vector Add Instruction Machine Code Emission
12:45AM 1 Issues in Vector Add Instruction Machine Code Emission
12:33AM 1 Issues in Vector Add Instruction Machine Code Emission
 
Monday September 4 2017
TimeRepliesSubject
11:36PM 1 Issues in Vector Add Instruction Machine Code Emission
11:28PM 1 Issues in Vector Add Instruction Machine Code Emission
11:23PM 1 Issues in Vector Add Instruction Machine Code Emission
11:01PM 1 Issues in Vector Add Instruction Machine Code Emission
11:01PM 1 Issues in Vector Add Instruction Machine Code Emission
11:00PM 1 Issues in Vector Add Instruction Machine Code Emission
10:51PM 1 Issues in Vector Add Instruction Machine Code Emission
10:38PM 1 Issues in Vector Add Instruction Machine Code Emission
10:29PM 1 Issues in Vector Add Instruction Machine Code Emission
9:11PM 1 Issues in Vector Add Instruction Machine Code Emission
8:14PM 1 [RFC] Polly Status and Integration
7:14PM 1 [RFC] Polly Status and Integration
6:49PM 1 [RFC] Polly Status and Integration
6:37PM 1 llvm-dev Digest, Vol 159, Issue 2
5:59PM 0 LLVM Weekly - #192, Sep 4th 2017
2:00PM 1 Reaching definitions on Machine IR post register allocation
10:07AM 1 How to implement MyArchInstrInfo::isLoadFromStackSlot where most instructions have an Offset.
5:14AM 0 Creating a TableGen Backend
 
Sunday September 3 2017
TimeRepliesSubject
3:31PM 1 Fwd: [GreenDragon] Jenkins Core and Plugin Maintenance
10:06AM 1 Why are LLVM releases statically linked against LLVM libraries?
6:42AM 0 Codegen from memory fails, works from .bc and .ll (X86 + NVPTX)
6:06AM 2 getelementptr
5:18AM 1 getelementptr
1:41AM 1 Why are LLVM releases statically linked against LLVM libraries?
 
Saturday September 2 2017
TimeRepliesSubject
9:31PM 1 getelementptr
7:52PM 1 [Release-testers] [5.0.0 Release] Release Candidate 5 tagged
5:35PM 0 Research topics in LLVM
3:31PM 1 LLD: Calling from within LLVM
2:09PM 1 LLD: Calling from within LLVM
10:53AM 2 getelementptr
10:53AM 1 getelementptr
7:26AM 0 Reaching definitions on Machine IR post register allocation
12:50AM 1 Buildbot can't submit results to LNT server
 
Friday September 1 2017
TimeRepliesSubject
11:03PM 1 Measuring memory usage of opt passes.
9:19PM 1 LLD: patch to fix libCOFF calling exit() on success in a library function
9:07PM 3 [5.0.0 Release] Release Candidate 5 tagged
7:18PM 1 [RFC] Polly Status and Integration
6:47PM 4 [RFC] Polly Status and Integration
6:34PM 1 [cfe-dev] Uncovering non-determinism in LLVM - An Update
5:14PM 1 [cfe-dev] 3 stage ninja bootstrap on darwin?
4:21PM 1 [RFC] Adding ARC backend
3:14PM 1 [RFC] Adding ARC backend
2:14PM 1 tsan_interface_java.h; any users? reviving https://github.com/google/java-thread-sanitizer?
1:58PM 0 Memory leak on LLVM 4.0.1
10:50AM 1 getelementptr
10:44AM 1 getelementptr
9:32AM 1 [RFC] Adding ARC backend
8:48AM 2 [RFC] Function stack size section.
2:08AM 2 [RFC] Value Range Based Optimization Opportunity in LLVM
1:22AM 0 [RFC] Value Range Based Optimization Opportunity in LLVM