On Fri, Sep 29, 2017 at 7:51 PM, Andrew Trick via llvm-dev < llvm-dev at lists.llvm.org> wrote:> > > > On Sep 22, 2017, at 10:34 AM, Thorsten Schütt via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > > > > #define GET_REGINFO_ENUM > > #include "AArch64GenRegisterInfo.inc" > > > > #define GET_INSTRINFO_ENUM > > #include "AArch64GenInstrInfo.inc" > > > > #define GET_SUBTARGETINFO_ENUM > > #include "AArch64GenSubtargetInfo.inc" > > > > #include "llvm/MC/MCSchedule.h" > > #include "llvm/MC/MCRegisterInfo.h" > > #include "llvm/MC/MCInstrDesc.h" > > #include "llvm/MC/MCInstrInfo.h" > > #include "llvm/MC/SubtargetFeature.h" > > #include "llvm/MC/MCSubtargetInfo.h" > > > > #define GET_INSTRINFO_MC_DESC > > #include "AArch64GenInstrInfo.inc" > > > > #define GET_SUBTARGETINFO_MC_DESC > > #include "AArch64GenSubtargetInfo.inc" > > > > #define GET_REGINFO_MC_DESC > > #include "AArch64GenRegisterInfo.inc" > > > > int main(int argc, char **argv) { > > llvm::MCInstrInfo II; > > > > llvm::InitAArch64MCInstrInfo(&II); > > > > llvm::StringRef ref = II.getName(llvm::AArch64::LDADDALX); > > llvm::MCInstrDesc d = II.get(llvm::AArch64::LDADDALX); > > > > printf("name %s; class %d\n", ref.str().c_str(), d.SchedClass); > > > > printf("microops %d\n", llvm::ThunderX2T99Model.getSchedClassDesc(d. > SchedClass)->NumMicroOps); > > > > return 0; > > } > > > > /* > > LDADDALB_LDADDALH_LDADDALW_LDADDALX = 872, in Sched enum > > */ > > I bet the problem is that “WriteAtomic” is marked unsupported, so it gets > an invalid sched class. The invalid NumMicroOps means that the scheduler > will assert if it ever sees that instruction. > >The scheduler does not assert if it sees LDADDAL, or any other of the LSE instructions on ThunderX2. We've been generating LSE code for months now, with LLVM built in debug+assert+expensive-checks mode. --Stefan -- Stefan Teleman stefan.teleman at gmail.com -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170929/f99a1ed6/attachment.html>
> On Sep 29, 2017, at 6:10 PM, Stefan Teleman <stefan.teleman at gmail.com> wrote: > > > > On Fri, Sep 29, 2017 at 7:51 PM, Andrew Trick via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > > > /* > > LDADDALB_LDADDALH_LDADDALW_LDADDALX = 872, in Sched enum > > */ > > I bet the problem is that “WriteAtomic” is marked unsupported, so it gets an invalid sched class. The invalid NumMicroOps means that the scheduler will assert if it ever sees that instruction. > > > The scheduler does not assert if it sees LDADDAL, or any other of the LSE instructions on ThunderX2. We've been generating LSE code for months now, with LLVM built in debug+assert+expensive-checks mode. > > —StefanThe machine model *should* assert whenever it sees an “unsupported” instruction and the machine model is marked “complete". The scheduler used to have such an assert, but some concessions have been made to handle “incomplete” machine models. Currently, it looks like it picks some default values. Can you file a bug showing the relevant part of AArch64SchedThunderX2T99.td (CompleteModel=1, WriteAtomic...), a self-contained dump of the machine instrs before scheduling, and -debug-only="machine-scheduler” output? Failing to catch this at compile time is pretty horrible. -Andy -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171002/abf1d8fc/attachment.html>