Tony Linthicum
2012-Jul-03 14:48 UTC
[LLVMdev] target hexagon and sparcv9 lead to llc crack
On 7/3/2012 5:01 AM, Duncan Sands wrote:> Hi, > >> (4) llc -march=hexagon test.ll -o test.s >> >> '' is not a recognized processor for this target (ignoring processor) >> 0 llc 0x08c2512b >> Stack dump: >> 0. Program arguments: llc -march=hexagon test.ll -o test.s >> 1. Running pass 'Function Pass Manager' on module 'test.ll'. >> 2. Running pass 'Hexagon DAG->DAG Pattern Instruction Selection' on >> function '@cmp' >> Segmentation fault (core dumped) > > if you provide an explicit choice of processor, eg -mcpu=hexagonv2, then this > works. It looks like hexagon is missing a default choice of processor. > > Ciao, Duncan. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >We will set a default target for llc and upstream it shortly! Thanks. Tony -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum.
Sebastian Pop
2012-Jul-04 02:27 UTC
[LLVMdev] target hexagon and sparcv9 lead to llc crack
Hi, On Tue, Jul 3, 2012 at 9:48 AM, Tony Linthicum <tlinth at codeaurora.org> wrote:> On 7/3/2012 5:01 AM, Duncan Sands wrote: >> Hi, >> >>> (4) llc -march=hexagon test.ll -o test.s >>> >>> '' is not a recognized processor for this target (ignoring processor) >>> 0 llc 0x08c2512b >>> Stack dump: >>> 0. Program arguments: llc -march=hexagon test.ll -o test.s >>> 1. Running pass 'Function Pass Manager' on module 'test.ll'. >>> 2. Running pass 'Hexagon DAG->DAG Pattern Instruction Selection' on >>> function '@cmp' >>> Segmentation fault (core dumped) >> >> if you provide an explicit choice of processor, eg -mcpu=hexagonv2, then this >> works. It looks like hexagon is missing a default choice of processor. >> >> Ciao, Duncan. >> _______________________________________________ >> LLVM Developers mailing list >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >> > > We will set a default target for llc and upstream it shortly!Attached is the patch that I will commit: this should fix a bunch of fails that we currently have in make check when configuring with --target=hexagon. Sebastian -- Qualcomm Innovation Center, Inc is a member of Code Aurora Forum -------------- next part -------------- A non-text attachment was scrubbed... Name: default-mv4.patch Type: application/octet-stream Size: 1116 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120703/9eab7756/attachment.obj>
Sebastian Pop
2012-Jul-19 03:57 UTC
[LLVMdev] target hexagon and sparcv9 lead to llc crack
On Tue, Jul 3, 2012 at 9:27 PM, Sebastian Pop <spop at codeaurora.org> wrote:> Hi, > > On Tue, Jul 3, 2012 at 9:48 AM, Tony Linthicum <tlinth at codeaurora.org> wrote: >> On 7/3/2012 5:01 AM, Duncan Sands wrote: >>> Hi, >>> >>>> (4) llc -march=hexagon test.ll -o test.s >>>> >>>> '' is not a recognized processor for this target (ignoring processor) >>>> 0 llc 0x08c2512b >>>> Stack dump: >>>> 0. Program arguments: llc -march=hexagon test.ll -o test.s >>>> 1. Running pass 'Function Pass Manager' on module 'test.ll'. >>>> 2. Running pass 'Hexagon DAG->DAG Pattern Instruction Selection' on >>>> function '@cmp' >>>> Segmentation fault (core dumped) >>> >>> if you provide an explicit choice of processor, eg -mcpu=hexagonv2, then this >>> works. It looks like hexagon is missing a default choice of processor. >>> >>> Ciao, Duncan. >>> _______________________________________________ >>> LLVM Developers mailing list >>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >>> >> >> We will set a default target for llc and upstream it shortly! > > Attached is the patch that I will commit: this should fix a bunch > of fails that we currently have in make check when configuring > with --target=hexagon. >Ping: is this patch ok to commit? Thanks, Sebastian -- Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
Possibly Parallel Threads
- [LLVMdev] target hexagon and sparcv9 lead to llc crack
- [LLVMdev] target hexagon and sparcv9 lead to llc crack
- [LLVMdev] target hexagon and sparcv9 lead to llc crack
- [LLVMdev] target hexagon and sparcv9 lead to llc crack
- [LLVMdev] target hexagon and sparcv9 lead to llc crack