Matt Fischer
2012-Jul-02 15:05 UTC
[LLVMdev] [PATCH] Apply Thumb2 ROR optimization only when Thumb2 is supported
I've been playing around with using LLVM on one of our projects, which runs on an arm1176jzf-s processor. When compiling for Thumb, a couple of the generated assembly files end up with a 'ror.w' instruction, which is a Thumb2 instruction. Since arm1176jzf-s doesn't support Thumb2, the assembler then turns around and barfs on it. I don't have any experience with this codebase, but after looking around for a while, I think I found the culprit--there was a change back in #130502 which added a peephole optimization to generate that instruction, but the pattern was not made conditional on being in Thumb2 mode. If that's correct, then I believe the attached patch will fix it (at the very least, it made my specific error go away). Is this the right fix? Thanks, Matt -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Apply-Thumb2-ROR-optimization-only-when-Thumb2-is-su.patch Type: application/octet-stream Size: 1024 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120702/9aecc3a0/attachment.obj>
Jim Grosbach
2012-Jul-02 16:34 UTC
[LLVMdev] [PATCH] Apply Thumb2 ROR optimization only when Thumb2 is supported
Hi Matt, You're absolutely right, that pattern should definitely have an "only-in-Thumb2" predicate attached. Do you have commit access? Also, if you have a reduced test case, that would be awesome, but the patch is correct as-is even if not. -Jim On Jul 2, 2012, at 8:05 AM, Matt Fischer <mattfischer84 at gmail.com> wrote:> I've been playing around with using LLVM on one of our projects, which > runs on an arm1176jzf-s processor. When compiling for Thumb, a couple > of the generated assembly files end up with a 'ror.w' instruction, > which is a Thumb2 instruction. Since arm1176jzf-s doesn't support > Thumb2, the assembler then turns around and barfs on it. > > I don't have any experience with this codebase, but after looking > around for a while, I think I found the culprit--there was a change > back in #130502 which added a peephole optimization to generate that > instruction, but the pattern was not made conditional on being in > Thumb2 mode. If that's correct, then I believe the attached patch > will fix it (at the very least, it made my specific error go away). > Is this the right fix? > > Thanks, > Matt > <0001-Apply-Thumb2-ROR-optimization-only-when-Thumb2-is-su.patch>_______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
Bob Wilson
2012-Jul-02 17:23 UTC
[LLVMdev] [PATCH] Apply Thumb2 ROR optimization only when Thumb2 is supported
I went ahead and committed it, along with a basic test case, in svn r159538. On Jul 2, 2012, at 9:34 AM, Jim Grosbach <grosbach at apple.com> wrote:> Hi Matt, > > You're absolutely right, that pattern should definitely have an "only-in-Thumb2" predicate attached. > > Do you have commit access? Also, if you have a reduced test case, that would be awesome, but the patch is correct as-is even if not. > > -Jim > > On Jul 2, 2012, at 8:05 AM, Matt Fischer <mattfischer84 at gmail.com> wrote: > >> I've been playing around with using LLVM on one of our projects, which >> runs on an arm1176jzf-s processor. When compiling for Thumb, a couple >> of the generated assembly files end up with a 'ror.w' instruction, >> which is a Thumb2 instruction. Since arm1176jzf-s doesn't support >> Thumb2, the assembler then turns around and barfs on it. >> >> I don't have any experience with this codebase, but after looking >> around for a while, I think I found the culprit--there was a change >> back in #130502 which added a peephole optimization to generate that >> instruction, but the pattern was not made conditional on being in >> Thumb2 mode. If that's correct, then I believe the attached patch >> will fix it (at the very least, it made my specific error go away). >> Is this the right fix? >> >> Thanks, >> Matt >> <0001-Apply-Thumb2-ROR-optimization-only-when-Thumb2-is-su.patch>_______________________________________________ >> LLVM Developers mailing list >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
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