search for: thumb2

I've been playing around with using LLVM on one of our projects, which runs on an arm1176jzf-s processor. When compiling for Thumb, a couple of the generated assembly files end up with a 'ror.w' instruction, which is a Thumb2 instruction. Since arm1176jzf-s doesn't support Thumb2, the assembler then turns around and barfs on it. I don't have any experience with this codebase, but after looking around for a while, I think I found the culprit--there was a change back in #130502 which added a peephole optimizatio...

Hi Matt, You're absolutely right, that pattern should definitely have an "only-in-Thumb2" predicate attached. Do you have commit access? Also, if you have a reduced test case, that would be awesome, but the patch is correct as-is even if not. -Jim On Jul 2, 2012, at 8:05 AM, Matt Fischer <mattfischer84 at gmail.com> wrote: > I've been playing around with using LLV...

I went ahead and committed it, along with a basic test case, in svn r159538. On Jul 2, 2012, at 9:34 AM, Jim Grosbach <grosbach at apple.com> wrote: > Hi Matt, > > You're absolutely right, that pattern should definitely have an "only-in-Thumb2" predicate attached. > > Do you have commit access? Also, if you have a reduced test case, that would be awesome, but the patch is correct as-is even if not. > > -Jim > > On Jul 2, 2012, at 8:05 AM, Matt Fischer <mattfischer84 at gmail.com> wrote: > >> I...

I've been playing around with using LLVM on one of our projects, which runs on an arm1176jzf-s processor. When compiling for Thumb, a couple of the generated assembly files end up with a 'ror.w' instruction, which is a Thumb2 instruction. Since arm1176jzf-s doesn't support Thumb2, the assembler then turns around and barfs on it. I don't have any experience with this codebase, but after looking around for a while, I think I found the culprit--there was a change back in #130502 which added a peephole optimizatio...

Hello, I'm trying to convince llc to compile into thumb2 ISA on ARMv7. I'm using: -march=thumb -mattr=v7,thumb2,vfp3 but llc complains about this with: llc: error: invalid target 'thumb -mattr=v7,thumb2,vfp3' I'm using LLVM from Aug 29 2011. To me the set of options looks sane so I'd like to ask what's wrong with this. Thank...

...t with host=x86, target=arm) with the following command: > clang -march=armv7-a -mfloat-abi=soft -ccc-host-triple arm-none-linux-gnueabi -integrated-as main.c -o main.o -c and get error message: ------------------------------------------------------- main.c:9:9: error: instruction requires: thumb2 "ldrex %[oldValue], [%[ptr], #0]\n" // oldValue = *ptr ^ <inline asm>:1:2: note: instantiated into assembly here ldrex r6, [r4, #0] ^ main.c:11:3: error: instruction requires: thumb2 "strexeq %[failed], %[newValue], [%[ptr], #0]\n"...

Hi Karel, It actually looks like the argument parser has parsed "thumb -mattr=v7,thumb2,vfp3" as the full argument to "-march=". Strange. The easiest way to get what you want is probably "-mtriple thumbv7--". v7 has Thumb2 enabled and VFPv3 (along with NEON) by default. Cheers, James ________________________________________ From: llvmdev-bounces at cs.uiuc....

...h the following command: > > > clang -march=armv7-a -mfloat-abi=soft -ccc-host-triple arm-none-linux-gnueabi -integrated-as main.c -o main.o -c > > and get error message: > > ------------------------------------------------------- > main.c:9:9: error: instruction requires: thumb2 > "ldrex %[oldValue], [%[ptr], #0]\n" // oldValue = *ptr > ^ > <inline asm>:1:2: note: instantiated into assembly here > ldrex r6, [r4, #0] > ^ > main.c:11:3: error: instruction requires: thumb2 > "strexeq %[failed],...

...;> >>> clang -march=armv7-a -mfloat-abi=soft -ccc-host-triple arm-none-linux-gnueabi -integrated-as main.c -o main.o -c >> >> and get error message: >> >> ------------------------------------------------------- >> main.c:9:9: error: instruction requires: thumb2 >> "ldrex %[oldValue], [%[ptr], #0]\n" // oldValue = *ptr >> ^ >> <inline asm>:1:2: note: instantiated into assembly here >> ldrex r6, [r4, #0] >> ^ >> main.c:11:3: error: instruction requires: thumb2 >> &q...

Hi all, Does llc -march=thumb -mcpu=cortex-a9 enable generation of thumb2 code for armv7 ? Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120727/da758ea0/attachment.html>

On Jul 27, 2012, at 9:04 AM, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > Hi all, > > Does llc –march=thumb –mcpu=cortex-a9 enable generation of thumb2 code for armv7 ? That's how I usually do it. Somewhere in the target description we associate a9 with -mattr=+thumb2. There are plenty of other ways to get the same result, and it's all very confusing and opaque. Don't ask me what triples are valid. I usually verify that I have the r...

...clang -march=armv7-a -mfloat-abi=soft -ccc-host-triple arm-none-linux-gnueabi -integrated-as main.c -o main.o -c >>> >>> and get error message: >>> >>> ------------------------------------------------------- >>> main.c:9:9: error: instruction requires: thumb2 >>> "ldrex %[oldValue], [%[ptr], #0]\n" // oldValue = *ptr >>> ^ >>> <inline asm>:1:2: note: instantiated into assembly here >>> ldrex r6, [r4, #0] >>> ^ >>> main.c:11:3: error: instruction requires: thumb...

Hi Damjan, > This sounds like a dead end as newer binutils are GPLv3. Unfortunately, you have to live with this. Until recently binutils were quite buggy wrt thumb2 code, so, most probably you will need new binutils in any case. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

...".fpu vfpv3-d16" directive generated in assembly file. Do you know how to make it happen ? Best Regards Seb From: Andrew Trick [mailto:atrick at apple.com] Sent: Saturday, July 28, 2012 2:46 AM To: Sebastien DELDON-GNB Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Question about arm thumb2 code generation On Jul 27, 2012, at 9:04 AM, Sebastien DELDON-GNB <sebastien.deldon at st.com<mailto:sebastien.deldon at st.com>> wrote: Hi all, Does llc -march=thumb -mcpu=cortex-a9 enable generation of thumb2 code for armv7 ? That's how I usually do it. Somewhere in the targ...

On 22 June 2011 19:18, Anton Korobeynikov <anton at korobeynikov.info> wrote: > Unfortunately, you have to live with this. Until recently binutils > were quite buggy wrt thumb2 code, so, most probably you will need new > binutils in any case. Hi Anton, It's not so simple. GPL3 can be quite a nuisance to change and even to use. This is why LLVM is becoming to popular for ARM... ;) Jim, how much work would you reckon it'll take to have a working assembler? ch...

...10: i32 = ARMISD::Wrapper 0x1e77f10 [ID=9] Initial Opcode index to 49796 OpcodeSwitch from 49799 to 49891 Skipped scope entry (due to false predicate) at index 49896, continuing at 49914 Morphed node: 0x1e78210: i32 = MOVi32imm 0x1e77f10 ISEL: Match complete! Here is the failing case in Thumb2 mode ISEL: Starting pattern match on root node: 0x22f0f10: i32,ch = load 0x22c10b0, 0x22ee330, 0x22ee430<LD4[ConstantPool]> [ID=10] Initial Opcode index to 24668 Match failed at index 24684 ..... Continuing at 26993 Skipped scope entry (due to false predicate) at index 27018, contin...

On 22 July 2012 20:42, Anton Korobeynikov <anton at korobeynikov.info> wrote: >> Any suggestions? > Try to specify CPU explicitly. He shouldn't have to, but that might help. Maybe setting -march? This is a big mess... I thought that v7 always assumed Thumb2 for the thumb flag, and v7M should always assume Cortex-M3 CPU if none provided. It's funny that James had a great patch to solve all those problems by implementing Clang's architecture selection in table-gen more than an year ago. I wonder what happened to that thread... :/ -- cheers, -...

Hello everyone, I've added suffixed versions of ARM and Thumb2 instructions to tablegen. That is, for example, "movs" or "orrs". I implemented a rather simple codegen optimization which removes the comparison in patterns like orr r1, r2 ---> orrs r1, r2 cmp r1, 0 It works and have already shown nice acceleration (e.g., 3.3...

Hello everyone, I've added the "S" suffixed versions of ARM and Thumb2 instructions to the rest of those declared in tablegen. For example, "movs" or "muls". Besides, I propose the codegen optimization based on them, which removes the redundant comparison in patterns like orr r1, r2, r3 ----> orrs r1, r2, r3 cmp r1, 0 This optim...

On 23 July 2012 17:03, Chris Cadwallader <ccadwallader at arxan.com> wrote: > On Darwin, if -march is armv7 clang's driver will assume you want thumb2 unless you also give it -mno-thumb but that is irrelevant with mcpu=cortex-m3. I think that Thumb2 should be the default for v7 on any system, not just Darwin. Maybe some ARM folk can comment on this... -- cheers, --renato http://systemcall.org/