llvm dev - Jun 2012 - [LLVMdev] [PATCH] Apply Thumb2 ROR optimization only when Thumb2 is supported

I've been playing around with using LLVM on one of our projects, which runs
on an arm1176jzf-s processor.  When compiling for Thumb, a couple of the
generated assembly files end up with a 'ror.w' instruction, which is a
Thumb2 instruction.  Since arm1176jzf-s doesn't support Thumb2, the
assembler then turns around and barfs on it.

I don't have any experience with this codebase, but after looking around for
a while, I think I found the culprit--there was a change back in #130502 which
added a peephole optimization to generate that instruction, but the pattern was
not made conditional on being in Thumb2 mode.  If that's correct, then I
believe the attached patch will fix it (at the very least, it made my specific
error go away).  Is this the right fix?

Thanks,
Matt

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