search for: arm1176jzf

I've been playing around with using LLVM on one of our projects, which runs on an arm1176jzf-s processor. When compiling for Thumb, a couple of the generated assembly files end up with a 'ror.w' instruction, which is a Thumb2 instruction. Since arm1176jzf-s doesn't support Thumb2, the assembler then turns around and barfs on it. I don't have any experience with this code...

...Raspberry pi for LLVM 3.2 with clang 3.2? I realized that "-ccc-host-triple" is no longer valid option in clang. p.s. I googled and found the following which doesn't work with clang 3.2. To cross-compile for Raspberry Pi add flags -ccc-host-triple arm-eabi -marm -mfpu=vfp -mcpu=arm1176jzf-s -mtune=arm1176jzf-s -mfloat-abi=softfp -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130412/1b3d23ca/attachment.html>

...ccess? Also, if you have a reduced test case, that would be awesome, but the patch is correct as-is even if not. -Jim On Jul 2, 2012, at 8:05 AM, Matt Fischer <mattfischer84 at gmail.com> wrote: > I've been playing around with using LLVM on one of our projects, which > runs on an arm1176jzf-s processor. When compiling for Thumb, a couple > of the generated assembly files end up with a 'ror.w' instruction, > which is a Thumb2 instruction. Since arm1176jzf-s doesn't support > Thumb2, the assembler then turns around and barfs on it. > > I don't have any...

...d test case, that would be awesome, but the patch is correct as-is even if not. > > -Jim > > On Jul 2, 2012, at 8:05 AM, Matt Fischer <mattfischer84 at gmail.com> wrote: > >> I've been playing around with using LLVM on one of our projects, which >> runs on an arm1176jzf-s processor. When compiling for Thumb, a couple >> of the generated assembly files end up with a 'ror.w' instruction, >> which is a Thumb2 instruction. Since arm1176jzf-s doesn't support >> Thumb2, the assembler then turns around and barfs on it. >> >> I...

Targetting the raspberry pi, what triple/flags should I set? I tried triple: armv4t-unknown-linux-gnueabi and ld fails with: a.out uses VFP register arguments if i set hardfloat (using optdata.FloatABIType = FloatABI::Hard), ld fails with an assertion: 2.22 assertion fail ../../bfd/elf32-arm.c:11477 what am I missing?

It depends, of course, what operating system you have installed on the RPi, but given that it's an ARM1176JZFS (ARMv6) chip, I would expect to see armv6, not armv4t, in the CPU part of the triple. It has a VFP unit, so I'd assume that you'd want to set hardfp (unless you installed an OS that doesn't support hardfp in its standard library), but if ld is complaining then you almost certainly hav...

...ning · Late+Machine outlining NOTE: For fairness in comparisons with the Machine Outliner, all IR outliner runs also include (-mno-red-zone, outlining from linkonce_odr/weak_odr functions). The code size benchmarking results provided are: * LLVM Test Suite - X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* * Spec 2006 - X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* * Clang - X86_64(Mac OS) * llvm-tblgen - X86_64(Mac OS) * CSiBE - AArch64 * The machine outliner currently only supports X86_64 and AArch64. Full Code Size Results:...

...chine outlining > > NOTE: For fairness in comparisons with the Machine Outliner, all IR outliner runs also include (-mno-red-zone, outlining from linkonce_odr/weak_odr functions). > > The code size benchmarking results provided are: > * LLVM Test Suite > X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* > * Spec 2006 > X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* > * Clang > X86_64(Mac OS) > * llvm-tblgen > X86_64(Mac OS) > * CSiBE > AArch64 > * The machine outliner currently only supports X86_64 and AArch64. > > Full...

I've been playing around with using LLVM on one of our projects, which runs on an arm1176jzf-s processor. When compiling for Thumb, a couple of the generated assembly files end up with a 'ror.w' instruction, which is a Thumb2 instruction. Since arm1176jzf-s doesn't support Thumb2, the assembler then turns around and barfs on it. I don't have any experience with this code...

...> > NOTE: For fairness in comparisons with the Machine Outliner, all IR > outliner runs also include (-mno-red-zone, outlining from > linkonce_odr/weak_odr functions). > > The code size benchmarking results provided are: > * LLVM Test Suite > > - X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* > > * Spec 2006 > > - X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* > > * Clang > > - X86_64(Mac OS) > > * llvm-tblgen > > - X86_64(Mac OS) > > * CSiBE > > - AArch64 > > * The machine outliner curr...

...>> NOTE: For fairness in comparisons with the Machine Outliner, all IR outliner runs also include (-mno-red-zone, outlining from linkonce_odr/weak_odr functions). >> >> The code size benchmarking results provided are: >> * LLVM Test Suite >> X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* >> * Spec 2006 >> X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* >> * Clang >> X86_64(Mac OS) >> * llvm-tblgen >> X86_64(Mac OS) >> * CSiBE >> AArch64 >> * The machine outliner currently only supports X...

llvm-toolchain-3.8 seems to have problems on debian armel and raspbian. On raspbian it builds but our armv7 contamination checker blocked it from entering the repo. Further investigation showed that "compiler-rt" was being built with -march=armv7 . I was able to remove the -march with some build-system hacker but then I got a failure on

Hello. For our project needs we implemented a custom calling convention. The main goals are to pass function arguments in registers and always use tailcall optimization for calls to functions with our CC when applicable. Function arguments are always pointers and the maximum number of arguments is 5. No frame pointer register is in use for this CC. No varargs. Finally, there are not any

On 17/05/16 18:07, Tim Northover wrote: > Yes, it looks like we'd need to conditionally compile these functions > in ARM mode and use the v6 barrier instead of dmb ("mcr p15, #0, r0, > c7, c10, #5" I believe) to support the ARM1176JZF-S in RPi. You'd > probably also want the build system to use an explicit -march=armv6 or > something so you're not at the mercy of how the host compiler was > configured. > > I suspect you're the first person to try and get compiler-rt going for > pre-v7 hardware, whic...

Raspberry Pi 1 and Zero use the arm1176jzf-s chip which AFAIK doesn't support NEON intrinsics. This may be a bug with the configure script because it appears to be compiling with NEON enabled. Lifeng can you comment? Is there a way to override the CPU detection in this case? Samuel, as a workaround you can download and compile an older...

...so should not make a difference. I compiled the three final versions of each major release of libopus so that was 0.9.14, 1.0.3 & 1.1. These were all compiled natively on the machine using the current repo version of gcc 4.6.3 and with these optimisation flags: -O2 -pipe -march=armv6j -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard These were compiled with floating point enabled. I will look at the fixed point version separately later. I used a clip of speech from a librevox recording which was resampled from 44.1khz to 48khz within audacity. The clip is 2 minutes long. I wrote a simple bash sc...

...For fairness in comparisons with the Machine Outliner, all IR outliner runs also include (-mno-red-zone, outlining from linkonce_odr/weak_odr functions). >>> >>> The code size benchmarking results provided are: >>> * LLVM Test Suite >>> X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* >>> * Spec 2006 >>> X86_64, X86*, AArch64, Arm1176jzf-s*, Arm1176jzf-s-thumb* >>> * Clang >>> X86_64(Mac OS) >>> * llvm-tblgen >>> X86_64(Mac OS) >>> * CSiBE >>> AArch64 >>> * The machin...

...so should not make a difference. I compiled the three final versions of each major release of libopus so that was 0.9.14, 1.0.3 & 1.1. These were all compiled natively on the machine using the current repo version of gcc 4.6.3 and with these optimisation flags: -O2 -pipe -march=armv6j -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard These were compiled with floating point enabled. I will look at the fixed point version separately later. I used a clip of speech from a librevox recording which was resampled from 44.1khz to 48khz within audacity. The clip is 2 minutes long. I wrote a simple bash sc...

...d the three final versions of each major release of libopus so >> that was 0.9.14, 1.0.3 & 1.1. These were all compiled natively on the >> machine using the current repo version of gcc 4.6.3 and with these >> optimisation flags: >> >> -O2 -pipe -march=armv6j -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard >> >> >> These were compiled with floating point enabled. I will look at the fixed >> point version separately later. >> >> I used a clip of speech from a librevox recording which was resampled from >> 44.1khz to 48khz within au...

...cent. > > Triple should probably be "arm-linux-gnueabi" at least, or maybe > "arm-none-eabi" if you're targeting bare metal; the CPU would probably > be OK at default for either of those, but otherwise would normally be > something implementing at least ARMv6 (arm1176jzf-s in RPi), probably > ARMv7 (something starting with "cortex"). > > > So the question is how to preserve LR register in the best way? My > > current idea is to write a MachineFunctionPass which would add LR > > register spill instruction to stack or some other memo...