llvm dev - Jul 2016 - Check sub register relations in RA

Hi there,

In my register allocator, I was trying to get the parent of a register in
ARM.

That is:

D0 <-> S0, S1.

Given S0, how am I able to get D0?

Thanks,
Xiaochu
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A register can have multiple super registers/sub registers which you can query
with the MCSuperRegIterator/MCSubRegIterator. You may also have register aliases
that do not completely overlap a register, you can query those with the
MCRegAliasIterator (super/sub registers count as aliases too), however arbitrary
aliases are rare in llvm I believe the ARM target for example doesn't use
any.

BTW: Most register allocators in llvm work on the register unit level instead of
walking the sub/super register hierarchies.

Greetings
    Matthias
> On Jul 19, 2016, at 10:42 AM, Xiaochu Liu via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> 
> Hi there,
> 
> In my register allocator, I was trying to get the parent of a register in
ARM.
> 
> That is:
> 
> D0 <-> S0, S1. 
> 
> Given S0, how am I able to get D0?
> 
> Thanks,
> Xiaochu
> 
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev

Thanks, Matthias! My RA is a legacy one which is ported to LLVM. I will use
regunit later for consistency.

On Jul 19, 2016 11:40 AM, "Matthias Braun" <mbraun at apple.com>
wrote:
> A register can have multiple super registers/sub registers which you can
> query with the MCSuperRegIterator/MCSubRegIterator. You may also have
> register aliases that do not completely overlap a register, you can query
> those with the MCRegAliasIterator (super/sub registers count as aliases
> too), however arbitrary aliases are rare in llvm I believe the ARM target
> for example doesn't use any.
>
> BTW: Most register allocators in llvm work on the register unit level
> instead of walking the sub/super register hierarchies.
>
> Greetings
>     Matthias
>
> > On Jul 19, 2016, at 10:42 AM, Xiaochu Liu via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
> >
> > Hi there,
> >
> > In my register allocator, I was trying to get the parent of a register
> in ARM.
> >
> > That is:
> >
> > D0 <-> S0, S1.
> >
> > Given S0, how am I able to get D0?
> >
> > Thanks,
> > Xiaochu
> >
> > _______________________________________________
> > LLVM Developers mailing list
> > llvm-dev at lists.llvm.org
> > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
>
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