Displaying 18 results from an estimated 18 matches for "mcregaliasiterator".
2013 May 22
2
[LLVMdev] Avoiding MCRegAliasIterator with register units
...the complexity of these register banks. Register units are more or less the same as leaf registers in the sub-register graph. Register interference is tracked in terms of register units, and that means it is no longer necessary to scan through the long list of aliasing registers.
We still have an MCRegAliasIterator that's used here and there in the code generator, and TableGen is still emitting tables backing this iterator.
I would like to minimize the use of MCRegAliasIterator because some of the alias lists are so long. In most cases, it should be possible to express algorithms in terms of register uni...
2013 May 24
0
[LLVMdev] Avoiding MCRegAliasIterator with register units
Jakob,
I've implemented a patch that reworks the MCRegAliasIterator to dynamically compute the register aliases. The size reduction in the RegDiffLists are rather dramatic.
Here are a few size differences for MCTargetDesc.o files (before and after) in bytes:
R600 - 36160B - 11184B - 69% reduction
ARM - 28480B - 8368B - 71% reduction
Mips - 816B - 576B - 29% reduc...
2013 May 24
2
[LLVMdev] Avoiding MCRegAliasIterator with register units
On 24 May 2013 17:39, Chad Rosier <mcrosier at apple.com> wrote:
> One side effect of dynamically computing the aliases is that the iterator
> does not guarantee that the entries are ordered or that duplicates have
> been removed.
>
Hi Chad,
Sounds like you're growing the list (thus the lookup time), rather than
shrinking, as I take it was Jacob's original intention?
2016 Jul 19
2
Check sub register relations in RA
Hi there,
In my register allocator, I was trying to get the parent of a register in
ARM.
That is:
D0 <-> S0, S1.
Given S0, how am I able to get D0?
Thanks,
Xiaochu
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2012 Jun 01
0
[LLVMdev] Heads up: MCRegisterInfo register list functions going away
I am going to remove these functions from MCRegisterInfo:
getSubRegisters()
getSuperRegisters()
getOverlaps()
getAliasSet()
They have been replaced with iterator classes, also defined in MCRegisterInfo.h:
MCSubRegIterator
MCSuperRegIterator
MCRegAliasIterator
The tree has lots of examples of how to use all three.
/jakob
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...function, but a little problem
The updated code is as shown below :
for(TargetRegisterInfo::regclass_iterator i = (*TRI).regclass_begin(), e =
(*TRI).regclass_end(); i != e; i++ ) {
for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege =
(*i)->end(); pregi != prege; pregi++ ) {
for (MCRegAliasIterator AliasReg(*pregi, TRI, true); AliasReg.isValid();
++AliasReg) {
if (!MRI->reg_nodbg_empty(*AliasReg)) {
DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi) << "
is used "<< MRI->isPhysRegUsed(*pregi) << " \n");...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...m
> The updated code is as shown below :
> for(TargetRegisterInfo::regclass_iterator i =
> (*TRI).regclass_begin(), e = (*TRI).regclass_end(); i != e; i++ ) {
> for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege =
> (*i)->end(); pregi != prege; pregi++ ) {
> for (MCRegAliasIterator AliasReg(*pregi, TRI, true);
> AliasReg.isValid(); ++AliasReg) {
> if (!MRI->reg_nodbg_empty(*AliasReg)) {
> DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi) << "
> is used "<< MRI->isPhysRegUsed(*pregi) << "...
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...m
> The updated code is as shown below :
> for(TargetRegisterInfo::regclass_iterator i = (*TRI).regclass_begin(), e =
> (*TRI).regclass_end(); i != e; i++ ) {
> for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege =
> (*i)->end(); pregi != prege; pregi++ ) {
> for (MCRegAliasIterator AliasReg(*pregi, TRI, true); AliasReg.isValid();
> ++AliasReg) {
> if (!MRI->reg_nodbg_empty(*AliasReg)) {
> DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi) << "
> is used "<< MRI->isPhysRegUsed(*pregi) <<...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...ode is as shown below :
>> for(TargetRegisterInfo::regclass_iterator i = (*TRI).regclass_begin(), e
>> = (*TRI).regclass_end(); i != e; i++ ) {
>> for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege =
>> (*i)->end(); pregi != prege; pregi++ ) {
>> for (MCRegAliasIterator AliasReg(*pregi, TRI, true); AliasReg.isValid();
>> ++AliasReg) {
>> if (!MRI->reg_nodbg_empty(*AliasReg)) {
>> DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi) <<
>> " is used "<< MRI->isPhysRegUsed...
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...oblem
> The updated code is as shown below :
> for(TargetRegisterInfo::regclass_iterator i = (*TRI).regclass_begin(), e = (*TRI).regclass_end(); i != e; i++ ) {
> for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege = (*i)->end(); pregi != prege; pregi++ ) {
> for (MCRegAliasIterator AliasReg(*pregi, TRI, true); AliasReg.isValid(); ++AliasReg) {
> if (!MRI->reg_nodbg_empty(*AliasReg)) {
> DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi) << " is used "<< MRI->isPhysRegUsed(*pregi) <<...
2016 May 25
3
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...he updated code is as shown below :
>> for(TargetRegisterInfo::regclass_iterator i = (*TRI).regclass_begin(), e = (*TRI).regclass_end(); i != e; i++ ) {
>> for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege = (*i)->end(); pregi != prege; pregi++ ) {
>> for (MCRegAliasIterator AliasReg(*pregi, TRI, true); AliasReg.isValid(); ++AliasReg) {
>> if (!MRI->reg_nodbg_empty(*AliasReg)) {
>> DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi) << " is used "<< MRI->isPhysRegUsed(*pregi) &...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...w :
>>> for(TargetRegisterInfo::regclass_iterator i = (*TRI).regclass_begin(), e
>>> = (*TRI).regclass_end(); i != e; i++ ) {
>>> for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege =
>>> (*i)->end(); pregi != prege; pregi++ ) {
>>> for (MCRegAliasIterator AliasReg(*pregi, TRI, true); AliasReg.isValid();
>>> ++AliasReg) {
>>> if (!MRI->reg_nodbg_empty(*AliasReg)) {
>>> DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi) <<
>>> " is used "<< MRI-&...
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...;> for(TargetRegisterInfo::regclass_iterator i = (*TRI).regclass_begin(), e = (*TRI).regclass_end(); i != e; i++ ) {
>>>>>>> for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege = (*i)->end(); pregi != prege; pregi++ ) {
>>>>>>> for (MCRegAliasIterator AliasReg(*pregi, TRI, true); AliasReg.isValid(); ++AliasReg) {
>>>>>>> if (!MRI->reg_nodbg_empty(*AliasReg)) {
>>>>>>> DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi) << " is used "...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...for(TargetRegisterInfo::regclass_iterator i = (*TRI).regclass_begin(),
>>>> e = (*TRI).regclass_end(); i != e; i++ ) {
>>>> for(TargetRegisterClass::iterator pregi = (*i)->begin(), prege =
>>>> (*i)->end(); pregi != prege; pregi++ ) {
>>>> for (MCRegAliasIterator AliasReg(*pregi, TRI, true);
>>>> AliasReg.isValid(); ++AliasReg) {
>>>> if (!MRI->reg_nodbg_empty(*AliasReg)) {
>>>> DEBUG( dbgs() << "Physical Register : " << MCRI->getName(*pregi)
>>>> << " is used &quo...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...t; > > > (*i)->end(); pregi != prege; pregi++ ) {
> > > > > > > >
> > > > > > >
> > > > > >
> > > > >
> > > >
> > >
> >
>
> > > > > > > > > for (MCRegAliasIterator AliasReg(*pregi, TRI, true);
> > > > > > > > > AliasReg.isValid(); ++AliasReg) {
> > > > > > > >
> > > > > > >
> > > > > >
> > > > >
> > > >
> > >
> >
>
>...
2016 Jul 13
6
IPRA, interprocedural register allocation, question
Vivek,
I apologize if you took my original email as a request for implementation,
I meant to be asking what is already available, I think the answer to that
is the ‘preserves_most’ and ‘preserves_all’ attributes, but I will also
Use ‘regmask’ if those prove to be too sub-optimal.
I am still interested in figuring out the necessary and sufficient conditions
For LLC to do optimal IPRA
2016 May 24
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
----- Original Message -----
> From: "vivek pandya" <vivekvpandya at gmail.com>
> To: "Quentin Colombet" <qcolombet at apple.com>
> Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev"
> <llvm-dev at lists.llvm.org>, "Matthias Braun" <matze at braunis.de>,
> "Mehdi Amini" <mehdi.amini at
2016 May 24
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
Hello,
I have written following code to check each register if it is used by
machineFunction or not :
MachineRegisterInfo *MRI = &MF.getRegInfo();
TargetRegisterInfo *TRI = (TargetRegisterInfo
*)MF.getSubtarget().getRegisterInfo();
const TargetMachine &TM = MF.getTarget();
const MCRegisterInfo *MCRI = TM.getMCRegisterInfo();
DEBUG(dbgs() << "Function Name : " <<