Hello,
Is it possible to activate the MIPS code emitter during Post-RA scheduler. I
tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to
PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that
says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error:
MipsGenRegisterInfo.inc file not found”. I’m assuming that the
MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in
the PostRAScheduler. Is this the way to activate the mipsCodeEmitter during
PostRA Scheduler or am I missing something here.
Thanks,
Jafar J.
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What are you actually trying to do? The code emitters have nothing to do with the post-RA scheduler. -Jim On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote:> Hello, > > Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in the PostRAScheduler. Is this the way to activate the mipsCodeEmitter during PostRA Scheduler or am I missing something here. > > Thanks, > Jafar J. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130530/4317ee4a/attachment.html>
I need to represent each instruction with its (32-bit) binary encoding, and I
reached to a conclusion that I could get the encoding through the
MipsCodeEmitter. What I’m trying to do exactly is write a scheduler which tries
to minimize the switching activity between the scheduled instructions in each
basic block. One way to do that is by representing each instruction with its
complete binary encoding, which will be available after the register allocation.
Thanks for the reply!
-Jafar J
From: Jim Grosbach
Sent: Thursday, May 30, 2013 7:55 PM
To: Jafar J
Cc: llvmdev at cs.uiuc.edu ; Mailing List
Subject: Re: [LLVMdev] Activating MIPS Code Emitter.
What are you actually trying to do? The code emitters have nothing to do with
the post-RA scheduler.
-Jim
On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote:
Hello,
Is it possible to activate the MIPS code emitter during Post-RA scheduler.
I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to
PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that
says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error:
MipsGenRegisterInfo.inc file not found”. I’m assuming that the
MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in
the PostRAScheduler. Is this the way to activate the mipsCodeEmitter during
PostRA Scheduler or am I missing something here.
Thanks,
Jafar J.
_______________________________________________
LLVM Developers mailing list
LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
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