Displaying 8 results from an estimated 8 matches for "mipscodeemitter".
2013 May 30
2
[LLVMdev] Activating MIPS Code Emitter.
I need to represent each instruction with its (32-bit) binary encoding, and I reached to a conclusion that I could get the encoding through the MipsCodeEmitter. What I’m trying to do exactly is write a scheduler which tries to minimize the switching activity between the scheduled instructions in each basic block. One way to do that is by representing each instruction with its complete binary encoding, which will be available after the register allocation....
2013 May 30
2
[LLVMdev] Activating MIPS Code Emitter.
...MachineInstr::getOpcode() for a register operand returns an enum value that doesn’t represent the actual physical numbering of the register, to know what register this returned value represents I should refer to MipsGenRegisterInfo.td, that’s where I think the mapping happens.
However, inside the MipsCodeEmitter class there is a method that returns the binary encoding of the machine instruction (uint64_t MipsCodeEmitter::getBinaryCodeForInstr(const MachineInstr &MI)). That’s why I thought about activating the code emitter during post-ra would solve my problem if that’s even possible.
Thanks,
- Jaf...
2013 May 30
2
[LLVMdev] Activating MIPS Code Emitter.
Hello,
Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to...
2013 May 30
0
[LLVMdev] Activating MIPS Code Emitter.
...e inferable from those, as that’s where the encoding comes from.
-Jim
On May 30, 2013, at 10:12 AM, Jafar J <pluck90 at hotmail.com> wrote:
> I need to represent each instruction with its (32-bit) binary encoding, and I reached to a conclusion that I could get the encoding through the MipsCodeEmitter. What I’m trying to do exactly is write a scheduler which tries to minimize the switching activity between the scheduled instructions in each basic block. One way to do that is by representing each instruction with its complete binary encoding, which will be available after the register allocation....
2013 May 30
0
[LLVMdev] Activating MIPS Code Emitter.
...tr::getOpcode() for a register operand returns an enum value that doesn’t represent the actual physical numbering of the register, to know what register this returned value represents I should refer to MipsGenRegisterInfo.td, that’s where I think the mapping happens.
>
> However, inside the MipsCodeEmitter class there is a method that returns the binary encoding of the machine instruction (uint64_t MipsCodeEmitter::getBinaryCodeForInstr(const MachineInstr &MI)). That’s why I thought about activating the code emitter during post-ra would solve my problem if that’s even possible.
>
> Thanks...
2013 May 30
2
[LLVMdev] Activating MIPS Code Emitter.
...achineInstr::getOpcode() for a register operand returns an enum value that doesn’t represent the actual physical numbering of the register, to know what register this returned value represents I should refer to MipsGenRegisterInfo.td, that’s where I think the mapping happens.
However, inside the MipsCodeEmitter class there is a method that returns the binary encoding of the machine instruction (uint64_t MipsCodeEmitter::getBinaryCodeForInstr(const MachineInstr &MI)). That’s why I thought about activating the code emitter during post-ra would solve my problem if that’s even possible.
Thanks,
-...
2013 May 30
0
[LLVMdev] Activating MIPS Code Emitter.
...actually trying to do? The code emitters have nothing to do with the post-RA scheduler.
-Jim
On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote:
> Hello,
>
> Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to...
2013 May 30
0
[LLVMdev] Activating MIPS Code Emitter.
...pcode() for a register operand returns an enum value that doesn’t represent the actual physical numbering of the register, to know what register this returned value represents I should refer to MipsGenRegisterInfo.td, that’s where I think the mapping happens.
>>
>> However, inside the MipsCodeEmitter class there is a method that returns the binary encoding of the machine instruction (uint64_t MipsCodeEmitter::getBinaryCodeForInstr(const MachineInstr &MI)). That’s why I thought about activating the code emitter during post-ra would solve my problem if that’s even possible.
>>
>>...