search for: postraschedulerlist

...there will be any problem if we use subclass of ScheduleDAGMILive as post-RA scheduler? The best case is ScheduleDAGMILive just waste time on book-keeping register pressure, but I am not sure if we can still do those book-keeping after RA. Talk about post-RA scheduler, I see there is another class PostRASchedulerList whose DEBUG_TYPE is post-RA-sched. I am wondering if that means we have two post-RA schedulers in LLVM right now? Any particular difference between those two classes, PostMachineScheduler and PostRASchedulerList? Thanks. Regards, chenwj 2017-04-25 10:46 GMT+08:00 Matthias Braun <mbraun at app...

When you compile the attached file using llc -march=x86 -mcpu=atom sched-bug.ll -o - The Post-RA scheduler changes the sequence movl %ecx, (%esp) bsfl (%esp),%eax # this came from inline assembly code to read bsfl (%esp),%eax # this came from inline assembly code movl %ecx, (%esp) This is an incorrect schedule, because it seems the scheduler is not aware that the memory

Also you might need to check use PostRASchedulerList or PostMachineScheduler, PostRASchedulerList is considered deprecated as mentioned in [1]. [1] http://lists.llvm.org/pipermail/llvm-dev/2017-April/112348.html HTH, chenwj 2017-06-10 4:03 GMT+08:00 陳韋任 <chenwj.cs97g at g2.nctu.edu.tw>: > Not saying I am totally understand how thing wor...

Hello, Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in the PostRAScheduler. Is this the...

I am running into a problem when I turn on post-RA scheduler with mode "ANTIDEP_CRITICAL" for mips. I'd appreciate if someone could explain what is going wrong here. This is the basic block before post RA scheduling (at PostRASchedulerList.cpp:322): *(gdb) #3 0x0000000000ed3d26 in runOnMachineFunction (this=0x20aa470, Fn=...) at lib/CodeGen/PostRASchedulerList.cpp:322 322 Scheduler.Observe(MI, CurrentCount); (gdb) p (*MBB).dump()* * BB#218: derived from LLVM BB %if.then1289 Live Ins: %A2 %S0_64 %S1_64 %S2_64 %S4...

Hello. I am new to the schedulers implemented in the back end of LLVM. I am trying to handle data hazards in my simple processor, with instructions that execute in 1 cycle. I have tried the standard post-RA scheduler, implemented in lib/CodeGen/PostRASchedulerList.cpp, (with a ScoreboardHazardRecognizer), but I have some issues with some consecutive instructions that are separated in the final ASM listing and they should not. I also tried the standard pre-RA scheduler, implemented in lib/CodeGen/ScheduleDAGRRList.cpp, (with a ScoreboardHazardRecogni...

...39;t found anything suggesting that this has been > done. If anyone has tried it and would be willing to share code, insights, > or lessons learned, I would be very grateful to hear from them. We don't have a rescheduling allocator, but we do have a post allocation rescheduler. Check out PostRASchedulerList.cpp It would still be interesting to be able to change scheduling during allocation, I think. /jakob

Hi All, During a discussion about instruction scheduling in LLVM [1], I realize that class PostRASchedulerList actually is deprecated. The documentation of instruction scheduling is pretty poor, so I cannot find such information. Removing the obsoleted class might be too aggressive. I am wondering if we can mark the class as deprecated [2] (seems C++14 feature required), or at least making a note on [3]....

...ve nothing to do with the post-RA scheduler. -Jim On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote: > Hello, > > Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in the PostRAScheduler. Is this the...

...e because I did not specify in a file like [Target]Schedule.td the functional units, processor and instruction itineraries. Regarding the Stalls argument to my method [Target]DispatchGroupSBHazardRecognizer::getHazardType() I always get the argument Stalls = 0. This is no surprise since in PostRASchedulerList.cpp we have only one call to it, in method SchedulePostRATDList::ListScheduleTopDown(): ScheduleHazardRecognizer::HazardType HT = HazardRec->getHazardType(CurSUnit, 0/*no stalls*/); Let me state what I have added to my back end to enable scheduling with hazards: - i...

...ters have nothing to do with the post-RA scheduler. -Jim On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote: Hello, Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in the PostRAScheduler. Is this the...

Hi everyone, I'm in the formative stage of my PhD studies. My current focus is on integrated approaches to instruction scheduling and register allocation. A colleague pointed me to Evan Cheng's talk at the August 2008 developer meeting [1], where he very briefly mentioned allowing the register allocator to reschedule instructions as a "crazy idea" for the future. I

Hi All, The description of ScheduleDAGMILive [1] says: ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while updating LiveIntervals and tracking regpressure. Does the live interval and register pressure part of ScheduleDAGMILive mean the subclass of ScheduleDAGMILive is a pre-RA scheduler? I assume the post-RA scheduler no need to take

Hello. I am progressing a bit with difficulty with the post RA scheduler (PostRASchedulerList.cpp with ScoreboardHazardRecognizer) - the problem I have is that it doesn't advance at the next available instruction when the overridden ScoreboardHazardRecognizer::getHazardType() method returns NoopHazard and it gets stuck at the same instruction (store in my runs). Just to make sur...

Hi All, I am trying to construct a small optimization based on ScheduleDAGInstrs that does the following: 1. Find candidate nodes in the DAG, and speculatively modify the node (nodes). 2. After modification, try to compute the scheduled cycles of the region. 3. If the cycle number improves, go back to 1. to find the next candidate node. I am thinking using

...duler. > > -Jim > > On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote: > >> Hello, >> >> Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in the PostRAScheduler. Is this the...

...e nothing to do with the post-RA scheduler. -Jim On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote: Hello, Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in the PostRAScheduler. Is this the...

...ou have any plan for adding a more robust bundler into the current > infrastructure ? > > Ivan Hi Ivan, Your description sounds fine to me. I assume you are totally decoupled from what LLVM currently calls the "postRA" scheduling pass. Hopefully you don't need anything in PostRASchedulerList.cpp. Running your bundler as a preEmit pass is the cleanest approach. But if need be, we can support preRA bundling at the time the MachineScheduler currently runs (if enabled). TargetPassConfig allows you to substitute your own pass in place of MachineScheduler. Passes that run after MachineSched...

...>> -Jim >> >> On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote: >> >>> Hello, >>> Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in the PostRAScheduler. Is this the...

...nothing to do with the post-RA scheduler. -Jim On May 30, 2013, at 6:23 AM, Jafar J <pluck90 at hotmail.com> wrote: Hello, Is it possible to activate the MIPS code emitter during Post-RA scheduler. I tried including both MipsCodeEmitter.cpp and JITCodeEmitter.h to PostRASchedulerList.cpp, but when I rebuild the compiler I get an error that says “/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h fatal error: MipsGenRegisterInfo.inc file not found”. I’m assuming that the MipsGenRegisterInfo.inc is not yet generated when I’m trying to include it in the PostRAScheduler. Is this the...