llvm dev - Sep 2012 - [LLVMdev] How to locate the start if an address mode in an X86 MachineInstr?

My team interested in doing some post-RA optimizations on X86 instructions,
which would require identifying memory reference instructions.

In the X86 back end instructions, memory addresses consist of a set of five
operands. The offset to the start of the five operands depends on the format of
the instruction. For instance, the instructions ADC32rm, ADD32rm, AND32rm,
ANDN32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm, et al. all have a 32 bit memory
address set starting at operand 2.

There does not seem to be any way to obtain the offset to the start of a memory
reference in an X86 MachineInstr.

Tablegen code is able to determine the offset when it generates the
X86GenAsmWriter.inc file at build time. That code obtains the offset indirectly
from the OpInfo table entry for an opcodes, which involves extracting a bit
field from the OpInfo Entry, then using the extracted code in a switch statement
to print out the operands for a particular class of instruction.

Would you know if there is a way, given a MachineInstr, to obtain the address
offset?

Or, if not, could you sketch out a way to do that?

Thanks,

Preston

--
Preston Gurd <preston.gurd at intel.com>
  Intel Waterloo
  SSG/DPD/ECDL/DMP

I think getMemoryOperandNo in X86BaseInfo.h is what you want. That's what
the MC code emitter uses to encode the memory operand.

On Thu, Sep 20, 2012 at 1:41 PM, Gurd, Preston <preston.gurd at
intel.com>wrote:
> My team interested in doing some post-RA optimizations on X86
> instructions, which would require identifying memory reference
instructions.
>
> In the X86 back end instructions, memory addresses consist of a set of
> five operands. The offset to the start of the five operands depends on the
> format of the instruction. For instance, the instructions ADC32rm, ADD32rm,
> AND32rm, ANDN32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm, et al. all have a 32
> bit memory address set starting at operand 2.
>
> There does not seem to be any way to obtain the offset to the start of a
> memory reference in an X86 MachineInstr.
>
> Tablegen code is able to determine the offset when it generates the
> X86GenAsmWriter.inc file at build time. That code obtains the offset
> indirectly from the OpInfo table entry for an opcodes, which involves
> extracting a bit field from the OpInfo Entry, then using the extracted code
> in a switch statement to print out the operands for a particular class of
> instruction.
>
> Would you know if there is a way, given a MachineInstr, to obtain the
> address offset?
>
> Or, if not, could you sketch out a way to do that?
>
> Thanks,
>
> Preston
>
> --
> Preston Gurd <preston.gurd at intel.com>
>   Intel Waterloo
>   SSG/DPD/ECDL/DMP
>
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>


-- 
~Craig
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