Hi Preston,
Did you look at LowerReturn() in X86ISelLowering.cpp ?
Together with X86CallingConv.td, you can find the proper allocation
order and how CopyToReg nodes are emitted to implement the calling
convention for fp values. Hope it can help you.
Regards,
Ivan
Le 09/04/2012 22:15, Gurd, Preston a écrit :> In the course of implementing the instruction scheduler for the Intel Atom
in LLVM, I have run across a problem with the critical anti-dependence breaker,
whereby CriticalAntiDepBreak.cpp code changes some XMM0 references to be XMM9
references. This would be all well and good, were it not for the fact that the
result of the expression needs to be in XMM0 because it is being returned as the
function result in that register.
>
> The end of the original code sequence, prior to being processed by
CriticalAntiDepBreaker.cpp, is
>
> ...
> mulps %xmm4, %xmm0
> addps %xmm2, %xmm0
> .LBB0_3: # %none_on
> leaq 904(%rsp), %rsp
> ret
>
> The critical anti-dependency breaking code changes XMM0 to XMM9, preventing
the proper value from being returned in XMM0.
>
> The program that generates this code is the Intel SPMD Program Compiler
(ispc.github.net), which uses LLVM for back end code generation and
optimization.
>
> It seems obvious that the anti-dependency breaking code is not aware that
the value in XMM0 is implicitly consumed by the RET instruction.
>
> Could one of you tell me where in the LLVM source code I should be looking
to find where function return registers are set up such that the critical
anti-dependency code can notice them?
>
> Thanks,
>
> Preston
>
> --
> Preston Gurd<preston.gurd at intel.com>
> Intel Waterloo
> SSG/DPD/ECDL/DMP
>
>
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