| Tuesday July 31 2018 |
| Time | Replies | Subject |
|---|
| 10:46PM |
2 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 9:32PM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 8:46PM |
0 |
bugpoint --tool-args and --safe-tool-args |
| 8:17PM |
3 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 7:18PM |
0 |
VMkit Installation Error |
| 7:14PM |
0 |
2018 LLVM Dev Mtg - Call for Papers (Deadline EXTENDED to AUG 1) |
| 7:10PM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 7:05PM |
0 |
LLJVM make error |
| 7:02PM |
2 |
LLJVM make error |
| 7:00PM |
1 |
LLJVM make problem |
| 6:21PM |
3 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 6:11PM |
4 |
bugpoint --tool-args and --safe-tool-args |
| 6:03PM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 6:03PM |
0 |
bugpoint --tool-args and --safe-tool-args |
| 5:10PM |
2 |
bugpoint --tool-args and --safe-tool-args |
| 4:36PM |
2 |
Syntax for FileCheck numeric variables and expressions |
| 4:26PM |
0 |
machine scheduler: pre-RA bidirectional scheduling |
| 3:52PM |
0 |
Syntax for FileCheck numeric variables and expressions |
| 3:40PM |
2 |
GlobalISel design update and goals |
| 3:36PM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 3:18PM |
1 |
GlobalISel design update and goals |
| 2:53PM |
0 |
GlobalISel design update and goals |
| 1:19PM |
2 |
machine scheduler: pre-RA bidirectional scheduling |
| 12:48PM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 12:40PM |
1 |
Bug in loop stores optimization |
| 11:41AM |
1 |
[cfe-dev] r338291 - Remove trailing space |
| 11:13AM |
4 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 10:51AM |
2 |
Syntax for FileCheck numeric variables and expressions |
| 10:22AM |
0 |
profiling JIT compiled code with perf |
| 8:29AM |
1 |
how to build NE10 Project using llvm compiler |
| 5:00AM |
1 |
isspace of Visual Studio C++ assertion failed |
| 4:49AM |
0 |
lld/mach-o x86_64 asserts |
| 2:53AM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| |
| Monday July 30 2018 |
| Time | Replies | Subject |
|---|
| 11:18PM |
0 |
[cfe-dev] r338291 - Remove trailing space |
| 11:15PM |
2 |
2018 LLVM Dev Mtg - Call for Papers (Deadline TONIGHT July 30) |
| 11:13PM |
0 |
LLVM Dev Mtg Travel Grants Available for Students (Deadline Aug 5) |
| 11:11PM |
0 |
August LLVM bay-area social is this Thursday! |
| 11:04PM |
0 |
GlobalISel design update and goals |
| 11:01PM |
3 |
r338291 - Remove trailing space |
| 10:31PM |
0 |
Metadata RAUW |
| 9:22PM |
2 |
Metadata RAUW |
| 9:06PM |
3 |
lld/mach-o x86_64 asserts |
| 9:02PM |
0 |
lld/mach-o x86_64 asserts |
| 8:19PM |
2 |
[cfe-dev] Filesystem has Landed in Libc++ |
| 8:12PM |
3 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 7:57PM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 7:35PM |
0 |
LLVM Weekly - #239, July 30th 2018 |
| 7:10PM |
7 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 5:37PM |
1 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 4:18PM |
0 |
ThinLTO Bug ? |
| 4:02PM |
1 |
Why is Partial Unrolling off by default? |
| 3:08PM |
0 |
how to build NE10 Project using llvm compiler |
| 2:58PM |
1 |
InstrEmitter::CreateVirtualRegisters handling of CopyToReg |
| 2:06PM |
2 |
ThinLTO Bug ? |
| 2:01PM |
9 |
GlobalISel design update and goals |
| 1:52PM |
0 |
ThinLTO Bug ? |
| 11:15AM |
2 |
how to build NE10 Project using llvm compiler |
| 11:10AM |
1 |
error: ordered comparison between pointer and zero ('address' (aka 'unsigned char *') and 'int') |
| 10:34AM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 10:05AM |
0 |
how to build NE10 project using llvm |
| 9:23AM |
5 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 5:59AM |
1 |
EuroLLVM 2018 talk materials |
| 1:38AM |
0 |
error: ordered comparison between pointer and zero ('address' (aka 'unsigned char *') and 'int') |
| |
| Sunday July 29 2018 |
| Time | Replies | Subject |
|---|
| 4:54PM |
0 |
Vectorizing remainder loop |
| 3:08PM |
1 |
Building clang and llvm |
| 9:52AM |
2 |
Vectorizing remainder loop |
| 8:46AM |
0 |
[cfe-dev] Proposal: pull benchmark library to the LLVM main repository |
| 5:31AM |
1 |
DW_TAG_subprogram in LLVM pass |
| |
| Saturday July 28 2018 |
| Time | Replies | Subject |
|---|
| 11:33PM |
2 |
[cfe-dev] Proposal: pull benchmark library to the LLVM main repository |
| 11:04PM |
0 |
Proposal: pull benchmark library to the LLVM main repository |
| 11:12AM |
1 |
KNL Vectorization with larger vector width |
| 1:32AM |
2 |
ThinLTO Bug ? |
| |
| Friday July 27 2018 |
| Time | Replies | Subject |
|---|
| 9:02PM |
0 |
[cfe-dev] Filesystem has Landed in Libc++ |
| 6:19PM |
0 |
2018 LLVM Dev Mtg - Call for Papers (Deadline July 30) |
| 4:50PM |
0 |
[llvm] r338109 - Revert "[LV][DebugInfo] Set DL to the middle block Icmp instruction" |
| 4:16PM |
2 |
Proposal: pull benchmark library to the LLVM main repository |
| 1:47PM |
0 |
LNT server behind a proxy and mounted in a /subdir |
| 12:40PM |
1 |
Wrong link for 6.0.1 FreeBSD binaries on download page |
| 10:53AM |
0 |
Syntax for FileCheck numeric variables and expressions |
| 9:18AM |
0 |
LLVM's Inliner broke the code |
| 8:20AM |
0 |
RFC: What is the real behavior for the minnum/maxnum intrinsics? |
| 4:20AM |
5 |
Filesystem has Landed in Libc++ |
| 2:54AM |
1 |
How to pass StringRef or std::string type to external function |
| |
| Thursday July 26 2018 |
| Time | Replies | Subject |
|---|
| 8:07PM |
0 |
overflow at realpath() |
| 6:25PM |
0 |
Level of support for ARM LLD |
| 5:38PM |
0 |
A question to the DWARF experts on symbol indirection |
| 5:29PM |
3 |
Level of support for ARM LLD |
| 5:05PM |
0 |
Level of support for ARM LLD |
| 4:18PM |
0 |
RFC: Shall we re-enable GVNHoist by default ? |
| 3:51PM |
3 |
RFC: What is the real behavior for the minnum/maxnum intrinsics? |
| 3:08PM |
2 |
Level of support for ARM LLD |
| 3:06PM |
1 |
[DWARF] De-segregating type units and compile units |
| 2:52PM |
0 |
Level of support for ARM LLD |
| 9:28AM |
3 |
Syntax for FileCheck numeric variables and expressions |
| |
| Wednesday July 25 2018 |
| Time | Replies | Subject |
|---|
| 10:59PM |
0 |
Question about target instruction optimization |
| 10:21PM |
2 |
Question about target instruction optimization |
| 9:33PM |
0 |
Question about target instruction optimization |
| 7:35PM |
0 |
[DWARF] De-segregating type units and compile units |
| 5:42PM |
2 |
Question about target instruction optimization |
| 5:40PM |
0 |
[7.0.0 Release] One week to the branch |
| 2:14PM |
0 |
Software pipeline using LLVM |
| 1:41PM |
2 |
A question to the DWARF experts on symbol indirection |
| 12:13PM |
0 |
Compiling newlib using clang. |
| 11:08AM |
0 |
are the LLD libraries thread safe? |
| 10:03AM |
2 |
[7.0.0 Release] One week to the branch |
| 9:11AM |
2 |
are the LLD libraries thread safe? |
| 7:07AM |
0 |
A question to the DWARF experts on symbol indirection |
| 6:34AM |
0 |
LLD COFF library: crashes when lld::coff::link is called twice |
| 6:18AM |
2 |
LLD COFF library: crashes when lld::coff::link is called twice |
| 1:37AM |
0 |
are the LLD libraries thread safe? |
| 1:10AM |
2 |
are the LLD libraries thread safe? |
| 12:21AM |
3 |
A question to the DWARF experts on symbol indirection |
| |
| Tuesday July 24 2018 |
| Time | Replies | Subject |
|---|
| 11:12PM |
1 |
Purpose of glue nodes in call lowering |
| 11:04PM |
1 |
Two ideas for general extensions of the loop unswitch cost model |
| 10:53PM |
0 |
Defaults for "-target armv7-none-linux" |
| 9:48PM |
0 |
Finding scratch register after function call |
| 9:45PM |
0 |
LLVM buildmaster will be restarted tonight |
| 6:00PM |
1 |
StructType --> DICompositeType? |
| 5:54PM |
0 |
StructType --> DICompositeType? |
| 5:54PM |
0 |
KNL Vectorization with larger vector width |
| 5:40PM |
2 |
[DWARF] De-segregating type units and compile units |
| 5:34PM |
2 |
KNL Vectorization with larger vector width |
| 5:07PM |
0 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 5:04PM |
4 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 5:01PM |
1 |
[LNT] Tests for web UI/javascript? |
| 4:47PM |
0 |
Idiom Recognition using LLVM |
| 3:50PM |
2 |
StructType --> DICompositeType? |
| 1:32PM |
0 |
LLVM FunctionType cannot be returned as VectorType? |
| 1:27PM |
1 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 1:24PM |
2 |
Software pipeline using LLVM |
| 1:07PM |
0 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 12:58PM |
0 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 12:45PM |
2 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 11:44AM |
0 |
KNL Vectorization with larger vector width |
| 7:58AM |
0 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 7:36AM |
1 |
Possibility of implementing a low-level naive lock purely with LLVM atomics? |
| 7:02AM |
1 |
Registering passes on a module |
| 3:41AM |
0 |
Possibility of implementing a low-level naive lock purely with LLVM atomics? |
| 3:18AM |
2 |
Possibility of implementing a low-level naive lock purely with LLVM atomics? |
| 1:25AM |
0 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 12:58AM |
3 |
profiling JIT compiled code with perf |
| 12:05AM |
2 |
KNL Vectorization with larger vector width |
| |
| Monday July 23 2018 |
| Time | Replies | Subject |
|---|
| 11:37PM |
4 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 11:34PM |
2 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 11:28PM |
1 |
ESP32 Tensilica Xtensa LX6 backend. Interest? Prior attempts? |
| 11:23PM |
0 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 10:39PM |
2 |
LLVM FunctionType cannot be returned as VectorType? |
| 10:22PM |
3 |
[LoopVectorizer] Improving the performance of dot product reduction loop |
| 8:52PM |
0 |
KNL Vectorization with larger vector width |
| 8:04PM |
0 |
LLVM Weekly - #238, July 23rd 2018 |
| 7:40PM |
0 |
RFC: What is the real behavior for the minnum/maxnum intrinsics? |
| 7:40PM |
2 |
KNL Vectorization with larger vector width |
| 6:33PM |
0 |
KNL Vectorization with larger vector width |
| 5:49PM |
2 |
KNL Vectorization with larger vector width |
| 4:45PM |
2 |
error: ordered comparison between pointer and zero ('address' (aka 'unsigned char *') and 'int') |
| 3:49PM |
0 |
error: ordered comparison between pointer and zero ('address' (aka 'unsigned char *') and 'int') |
| 3:47PM |
0 |
enabling virtual environment for multiple clang versions |
| 1:49PM |
1 |
Marking lit::shtest-format.py unsupported on PS4?, Re: buildbot failure in LLVM on llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast |
| 1:48PM |
0 |
LLVM FunctionType cannot be returned as VectorType? |
| 1:20PM |
0 |
Requesting for help. |
| 12:04PM |
2 |
Requesting for help. |
| 10:56AM |
2 |
RFC: What is the real behavior for the minnum/maxnum intrinsics? |
| 10:10AM |
0 |
Relinking (syscall-free) ELF executable into Mach-O and PE executables |
| 10:01AM |
2 |
LLVM FunctionType cannot be returned as VectorType? |
| 8:34AM |
0 |
Registering passes on a module |
| 4:31AM |
2 |
Relinking (syscall-free) ELF executable into Mach-O and PE executables |
| |
| Sunday July 22 2018 |
| Time | Replies | Subject |
|---|
| 7:23PM |
0 |
Syntax for FileCheck numeric variables and expressions |
| 3:51PM |
0 |
LLVM FunctionType cannot be returned as VectorType? |
| 3:17PM |
1 |
O2 Aggressive Optimization by GCC |
| 3:08PM |
1 |
Custom backend, unsure about error |
| 7:58AM |
2 |
Finding scratch register after function call |
| 7:42AM |
0 |
Finding scratch register after function call |
| 7:26AM |
2 |
Finding scratch register after function call |
| 2:46AM |
0 |
Finding scratch register after function call |
| |
| Saturday July 21 2018 |
| Time | Replies | Subject |
|---|
| 7:14PM |
2 |
Finding scratch register after function call |
| 7:12PM |
2 |
Registering passes on a module |
| |
| Friday July 20 2018 |
| Time | Replies | Subject |
|---|
| 8:59PM |
0 |
Relinking (syscall-free) ELF executable into Mach-O and PE executables |
| 5:29PM |
0 |
Relinking (syscall-free) ELF executable into Mach-O and PE executables |
| 5:20PM |
0 |
customized pass for LLVM test-suite |
| 2:20PM |
0 |
Marking lit::shtest-format.py unsupported on PS4?, Re: buildbot failure in LLVM on llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast |
| 12:48PM |
0 |
O2 Aggressive Optimization by GCC |
| 12:45PM |
0 |
O2 Aggressive Optimization by Clang |
| 12:21PM |
3 |
O2 Aggressive Optimization by Clang |
| 12:20PM |
2 |
O2 Aggressive Optimization by GCC |
| 9:12AM |
2 |
Marking lit::shtest-format.py unsupported on PS4?, Re: buildbot failure in LLVM on llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast |
| 7:46AM |
4 |
Relinking (syscall-free) ELF executable into Mach-O and PE executables |
| 4:01AM |
0 |
[cfe-dev] LLVM Social in China - Hangzhou: July 28, 2018 |
| 3:37AM |
2 |
[cfe-dev] LLVM Social in China - Hangzhou: July 28, 2018 |
| 2:52AM |
0 |
Marking lit::shtest-format.py unsupported on PS4?, Re: buildbot failure in LLVM on llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast |
| 2:40AM |
0 |
[cfe-dev] LLVM Social in China - Hangzhou: July 28, 2018 |
| 2:29AM |
2 |
LLVM Social in China - Hangzhou: July 28, 2018 |
| 2:16AM |
2 |
Marking lit::shtest-format.py unsupported on PS4?, Re: buildbot failure in LLVM on llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast |
| 2:07AM |
3 |
error: ordered comparison between pointer and zero ('address' (aka 'unsigned char *') and 'int') |
| 12:02AM |
2 |
LLVM FunctionType cannot be returned as VectorType? |
| |
| Thursday July 19 2018 |
| Time | Replies | Subject |
|---|
| 9:12PM |
0 |
Porting improvements from llvm-bolt to LLVM |
| 7:52PM |
0 |
How to get the symbol of MachineInst ? |
| 6:09PM |
0 |
Upstreaming Exception Handling support for Windows on ARM64 |
| 5:57PM |
0 |
Question about DebugCounter info print out |
| 5:09PM |
2 |
[LLVM.ORG] Scheduled Restart of llvm.org services Saturday 2018-07-21 @ 20:00PDT |
| 3:55PM |
2 |
Possible to query type information from a malloc in optimized codes |
| 3:19PM |
0 |
Pipeline using LLVM |
| 12:57PM |
0 |
profiling JIT compiled code with perf |
| 11:37AM |
0 |
error: ordered comparison between pointer and zero ('address' (aka 'unsigned char *') and 'int') |
| 10:56AM |
2 |
error: ordered comparison between pointer and zero ('address' (aka 'unsigned char *') and 'int') |
| 9:46AM |
1 |
Requesting for help. |
| 6:34AM |
0 |
Optimization options at different levels |
| 4:32AM |
2 |
profiling JIT compiled code with perf |
| 2:34AM |
1 |
How to get the symbol of MachineInst ? |
| |
| Wednesday July 18 2018 |
| Time | Replies | Subject |
|---|
| 9:30PM |
0 |
Difference between o3 and ofast |
| 9:12PM |
0 |
profiling JIT compiled code with perf |
| 12:50PM |
2 |
Syntax for FileCheck numeric variables and expressions |
| 10:54AM |
1 |
Lowering SEXT (and ZEXT) efficiently on Z80 |
| 8:45AM |
1 |
Why Clang is unpacking my StructType Function arguments |
| 8:27AM |
0 |
Why Clang is unpacking my StructType Function arguments |
| 8:06AM |
2 |
Why Clang is unpacking my StructType Function arguments |
| 6:22AM |
0 |
Lowering SEXT (and ZEXT) efficiently on Z80 |
| 4:28AM |
2 |
Lowering SEXT (and ZEXT) efficiently on Z80 |
| 1:38AM |
0 |
Collect all possible return address and write in a new section |
| 12:27AM |
0 |
Proposal of changing the padding cap for each vtable in the forward-edge CFI |
| |
| Tuesday July 17 2018 |
| Time | Replies | Subject |
|---|
| 8:59PM |
0 |
Syntax for FileCheck numeric variables and expressions |
| 8:52PM |
2 |
[HOTCRP] Scheduled Restart of hotcrp.llvm.org tomorrow, 2018-07-17 @ 12:00PDT |
| 7:04PM |
3 |
Upstreaming Exception Handling support for Windows on ARM64 |
| 5:52PM |
1 |
[cfe-dev] [RFC] Suppress C++ static destructor registration |
| 11:39AM |
1 |
Zero-sized globals in LLVM IR |
| 11:16AM |
0 |
Zero-sized globals in LLVM IR |
| 10:58AM |
4 |
Zero-sized globals in LLVM IR |
| 10:58AM |
2 |
lld/mach-o x86_64 asserts |
| 10:06AM |
0 |
lld/mach-o x86_64 asserts |
| 9:42AM |
1 |
Strange function time |
| 9:02AM |
2 |
Syntax for FileCheck numeric variables and expressions |
| 5:00AM |
0 |
RFC: XRay FDR/Profiling Mode Moving to Post-Commit Review |
| 4:47AM |
2 |
RFC: XRay FDR/Profiling Mode Moving to Post-Commit Review |
| 4:08AM |
0 |
How to use single interface for multiple types |
| 4:00AM |
1 |
how to convert value to size_t |
| 1:25AM |
0 |
Finding Privatizable Variables/Arrays |
| 12:57AM |
0 |
customized pass for LLVM test-suite |
| |
| Monday July 16 2018 |
| Time | Replies | Subject |
|---|
| 7:36PM |
0 |
LLVM Weekly - #237, July 16th 2018 |
| 6:32PM |
1 |
difference between polly stripmine, vector and unroll flags |
| 5:44PM |
0 |
Target triple normalzation through the LLVM C API |
| 5:39PM |
0 |
Syntax for FileCheck numeric variables and expressions |
| 5:17PM |
0 |
[MachineScheduler] Skip empty scheduling regions |
| 5:17PM |
0 |
sizeof(DIFlags) |
| 3:30PM |
0 |
llvm pass is very slow |
| 12:57PM |
3 |
sizeof(DIFlags) |
| 10:23AM |
2 |
Syntax for FileCheck numeric variables and expressions |
| 10:10AM |
2 |
Target triple normalzation through the LLVM C API |
| 9:56AM |
0 |
debugging Orc JIT'ed code |
| 6:43AM |
1 |
Uses, Defs, ins, outs, params in tablegen instruction definition |
| 1:53AM |
2 |
Collect all possible return address and write in a new section |
| |
| Sunday July 15 2018 |
| Time | Replies | Subject |
|---|
| 11:00AM |
2 |
profiling JIT compiled code with perf |
| 8:07AM |
0 |
Bitcode generated with LLVM 7.0 used in LLVM 3.4 |
| 1:25AM |
2 |
Bitcode generated with LLVM 7.0 used in LLVM 3.4 |
| 1:21AM |
2 |
llvm pass is very slow |
| |
| Saturday July 14 2018 |
| Time | Replies | Subject |
|---|
| 9:06PM |
3 |
debugging Orc JIT'ed code |
| 8:34PM |
0 |
LLVM 5.0 & 6.0 Ubuntu packages are broken/unstable |
| 11:47AM |
0 |
Lowering a reasonably complex struct seems to create over complex and invalid assembly fixups on some targets |
| 10:47AM |
2 |
Lowering a reasonably complex struct seems to create over complex and invalid assembly fixups on some targets |
| |
| Friday July 13 2018 |
| Time | Replies | Subject |
|---|
| 9:17PM |
1 |
[RFC] Turn the MachineOutliner on by default in AArch64 under -Oz |
| 8:24PM |
1 |
MDNode equivalent in backend? |
| 7:00PM |
0 |
debugging Orc JIT'ed code |
| 6:21PM |
0 |
Giving up using implicit control flow in guards |
| 5:21PM |
1 |
2018 Board of Directions Election (Applications due July 30) |
| 4:39PM |
2 |
debugging Orc JIT'ed code |
| 4:30PM |
1 |
Repeating remarks in diagnostics of loop vectorization |
| 4:16PM |
0 |
Super-verbose failure mode for FileCheck |
| 2:51PM |
0 |
Syntax for FileCheck numeric variables and expressions |
| 2:39PM |
0 |
debug_rnglists status |
| 8:19AM |
2 |
Giving up using implicit control flow in guards |
| 2:48AM |
0 |
Compiling Linux kernel with LLVM for mips64el |
| 1:31AM |
3 |
Super-verbose failure mode for FileCheck |
| |
| Thursday July 12 2018 |
| Time | Replies | Subject |
|---|
| 7:32PM |
1 |
KNL Vectorization with larger vector width |
| 6:50PM |
2 |
Should Verifier be an analysis? |
| 6:13PM |
1 |
Should Verifier be an analysis? |
| 6:05PM |
0 |
Should Verifier be an analysis? |
| 5:43PM |
0 |
Should Verifier be an analysis? |
| 5:32PM |
2 |
debug_rnglists status |
| 5:07PM |
0 |
debug_rnglists status |
| 4:00PM |
0 |
when did llvm/clang CFI generate the jump table for indirect call? |
| 3:44PM |
2 |
Should Verifier be an analysis? |
| 3:25PM |
0 |
Should Verifier be an analysis? |
| 3:19PM |
5 |
Should Verifier be an analysis? |
| 2:34PM |
2 |
Syntax for FileCheck numeric variables and expressions |
| 12:55PM |
1 |
custom LLVM Pass with options fails to load |
| 9:23AM |
2 |
debug_rnglists status |
| 8:02AM |
0 |
custom LLVM Pass with options fails to load |
| 12:38AM |
0 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 12:20AM |
2 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 12:20AM |
2 |
custom LLVM Pass with options fails to load |
| 12:02AM |
1 |
LLVM-HPC2018 Workshop at SC18 - Call for papers |
| |
| Wednesday July 11 2018 |
| Time | Replies | Subject |
|---|
| 11:43PM |
0 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 11:12PM |
3 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 8:36PM |
0 |
static stack depth analysis tool |
| 8:14PM |
0 |
Failing compiler-rt LTO test |
| 8:11PM |
0 |
What is the right lowering for misaligned memory access? |
| 7:15PM |
2 |
Failing compiler-rt LTO test |
| 6:24PM |
0 |
RFC: Speculative Load Hardening (a Spectre variant #1 mitigation) |
| 6:20PM |
0 |
Failing compiler-rt LTO test |
| 4:52PM |
4 |
What is the right lowering for misaligned memory access? |
| 4:32PM |
3 |
static stack depth analysis tool |
| 2:45PM |
2 |
lld/mach-o x86_64 asserts |
| 1:35PM |
0 |
Giving up using implicit control flow in guards |
| 1:29PM |
0 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 11:02AM |
3 |
RFC: Speculative Load Hardening (a Spectre variant #1 mitigation) |
| 10:38AM |
0 |
RFC: should we spell lambdas like functions? |
| 9:07AM |
0 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 5:12AM |
0 |
lld/mach-o x86_64 asserts |
| 2:37AM |
1 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 2:12AM |
0 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 2:01AM |
8 |
[RFC] A nofree (and nosynch) function attribute: Mixing dereferenceable and delete |
| 1:20AM |
0 |
Is it really valid to discard externally instantiated functions from a TU when marked inline? |
| 1:11AM |
2 |
lld/mach-o x86_64 asserts |
| |
| Tuesday July 10 2018 |
| Time | Replies | Subject |
|---|
| 11:25PM |
0 |
RFC: should we spell lambdas like functions? |
| 11:21PM |
2 |
RFC: should we spell lambdas like functions? |
| 11:20PM |
2 |
Is it really valid to discard externally instantiated functions from a TU when marked inline? |
| 10:56PM |
0 |
A bug-report too difficult to make |
| 10:49PM |
0 |
Programmatically Toggle Specific LLVM Optimizations |
| 10:38PM |
2 |
Programmatically Toggle Specific LLVM Optimizations |
| 9:06PM |
0 |
Finding Size of X86 instruction in MachineFunctionPass |
| 8:26PM |
0 |
[RISCV][PIC] Lowering pseudo instructions in MCCodeEmitter vs AsmPrinter |
| 7:33PM |
0 |
lld/mach-o x86_64 asserts |
| 6:08PM |
0 |
[RISCV][PIC] Lowering pseudo instructions in MCCodeEmitter vs AsmPrinter |
| 5:48PM |
2 |
Finding Size of X86 instruction in MachineFunctionPass |
| 5:20PM |
0 |
Finding Size of X86 instruction in MachineFunctionPass |
| 5:00PM |
0 |
[RISCV][PIC] Lowering pseudo instructions in MCCodeEmitter vs AsmPrinter |
| 4:51PM |
6 |
[RISCV][PIC] Lowering pseudo instructions in MCCodeEmitter vs AsmPrinter |
| 4:04PM |
0 |
custom LLVM Pass with options fails to load |
| 2:29PM |
3 |
Finding Size of X86 instruction in MachineFunctionPass |
| 2:23PM |
2 |
A bug-report too difficult to make |
| 1:26PM |
2 |
custom LLVM Pass with options fails to load |
| 12:40PM |
0 |
clang-format as an Arcanist linter; need reviewers |
| 8:57AM |
1 |
[isel] OPC_EmitMergeInputChains failure on intrinsic lowering. |
| 7:40AM |
2 |
lld/mach-o x86_64 asserts |
| 7:33AM |
0 |
Stuck with instruction in tablegen |
| 7:26AM |
2 |
Giving up using implicit control flow in guards |
| 7:17AM |
2 |
Stuck with instruction in tablegen |
| 6:21AM |
0 |
Stuck with instruction in tablegen |
| 4:32AM |
2 |
Stuck with instruction in tablegen |
| 12:27AM |
0 |
July LLVM bay-area social is this Thursday! |
| |
| Monday July 9 2018 |
| Time | Replies | Subject |
|---|
| 8:08PM |
3 |
Failing compiler-rt LTO test |
| 7:20PM |
0 |
LLVM Weekly - #236, July 9th 2018 |
| 6:53PM |
1 |
Separate test harness for LLVM test-suite |
| 6:46PM |
1 |
Separate test harness for LLVM test-suite |
| 5:55PM |
0 |
Separate test harness for LLVM test-suite |
| 5:48PM |
0 |
Separate test harness for LLVM test-suite |
| 5:46PM |
0 |
Job openings for LLVM engineers at Apple |
| 5:32PM |
2 |
Separate test harness for LLVM test-suite |
| 4:11PM |
0 |
Separate test harness for LLVM test-suite |
| 3:01PM |
1 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 12:03PM |
0 |
RFC: Speculative Load Hardening (a Spectre variant #1 mitigation) |
| 7:26AM |
4 |
Separate test harness for LLVM test-suite |
| |
| Sunday July 8 2018 |
| Time | Replies | Subject |
|---|
| 6:55PM |
1 |
What is TBAA's advantage over BasicAA? |
| 3:23PM |
1 |
Rotates, once again |
| 1:23PM |
0 |
Rotates, once again |
| |
| Saturday July 7 2018 |
| Time | Replies | Subject |
|---|
| 4:23PM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 3:15PM |
0 |
RFC: should we spell lambdas like functions? |
| 1:46PM |
1 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 5:39AM |
1 |
Size optimization with gold linker |
| 2:47AM |
0 |
LoopVectorize fails to vectorize more complex loops |
| 12:52AM |
2 |
LoopVectorize fails to vectorize more complex loops |
| |
| Friday July 6 2018 |
| Time | Replies | Subject |
|---|
| 4:31PM |
0 |
Using -runs consistently in libFuzzer tests |
| 3:56PM |
1 |
Using -runs consistently in libFuzzer tests |
| 11:50AM |
1 |
Verify that we only get loop metadata on latches |
| 11:07AM |
0 |
Verify that we only get loop metadata on latches |
| 9:38AM |
1 |
Running lit tests on grid |
| 8:57AM |
2 |
Verify that we only get loop metadata on latches |
| 1:12AM |
0 |
RFC: should we spell lambdas like functions? |
| 12:30AM |
2 |
RFC: should we spell lambdas like functions? |
| |
| Thursday July 5 2018 |
| Time | Replies | Subject |
|---|
| 10:55PM |
2 |
Using -runs consistently in libFuzzer tests |
| 8:09PM |
0 |
RFC: should we spell lambdas like functions? |
| 7:59PM |
0 |
Why SI.isSigned() is not equals to E->getType()->isSignedIntegerOrEnumerationType()? |
| 7:57PM |
7 |
RFC: should we spell lambdas like functions? |
| 6:05PM |
1 |
Accessing global variable values from IRBuilder |
| 5:53PM |
0 |
Storing temporary data in Function / MachineFunction |
| 2:25PM |
2 |
Where is the code that is called when clang calls the job which generates IR? |
| 2:23PM |
1 |
Get the function boundaries |
| 10:51AM |
0 |
`llvm.experimental.stackmap` is erroneously marked `Throws`? |
| 10:04AM |
0 |
new bug filed for RegAllocGreedy -exhaustive-register-search |
| 9:03AM |
2 |
Archive file test problem |
| 12:29AM |
1 |
[LoopUtils] Breaking LoopUtils into an analysis pass |
| |
| Wednesday July 4 2018 |
| Time | Replies | Subject |
|---|
| 4:58PM |
0 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 12:50PM |
2 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 10:27AM |
0 |
recent changes to unique_function break unit tests with "older" compilers |
| 9:58AM |
2 |
Why SI.isSigned() is not equals to E->getType()->isSignedIntegerOrEnumerationType()? |
| 7:47AM |
1 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 6:42AM |
0 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 1:25AM |
1 |
Question about canonicalizing cmp+select |
| |
| Tuesday July 3 2018 |
| Time | Replies | Subject |
|---|
| 10:55PM |
0 |
[WebAssembly] lld dynamic loader |
| 10:46PM |
0 |
Question about canonicalizing cmp+select |
| 10:44PM |
2 |
Question about canonicalizing cmp+select |
| 10:39PM |
0 |
Question about canonicalizing cmp+select |
| 6:48PM |
0 |
Using FileCheck in unit tests |
| 6:44PM |
2 |
Using FileCheck in unit tests |
| 6:13PM |
0 |
Question about canonicalizing cmp+select |
| 6:06PM |
4 |
Question about canonicalizing cmp+select |
| 5:24PM |
0 |
Bug-closing protocol |
| 5:23PM |
1 |
building LLVM-trunk with LLVM-trunk breaks with undefined symbol _ZTVN4llvm2cl3optISsLb0ENS0_6parserISsEEEE |
| 11:56AM |
2 |
Bug-closing protocol |
| 11:42AM |
0 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 6:38AM |
1 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 5:29AM |
1 |
[cfe-dev] Why Clang is yielding different LLVM IR return type forthe same function |
| 4:23AM |
0 |
[cfe-dev] Why Clang is yielding different LLVM IR return type for the same function |
| 3:48AM |
2 |
Why Clang is yielding different LLVM IR return type for the same function |
| 12:32AM |
0 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 12:13AM |
0 |
Buildbot numbers for the week of 6/24/2018 - 6/30/2018 |
| 12:13AM |
0 |
Buildbot numbers for the week of 6/17/2018 - 6/23/2018 |
| 12:02AM |
1 |
Improve LLVM IR dumps |
| |
| Monday July 2 2018 |
| Time | Replies | Subject |
|---|
| 10:58PM |
8 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 10:36PM |
2 |
Rotates, once again |
| 10:16PM |
0 |
Rotates, once again |
| 10:13PM |
0 |
Using FileCheck in unit tests |
| 9:35PM |
3 |
Using FileCheck in unit tests |
| 9:33PM |
0 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 8:37PM |
2 |
Rotates, once again |
| 7:41PM |
1 |
Rotates, once again |
| 7:23PM |
0 |
LLVM Weekly - #235, July 2nd 2018 |
| 6:50PM |
0 |
July LLVM bay-area social is *not* this Thursday! |
| 6:48PM |
2 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 5:52PM |
0 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 4:58PM |
1 |
Linking Kaleidoscope-8 wants all targets |
| 4:53PM |
0 |
Linking Kaleidoscope-8 wants all targets |
| 4:27PM |
0 |
Rotates, once again |
| 3:08PM |
3 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 11:25AM |
1 |
Cross Compilation Problem |
| 9:53AM |
0 |
[RFC][SVE] Supporting SIMD instruction sets with variable vector lengths |
| 9:04AM |
0 |
Cross Compilation Problem |
| 6:38AM |
2 |
[RFC][VECLIB] how should we legalize VECLIB calls? |
| 12:51AM |
0 |
I've seen OrcJit is under overhaul, and also the MCJIT, so what's the plan? |
| |
| Sunday July 1 2018 |
| Time | Replies | Subject |
|---|
| 5:52PM |
1 |
Using BuildMI to insert Intel MPX instruction BNDCU failed |
| 5:41PM |
0 |
Using BuildMI to insert Intel MPX instruction BNDCU failed |
| 5:19PM |
2 |
Cross Compilation Problem |
| 3:07PM |
0 |
Determine reason for failure at -O1 |
| 2:22PM |
2 |
Linking Kaleidoscope-8 wants all targets |
| 10:01AM |
2 |
I've seen OrcJit is under overhaul, and also the MCJIT, so what's the plan? |