Alexey Zhikhartsev via llvm-dev
2018-Jul-30 14:58 UTC
[llvm-dev] InstrEmitter::CreateVirtualRegisters handling of CopyToReg
Hi Jonas, This patch helps with a problem on our out-of-tree backend; we would love to get some feedback about this patch from the community and potentially upstream it. Would you mind submitting this patch to phabricator? I understand that you might be busy; if so, I could submit it myself (and give credit to you, of course). Thanks! Best, Alex -----Original Message----- From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Jonas Paulsson via llvm-dev Sent: Wednesday, May 30, 2018 9:03 AM To: llvm-dev <llvm-dev at lists.llvm.org> Cc: Ulrich Weigand <ulrich.weigand at de.ibm.com> Subject: [llvm-dev] InstrEmitter::CreateVirtualRegisters handling of CopyToReg Hi, I wonder if anyone has any comment on a patch like: diff --git a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp index 65ee3816f84..4780f6f0e59 100644 --- a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -243,18 +243,21 @@ void InstrEmitter::CreateVirtualRegisters(SDNode *Node, if (!VRBase && !IsClone && !IsCloned) for (SDNode *User : Node->uses()) { if (User->getOpcode() == ISD::CopyToReg && User->getOperand(2).getNode() == Node && User->getOperand(2).getResNo() == i) { unsigned Reg cast<RegisterSDNode>(User->getOperand(1))->getReg(); if (TargetRegisterInfo::isVirtualRegister(Reg)) { - const TargetRegisterClass *RegRC = MRI->getRegClass(Reg); - if (RegRC == RC) { + // Allow constraining the virtual register's class within reason, + // just like what AddRegisterOperand will allow. + const TargetRegisterClass *ConstrainedRC + = MRI->constrainRegClass(Reg, RC, MinRCSize); + if (ConstrainedRC) { VRBase = Reg; MIB.addReg(VRBase, RegState::Define); break; } } } } Why do the register classes currently have to match exactly in this case? It seems that these COPYs that now remain may end up in the same register class, if the users require it. So why not constrain also here directly, if this is done generally when the register is used as input? /Jonas _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180730/170fdb81/attachment.html>
Jonas Paulsson via llvm-dev
2018-Jul-30 15:02 UTC
[llvm-dev] InstrEmitter::CreateVirtualRegisters handling of CopyToReg
Hi Alex, nice to hear that this is of use to you! Feel free to post it on Phabricator, and please put Ulrich Weigand as reviewer and author. I would like to be subscriber... Thank you, Jonas On 2018-07-30 16:58, Alexey Zhikhartsev wrote:> Hi Jonas, > > This patch helps with a problem on our out-of-tree backend; we would > love to get some feedback about this patch from the community and > potentially upstream it. Would you mind submitting this patch to > phabricator? I understand that you might be busy; if so, I could > submit it myself (and give credit to you, of course). Thanks! > > Best, > Alex > > > -----Original Message----- > From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org > <mailto:llvm-dev-bounces at lists.llvm.org>] On Behalf Of Jonas Paulsson > via llvm-dev > Sent: Wednesday, May 30, 2018 9:03 AM > To: llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> > Cc: Ulrich Weigand <ulrich.weigand at de.ibm.com > <mailto:ulrich.weigand at de.ibm.com>> > Subject: [llvm-dev] InstrEmitter::CreateVirtualRegisters handling of > CopyToReg > > Hi, > > I wonder if anyone has any comment on a patch like: > > diff --git a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp > b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp > index 65ee3816f84..4780f6f0e59 100644 > --- a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp > +++ b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp > @@ -243,18 +243,21 @@ void InstrEmitter::CreateVirtualRegisters(SDNode > *Node, > > if (!VRBase && !IsClone && !IsCloned) > for (SDNode *User : Node->uses()) { > if (User->getOpcode() == ISD::CopyToReg && > User->getOperand(2).getNode() == Node && > User->getOperand(2).getResNo() == i) { > unsigned Reg > cast<RegisterSDNode>(User->getOperand(1))->getReg(); > if (TargetRegisterInfo::isVirtualRegister(Reg)) { > - const TargetRegisterClass *RegRC = MRI->getRegClass(Reg); > - if (RegRC == RC) { > + // Allow constraining the virtual register's class within > reason, > + // just like what AddRegisterOperand will allow. > + const TargetRegisterClass *ConstrainedRC > + = MRI->constrainRegClass(Reg, RC, MinRCSize); > + if (ConstrainedRC) { > VRBase = Reg; > MIB.addReg(VRBase, RegState::Define); > break; > } > } > } > } > > Why do the register classes currently have to match exactly in this case? > > It seems that these COPYs that now remain may end up in the same > register class, if the users require it. So why not constrain also > here directly, if this is done generally when the register is used as > input? > > /Jonas > > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180730/c0081aa5/attachment.html>