llvm dev - Jul 2018 - how to build NE10 Project using llvm compiler

Hello,



I’m using NXP layerscape Arch (A53/A72), and I want to use NE 10 Project
library , and llvm compiler 3.8.1.1



(https://projectne10.github.io/Ne10/)
<https://projectne10.github.io/Ne10/>



When compiling the project file I get the following errors :



./NE10_abs.asm.s:59:9: error: unrecognized instruction mnemonic

        vmov s2, r3

        ^

../NE10_abs.asm.s:62:9: error: unrecognized instruction mnemonic

        vldr s1, [r1]

        ^

../NE10_abs.asm.s:63:13: error: invalid operand for instruction

        add r1, r1, #4



can you advice , how to handle it?





Re,

Yehuda Marko



Yehuda.Marko at scaleil.com +972544373003

ScaleIL



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Hi,

On Mon, 30 Jul 2018 at 12:15, yehuda marko via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> ./NE10_abs.asm.s:59:9: error: unrecognized instruction mnemonic
>         vmov s2, r3
Clang 3.8 is pretty old, but it should support all of these
instructions. But those instructions are for AArch32 and if you're
compiling for Cortex-A72 you'd naturally be using the new 64-bit
AArch64 instruction set.

So what I suspect is happening is that the project is choosing the old
ARMv7 assembly implementations, either because it doesn't have 64-bit
ones or because something strange in the configuration is taking it
down that path.

Either way, you probably need to contact people involved with NE10 to
sort out what's going on.

Cheers.

Tim.

Hi,

Does llvm compiler knows to support NEON capabilities?
How it support it? Is there a library (similar to NE10 project) , that
support it ? can you share it ?

Thx


Re,
Yehuda Marko

Yehuda.Marko at scaleil.com +972544373003
ScaleIL
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intended recipient(s) and contains information that is confidential and
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-----Original Message-----
From: Tim Northover [mailto:t.p.northover at gmail.com]
Sent: Monday, July 30, 2018 6:08 PM
To: yehuda.marko at scaleil.com
Cc: LLVM Developers Mailing List <llvm-dev at lists.llvm.org>
Subject: Re: [llvm-dev] how to build NE10 Project using llvm compiler

Hi,

On Mon, 30 Jul 2018 at 12:15, yehuda marko via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> ./NE10_abs.asm.s:59:9: error: unrecognized instruction mnemonic
>         vmov s2, r3
Clang 3.8 is pretty old, but it should support all of these instructions.
But those instructions are for AArch32 and if you're compiling for
Cortex-A72 you'd naturally be using the new 64-bit
AArch64 instruction set.

So what I suspect is happening is that the project is choosing the old
ARMv7 assembly implementations, either because it doesn't have 64-bit ones
or because something strange in the configuration is taking it down that
path.

Either way, you probably need to contact people involved with NE10 to sort
out what's going on.

Cheers.

Tim.