Hi Pete, Thanks for your kind response! I migrated AVR target for lld https://reviews.llvm.org/D32991 it is very beginning, only support R_AVR_CALL reloc, and ARC is more complex than AVR, I will learn it from binutils, also ARC related doc, then try to implement it. 发自我的iPhone ------------------ Original ------------------ From: Pete Couperus <Peter.J.Couperus at synopsys.com> Date: 周五,9月 1,2017 11:17 下午 To: Leslie Zhai <lesliezhai at llvm.org.cn>, Peter.J.Couperus at synopsys.com <Peter.J.Couperus at synopsys.com> Cc: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> Subject: Re: RE: [RFC] Adding ARC backend Hello Leslie,>> * Clang driver and target triple support.>great, then it is able to generate ELF by $ /opt/llvm-svn/bin/clang -c --target=arc hello.c -o hello.o -mmcu=XXXBasically yes, but we have not implemented the integrated assembler yet, so currently rely on an external ARC gnu toolchain. Plus, there are a wide variety of subtargets that are basically unsupported until we start adding configuration support. https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain>and do you plan to implement ARC target for lld[1]? it is a good >testcase: flash them directly to the chip[2], or simulator[3].Supporting ARC in lld is a good question. It has not been on my personal short-list, but if you (or others) are interested in specific features, that helps us. I personally use the bare-metal simulator you sited, though the link you supplied doesn't seem to point out where to get it? https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi Pete -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170902/a499a676/attachment.html>
在 2017年09月02日 00:21, 翟翔 写道:> Hi Pete, > Thanks for your kind response! > I migrated AVR target for lld https://reviews.llvm.org/D32991 it is > very beginning, only support R_AVR_CALL reloc, and ARC is more complex > than AVR, I will learn it from binutils, also ARC related doc, then > try to implement it. > > 发自我的iPhone > > > ------------------ Original ------------------ > *From:* Pete Couperus <Peter.J.Couperus at synopsys.com> > *Date:* 周五,9月 1,2017 11:17 下午 > *To:* Leslie Zhai <lesliezhai at llvm.org.cn>, > Peter.J.Couperus at synopsys.com <Peter.J.Couperus at synopsys.com> > *Cc:* llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> > *Subject:* Re: RE: [RFC] Adding ARC backend > > Hello Leslie, > > >> * Clang driver and target triple support. > > >great, then it is able to generate ELF by $ /opt/llvm-svn/bin/clang > -c --target=arc hello.c -o hello.o -mmcu=XXX > > Basically yes, but we have not implemented the integrated assembler > yet, so currently rely on an external ARC gnu toolchain. > Plus, there are a wide variety of subtargets that are basically > unsupported until we start adding configuration support. > https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain$ /opt/arc-gnu/bin/arc-elf32-gcc -o hello.o -c hello.c $ /opt/arc-gnu/bin/arc-elf32-readelf -r hello.o Relocation section '.rela.text' at offset 0x1b0 contains 2 entries: Offset Info Type Sym.Value Sym. Name + Addend 00000016 0000051b R_ARC_32_ME 00000000 .rodata + 0 0000001a 00000a11 R_ARC_S25W_PCREL 00000000 puts + 0 then I could implement some ARC relocation at first.> > >and do you plan to implement ARC target for lld[1]? it is a good > >testcase: flash them directly to the chip[2], or simulator[3]. > > Supporting ARC in lld is a good question. It has not been on my > personal short-list, but if you (or others) are interested in specific > features, that helps us. > I personally use the bare-metal simulator you sited, though the link > you supplied doesn't seem to point out where to get it? > https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgiI filled the form for simulator 4 days ago, but still no reply yet...> > Pete-- Regards, Leslie Zhai - https://reviews.llvm.org/p/xiangzhai/
Hello Leslie,>$ /opt/arc-gnu/bin/arc-elf32-gcc -o hello.o -c hello.c $ /opt/arc->gnu/bin/arc-elf32-readelf -r hello.o > >Relocation section '.rela.text' at offset 0x1b0 contains 2 entries: > Offset Info Type Sym.Value Sym. Name + Addend >00000016 0000051b R_ARC_32_ME 00000000 .rodata + 0 >0000001a 00000a11 R_ARC_S25W_PCREL 00000000 puts + 0 > >then I could implement some ARC relocation at first.Implementing some of the ARC relocations first sounds good to me.>I filled the form for simulator 4 days ago, but still no reply yet...Sorry about this. I asked around, is this taken care of now? If you have questions about these tools, or other non-LLVM ARC topics, feel free to contact me off-list. Thanks! Pete