llvm dev - Feb 2014 - [LLVMdev] How to 'define and use' a LOOP intrinsic that takes "iteration count" and the "label" to jump to ?

I have defined the intrinsic as
*  def int_loop: Intrinsic<[],[llvm_i8_ty, llvm_empty_ty],[]>;*

and also got the Codegen backend support in Instructioninfo.td file.

Then created a .ll file to test it.
The .ll file is like this









*declare void @llvm.loop(i8, label)define void @fn() nounwind readnone
{entry:   .....  .....  call void @llvm.loop(i8 10, label %entry)  ret
void}*

But when I run it with llc, I get the following error message

Intrinsic has incorrect argument type!
void (i8, label)* @llvm.loop
Broken module found, compilation aborted!

The 'Module Verifier' is complaining about the 'label' type. Any
suggestions on how I go about doing this ? Would appreciate your help.
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----- Original Message -----
> From: "RAVI KORSA" <ravi.korsa at gmail.com>
> To: llvmdev at cs.uiuc.edu
> Sent: Wednesday, February 26, 2014 2:14:25 PM
> Subject: [LLVMdev] How to 'define and use' a LOOP intrinsic that
takes "iteration count" and the "label" to jump to ?
> 
> 
> 
> 
> I have defined the intrinsic as
> def int_loop: Intrinsic<[],[llvm_i8_ty, llvm_empty_ty],[]>;
> 
> 
> and also got the Codegen backend support in Instructioninfo.td file.
> 
> 
> Then created a .ll file to test it.
> 
> The .ll file is like this
> 
> declare void @llvm.loop(i8, label)
> 
> define void @fn() nounwind readnone {
> entry:
> .....
> .....
> call void @llvm.loop(i8 10, label %entry)
> ret void
> }
I suspect that you'll run into several problems doing this. For one thing,
LLVM has builtin assumptions about what kinds of instructions act as block
terminators, and your intrinsic call is not one of them. I recommend looking at
how the PowerPC counter-based loops are implemented. PowerPC uses a special
intrinsic (inserted by the target-specific late IR-level pass
lib/Target/PowerPC/PPCCTRLoops.cpp):
  def int_ppc_is_decremented_ctr_nonzero : Intrinsic<[llvm_i1_ty], [],
[]>;
along with:
  def int_ppc_mtctr : Intrinsic<[], [llvm_anyint_ty], []>;

and the first intrinsic is used with the regular loop branching instructions at
the IR level. In the backend, loop branching instructions that are fed by that
intrinsic are transformed into target-specific SDAG nodes (and, then, to the
appropriate instructions).

If you have any further questions, please feel free to ask.

 -Hal
> 
> 
> But when I run it with llc, I get the following error message
> 
> Intrinsic has incorrect argument type!
> void (i8, label)* @llvm.loop
> Broken module found, compilation aborted!
> 
> 
> The 'Module Verifier' is complaining about the 'label'
type. Any
> suggestions on how I go about doing this ? Would appreciate your
> help.
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> 
-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory

Thank you for pointing to the PPCCTRLoops. That's a good idea. Yes I
understand that OPT passes will have problems with my intrinsic, since they
do not know that  it's a terminator instruction. However in the backend, I
have defined the instruction with "isBranch=1, isTerminator=1". This
can
prevent the backend from reordering the instruction. Just out of curiosity,
why can't we have an intrinsicProperty that says "this intrinsic is a
terminator or a branch" and allow it to take a label ?. Such an
intrinsicProperty will allow all the OPT passes to understand any new
branch or loop kind of intrinsics.

Thanks
Ravi.


On Thu, Feb 27, 2014 at 2:13 AM, Hal Finkel <hfinkel at anl.gov> wrote:
> ----- Original Message -----
> > From: "RAVI KORSA" <ravi.korsa at gmail.com>
> > To: llvmdev at cs.uiuc.edu
> > Sent: Wednesday, February 26, 2014 2:14:25 PM
> > Subject: [LLVMdev] How to 'define and use' a LOOP intrinsic
that takes
> "iteration count" and the "label" to jump to ?
> >
> >
> >
> >
> > I have defined the intrinsic as
> > def int_loop: Intrinsic<[],[llvm_i8_ty, llvm_empty_ty],[]>;
> >
> >
> > and also got the Codegen backend support in Instructioninfo.td file.
> >
> >
> > Then created a .ll file to test it.
> >
> > The .ll file is like this
> >
> > declare void @llvm.loop(i8, label)
> >
> > define void @fn() nounwind readnone {
> > entry:
> > .....
> > .....
> > call void @llvm.loop(i8 10, label %entry)
> > ret void
> > }
>
> I suspect that you'll run into several problems doing this. For one
thing,
> LLVM has builtin assumptions about what kinds of instructions act as block
> terminators, and your intrinsic call is not one of them. I recommend
> looking at how the PowerPC counter-based loops are implemented. PowerPC
> uses a special intrinsic (inserted by the target-specific late IR-level
> pass lib/Target/PowerPC/PPCCTRLoops.cpp):
>   def int_ppc_is_decremented_ctr_nonzero : Intrinsic<[llvm_i1_ty], [],
[]>;
> along with:
>   def int_ppc_mtctr : Intrinsic<[], [llvm_anyint_ty], []>;
>
> and the first intrinsic is used with the regular loop branching
> instructions at the IR level. In the backend, loop branching instructions
> that are fed by that intrinsic are transformed into target-specific SDAG
> nodes (and, then, to the appropriate instructions).
>
> If you have any further questions, please feel free to ask.
>
>  -Hal
>
> >
> >
> > But when I run it with llc, I get the following error message
> >
> > Intrinsic has incorrect argument type!
> > void (i8, label)* @llvm.loop
> > Broken module found, compilation aborted!
> >
> >
> > The 'Module Verifier' is complaining about the 'label'
type. Any
> > suggestions on how I go about doing this ? Would appreciate your
> > help.
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> > _______________________________________________
> > LLVM Developers mailing list
> > LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> >
>
> --
> Hal Finkel
> Assistant Computational Scientist
> Leadership Computing Facility
> Argonne National Laboratory
>
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