Sunday March 31 2013 |
Time | Replies | Subject |
10:06PM |
1 |
[LLVMdev] code gen variable mapping |
5:47PM |
1 |
[LLVMdev] custom landingpad data, not dwarf encoded clauses? |
5:28PM |
0 |
[LLVMdev] custom landingpad data, not dwarf encoded clauses? |
2:28PM |
2 |
[LLVMdev] custom landingpad data, not dwarf encoded clauses? |
10:06AM |
1 |
[LLVMdev] llvm with gcc-4.8 / Intrinsics.gen.tmp Segmentation fault |
6:11AM |
1 |
[LLVMdev] Wrong URL for organization on LLVM Users page |
5:22AM |
2 |
[LLVMdev] landingpad catch types not making it to Dwarf tables |
|
Saturday March 30 2013 |
Time | Replies | Subject |
4:12PM |
0 |
[LLVMdev] Problems with parallelizing lli |
3:30PM |
0 |
[LLVMdev] SolusOS 2 + Clang |
12:46PM |
2 |
[LLVMdev] SolusOS 2 + Clang |
12:35PM |
1 |
[LLVMdev] (no subject) |
12:16PM |
1 |
[LLVMdev] SmallVectorTemplateCommon assertion failed |
10:36AM |
2 |
[LLVMdev] Missed optimisation opportunities? |
1:14AM |
1 |
[LLVMdev] Adding ARM UDF / UND instruction to TableGen |
|
Friday March 29 2013 |
Time | Replies | Subject |
11:42PM |
0 |
[LLVMdev] Print Global Prefix Issue |
11:34PM |
0 |
[LLVMdev] dynamic passes |
11:28PM |
2 |
[LLVMdev] dynamic passes |
11:26PM |
0 |
[LLVMdev] dynamic passes |
11:15PM |
2 |
[LLVMdev] dynamic passes |
11:05PM |
0 |
[LLVMdev] dynamic passes |
10:38PM |
2 |
[LLVMdev] dynamic passes |
6:57PM |
2 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
5:52PM |
1 |
[LLVMdev] How to initiate/throw an exception (resume just continues) |
5:34PM |
0 |
[LLVMdev] How to initiate/throw an exception (resume just continues) |
5:15PM |
2 |
[LLVMdev] How to initiate/throw an exception (resume just continues) |
3:16PM |
2 |
[LLVMdev] Print Global Prefix Issue |
8:22AM |
1 |
[LLVMdev] How to use the llvm::Linker? |
4:40AM |
1 |
[LLVMdev] function pass to visit BB bottom-up order |
3:06AM |
0 |
[LLVMdev] Handling SRet on Windows x86... |
2:44AM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
12:12AM |
2 |
[LLVMdev] x86_stdcallcc @<n> mangling vs. '\1' prefix [was: x86_stdcallcc and extra name mangling on Windows] |
|
Thursday March 28 2013 |
Time | Replies | Subject |
8:54PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
8:49PM |
2 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
8:46PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
8:29PM |
2 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
8:15PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
7:52PM |
3 |
[LLVMdev] Handling SRet on Windows x86 |
7:47PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
7:40PM |
1 |
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working |
7:35PM |
0 |
[LLVMdev] Handling SRet on Windows x86 |
7:29PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
7:22PM |
0 |
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working |
7:19PM |
6 |
[LLVMdev] Handling SRet on Windows x86 |
7:18PM |
3 |
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working |
7:05PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
6:58PM |
2 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
6:51PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
6:48PM |
1 |
[LLVMdev] [cfe-dev] llvmlab (phased buildmaster) is in production mode! |
6:47PM |
0 |
[LLVMdev] Handling SRet on Windows x86 |
6:39PM |
4 |
[LLVMdev] Handling SRet on Windows x86 |
3:59PM |
0 |
[LLVMdev] Fwd: [cfe-dev] Handling SRet on Windows x86 |
3:55PM |
2 |
[LLVMdev] Fwd: [cfe-dev] Handling SRet on Windows x86 |
3:22PM |
0 |
[LLVMdev] Fwd: [cfe-dev] Handling SRet on Windows x86 |
3:00PM |
0 |
[LLVMdev] cyclical use between caller and callee |
2:40PM |
1 |
[LLVMdev] LLVM Execution engine: Native call vs LLVM IR function call |
2:05PM |
0 |
[LLVMdev] Handling SRet on Windows x86 |
1:16PM |
0 |
[LLVMdev] [cfe-dev] llvmlab (phased buildmaster) is in production mode! |
12:11PM |
0 |
[LLVMdev] Question about simple constant propagation pass |
11:05AM |
0 |
[LLVMdev] LLVM Execution engine: Native call vs LLVM IR function call |
10:39AM |
2 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
5:09AM |
3 |
[LLVMdev] [cfe-dev] llvmlab (phased buildmaster) is in production mode! |
4:52AM |
2 |
[LLVMdev] LLVM Execution engine: Native call vs LLVM IR function call |
3:15AM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
2:55AM |
0 |
[LLVMdev] Avoid Valgrind's still-reachable leak warnings |
2:35AM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
2:15AM |
2 |
[LLVMdev] Question about simple constant propagation pass |
1:54AM |
1 |
[LLVMdev] How can a pass obtain the path of input file? |
1:41AM |
0 |
[LLVMdev] [cfe-dev] llvmlab (phased buildmaster) is in production mode! |
12:58AM |
0 |
[LLVMdev] [cfe-dev] llvmlab (phased buildmaster) is in production mode! |
12:50AM |
0 |
[LLVMdev] llvmlab (phased buildmaster) is in production mode! |
|
Wednesday March 27 2013 |
Time | Replies | Subject |
10:57PM |
6 |
[LLVMdev] llvmlab (phased buildmaster) is in production mode! |
9:32PM |
1 |
[LLVMdev] LLVM pass question |
9:28PM |
8 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
8:44PM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
8:39PM |
0 |
[LLVMdev] Feedback required on proper dllexport/import implementation |
8:32PM |
3 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
8:11PM |
1 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA (new version) |
6:17PM |
0 |
[LLVMdev] LLVM pass question |
5:28PM |
0 |
[LLVMdev] Fwd: cyclical use between caller and callee |
5:19PM |
2 |
[LLVMdev] LLVM pass question |
5:05PM |
0 |
[LLVMdev] LLVM pass question |
3:58PM |
2 |
[LLVMdev] LLVM pass question |
3:53PM |
0 |
[LLVMdev] Ordering not assigned to DAG Nodes create after DAG builder |
3:17PM |
0 |
[LLVMdev] Concurrent library |
8:42AM |
2 |
[LLVMdev] Concurrent library |
6:01AM |
2 |
[LLVMdev] cyclical use between caller and callee |
3:00AM |
2 |
[LLVMdev] Ordering not assigned to DAG Nodes create after DAG builder |
2:26AM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
|
Tuesday March 26 2013 |
Time | Replies | Subject |
5:40PM |
0 |
[LLVMdev] [PATCH] RegScavenger::scavengeRegister |
5:29PM |
2 |
[LLVMdev] [PATCH] RegScavenger::scavengeRegister |
4:29PM |
0 |
[LLVMdev] LLVM position in Sunnyvale, CA, remote work is a possibility |
8:16AM |
0 |
[LLVMdev] Is it correct for a glue operand to be replaced with a chain? |
7:43AM |
0 |
[LLVMdev] How to slice the source code? |
4:43AM |
6 |
[LLVMdev] Feedback required on proper dllexport/import implementation |
12:14AM |
0 |
[LLVMdev] Fwd: Extending Kaleidoscope to support Strings |
|
Monday March 25 2013 |
Time | Replies | Subject |
11:02PM |
0 |
[LLVMdev] [PATCH] RegScavenger::scavengeRegister |
9:54PM |
0 |
[LLVMdev] MnemonicAliases and side-effects |
9:51PM |
2 |
[LLVMdev] [PATCH] RegScavenger::scavengeRegister |
9:07PM |
0 |
[LLVMdev] [PATCH] RegScavenger::scavengeRegister |
8:41PM |
3 |
[LLVMdev] [PATCH] RegScavenger::scavengeRegister |
8:06PM |
0 |
[LLVMdev] [PATCH] RegScavenger::scavengeRegister |
7:58PM |
1 |
[LLVMdev] Types in TableGen instruction selection patterns |
7:50PM |
0 |
[LLVMdev] Types in TableGen instruction selection patterns |
7:04PM |
3 |
[LLVMdev] [PATCH] RegScavenger::scavengeRegister |
5:49PM |
1 |
[LLVMdev] bugpoint (and possibly others) need to be compiled with -rdynamic |
5:08PM |
2 |
[LLVMdev] MnemonicAliases and side-effects |
4:42PM |
0 |
[LLVMdev] About the partial update clearence / dependency breaking mechanism |
4:28PM |
0 |
[LLVMdev] llvm2cpp attributes handling |
4:15PM |
3 |
[LLVMdev] llvm2cpp attributes handling |
2:26PM |
1 |
[LLVMdev] Debug metadata after simplifications |
2:22PM |
1 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
1:04PM |
0 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
12:02PM |
2 |
[LLVMdev] About the partial update clearence / dependency breaking mechanism |
12:16AM |
1 |
[LLVMdev] Backend port: Adding negative immediates |
|
Sunday March 24 2013 |
Time | Replies | Subject |
10:02PM |
0 |
[LLVMdev] Change optimization level during compilation |
8:15PM |
0 |
[LLVMdev] PostOrderIterator |
7:50PM |
5 |
[LLVMdev] Types in TableGen instruction selection patterns |
2:05AM |
1 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
12:43AM |
0 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
|
Saturday March 23 2013 |
Time | Replies | Subject |
9:54PM |
0 |
[LLVMdev] Memory clean for applications using LLVM for JIT compilation |
8:50PM |
0 |
[LLVMdev] Simpler types in TableGen isel patterns |
5:37PM |
2 |
[LLVMdev] [Polly]GSoC Proposal: Reducing LLVM-Polly Compiling overhead |
4:34PM |
0 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
4:23PM |
0 |
[LLVMdev] [Polly]GSoC Proposal: Reducing LLVM-Polly Compiling overhead |
4:07PM |
2 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
3:59PM |
0 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
3:32PM |
2 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
3:18PM |
2 |
[LLVMdev] Memory clean for applications using LLVM for JIT compilation |
3:14PM |
0 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
2:51PM |
1 |
[LLVMdev] LLVM 3.2 compilation with RTTI enabled |
9:51AM |
3 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
|
Friday March 22 2013 |
Time | Replies | Subject |
11:06PM |
0 |
[LLVMdev] WebCL Kernel Validator RFQ |
11:05PM |
0 |
[LLVMdev] LLVM buildmaster will be restarted today after 6 PM Pacific |
10:22PM |
0 |
[LLVMdev] proposed change to class BasicTTI |
9:33PM |
0 |
[LLVMdev] BasicTansformInfoPass |
9:06PM |
2 |
[LLVMdev] BasicTansformInfoPass |
8:52PM |
0 |
[LLVMdev] multiple thread jit support on windows ( win32 and win64 ) |
6:30PM |
4 |
[LLVMdev] proposed change to class BasicTTI |
5:52PM |
0 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
4:43PM |
0 |
[LLVMdev] proposed change to class BasicTTI |
4:22PM |
2 |
[LLVMdev] proposed change to class BasicTTI |
12:37PM |
0 |
[LLVMdev] Any plan for WHOPR on LLVM? |
7:12AM |
1 |
[LLVMdev] static variables in the IR |
5:08AM |
2 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
4:42AM |
0 |
[LLVMdev] How to describe a pointer that points to All memory(include global memory, heap, stack)? |
|
Thursday March 21 2013 |
Time | Replies | Subject |
8:39PM |
0 |
[LLVMdev] Simpler types in TableGen isel patterns |
8:27PM |
0 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
8:14PM |
0 |
[LLVMdev] [llvm-mc/AsmParser] Using validateTargetOperandClass in llvm-mc |
8:06PM |
0 |
[LLVMdev] Simpler types in TableGen isel patterns |
7:56PM |
1 |
[LLVMdev] Simpler types in TableGen isel patterns |
7:03PM |
0 |
[LLVMdev] (Not) instrumenting global string literals that end up in .cstrings on Mac |
7:00PM |
0 |
[LLVMdev] Simpler types in TableGen isel patterns |
6:26PM |
9 |
[LLVMdev] Simpler types in TableGen isel patterns |
4:47PM |
1 |
[LLVMdev] [VMKit] |
2:41PM |
0 |
[LLVMdev] Changing the LLVM C API to remove a pass |
2:27PM |
2 |
[LLVMdev] Changing the LLVM C API to remove a pass |
2:05PM |
2 |
[LLVMdev] (Not) instrumenting global string literals that end up in .cstrings on Mac |
1:54PM |
0 |
[LLVMdev] Hit a snag while attempting to write a backend - any advice? |
1:09PM |
0 |
[LLVMdev] Hit a snag while attempting to write a backend - any advice? |
1:06PM |
0 |
[LLVMdev] Universal tool for creating your own language and parsing the AST |
10:20AM |
1 |
[LLVMdev] Getting state at interrupt of JIT |
7:29AM |
2 |
[LLVMdev] How to describe a pointer that points to All memory(include global memory, heap, stack)? |
6:15AM |
0 |
[LLVMdev] How to describe a pointer that points to All memory(include global memory, heap, stack)? |
6:04AM |
1 |
[LLVMdev] Unsubscribe attempt |
5:12AM |
0 |
[LLVMdev] Hidden-visibility aliases to default-visibility globals |
2:33AM |
2 |
[LLVMdev] How to describe a pointer that points to All memory(include global memory, heap, stack)? |
2:19AM |
0 |
[LLVMdev] fptrunc and undefined results |
12:33AM |
2 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
12:21AM |
0 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
12:04AM |
3 |
[LLVMdev] [cfe-dev] Handling SRet on Windows x86 |
|
Wednesday March 20 2013 |
Time | Replies | Subject |
10:51PM |
1 |
[LLVMdev] Debug Info Documentation State |
10:44PM |
1 |
[LLVMdev] changing passes and changing subtargets on a per function basis |
9:33PM |
0 |
[LLVMdev] Debug Info Documentation State |
9:22PM |
4 |
[LLVMdev] Hidden-visibility aliases to default-visibility globals |
9:21PM |
2 |
[LLVMdev] Debug Info Documentation State |
9:01PM |
0 |
[LLVMdev] Problems with parallelizing lli |
7:29PM |
2 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
5:59PM |
0 |
[LLVMdev] Debug info for namespaces and "using" |
5:48PM |
0 |
[LLVMdev] bugpoint (and possibly others) need to be compiled with -rdynamic |
5:40PM |
1 |
[LLVMdev] error: unable to get target for 'armv5', see --version and --triple. |
5:05PM |
0 |
[LLVMdev] Memory clean for applications using LLVM for JIT compilation |
5:00PM |
0 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
4:14PM |
2 |
[LLVMdev] bugpoint (and possibly others) need to be compiled with -rdynamic |
4:13PM |
2 |
[LLVMdev] Memory clean for applications using LLVM for JIT compilation |
3:38PM |
0 |
[LLVMdev] error: unable to get target for 'armv5', see --version and --triple. |
3:29PM |
2 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
3:03PM |
0 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
1:59PM |
0 |
[LLVMdev] Help with LLVM 3.2 linking error |
1:42PM |
2 |
[LLVMdev] error: unable to get target for 'armv5', see --version and --triple. |
1:32PM |
2 |
[LLVMdev] Help with LLVM 3.2 linking error |
1:22PM |
1 |
[LLVMdev] Publication |
1:06PM |
2 |
[LLVMdev] [Polly]GSoC Proposal: Reducing LLVM-Polly Compiling overhead |
9:58AM |
0 |
[LLVMdev] ARM NEON VMUL.f32 issue |
9:10AM |
2 |
[LLVMdev] Strange spill behaviour |
3:58AM |
2 |
[LLVMdev] About commit TILE-Gx backend to community repository and default disabled |
|
Tuesday March 19 2013 |
Time | Replies | Subject |
9:13PM |
0 |
[LLVMdev] ARM NEON VMUL.f32 issue |
6:17PM |
4 |
[LLVMdev] ARM NEON VMUL.f32 issue |
5:27PM |
0 |
[LLVMdev] setCC and brcond |
4:03PM |
0 |
[LLVMdev] bugpoint (and possibly others) need to be compiled with -rdynamic |
4:02PM |
0 |
[LLVMdev] [Polly]GSoC Proposal: Reducing LLVM-Polly Compiling overhead |
3:46PM |
2 |
[LLVMdev] bugpoint (and possibly others) need to be compiled with -rdynamic |
2:46PM |
0 |
[LLVMdev] Basic Block code sample |
1:51PM |
0 |
[LLVMdev] [vmkit]Errors when compiling vmkit |
1:35PM |
2 |
[LLVMdev] Basic Block code sample |
10:15AM |
1 |
[LLVMdev] Strange linker error with clang 3.2 |
9:20AM |
2 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
12:56AM |
0 |
[LLVMdev] Memory clean for applications using LLVM for JIT compilation |
|
Monday March 18 2013 |
Time | Replies | Subject |
10:31PM |
2 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
9:50PM |
1 |
[LLVMdev] llvm license/GPL |
9:12PM |
0 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
8:08PM |
0 |
[LLVMdev] Dependence Analysis on Machine code |
6:34PM |
5 |
[LLVMdev] Hit a snag while attempting to write a backend - any advice? |
5:47PM |
0 |
[LLVMdev] Help with LLVM 3.2 linking error |
4:58PM |
2 |
[LLVMdev] Help with LLVM 3.2 linking error |
3:31PM |
2 |
[LLVMdev] [Polly]GSoC Proposal: Reducing LLVM-Polly Compiling overhead |
3:29PM |
1 |
[LLVMdev] LLVM pass for vector init and loop |
2:14PM |
0 |
[LLVMdev] Help with LLVM 3.2 linking error |
1:45PM |
2 |
[LLVMdev] Help with LLVM 3.2 linking error |
12:40PM |
0 |
[LLVMdev] [Polly]GSoC Proposal: Reducing LLVM-Polly Compiling overhead |
12:27PM |
0 |
[LLVMdev] Install LLVM CMake modules |
9:53AM |
0 |
[LLVMdev] Cambridge LLVM Social - This Week! |
9:49AM |
0 |
[LLVMdev] Running cross compiled binaries for ARM on gem5 |
9:43AM |
2 |
[LLVMdev] Running cross compiled binaries for ARM on gem5 |
9:28AM |
0 |
[LLVMdev] Running cross compiled binaries for ARM on gem5 |
9:12AM |
2 |
[LLVMdev] [vmkit]Errors when compiling vmkit |
6:23AM |
0 |
[LLVMdev] internal compiler error when compiling llvm-gcc-4.2-2.9 |
4:54AM |
2 |
[LLVMdev] [Polly]GSoC Proposal: Reducing LLVM-Polly Compiling overhead |
4:42AM |
2 |
[LLVMdev] UNREACHABLE executed! error while trying to generate PTX |
|
Sunday March 17 2013 |
Time | Replies | Subject |
10:46PM |
0 |
[LLVMdev] Problem with executing recompileAndRelinkFunction successively |
10:40PM |
2 |
[LLVMdev] Running cross compiled binaries for ARM on gem5 |
9:17PM |
3 |
[LLVMdev] Memory clean for applications using LLVM for JIT compilation |
7:29PM |
0 |
[LLVMdev] LLVM ERROR: Program used external function 'X.foo' which could not be resolved! |
6:25PM |
2 |
[LLVMdev] How to slice the source code? |
|
Saturday March 16 2013 |
Time | Replies | Subject |
3:35PM |
0 |
[LLVMdev] Memory clean for applications using LLVM for JIT compilation |
1:16PM |
2 |
[LLVMdev] internal compiler error when compiling llvm-gcc-4.2-2.9 |
1:09PM |
1 |
[LLVMdev] LLVM custom dynamic casting mechanism |
7:31AM |
0 |
[LLVMdev] internal compiler error when compiling llvm-gcc-4.2-2.9 |
6:53AM |
0 |
[LLVMdev] Disable LNT tests individually |
6:23AM |
3 |
[LLVMdev] internal compiler error when compiling llvm-gcc-4.2-2.9 |
4:26AM |
1 |
[LLVMdev] Can the FileCheck ignore spaces ? |
1:11AM |
0 |
[LLVMdev] Simple question |
12:18AM |
3 |
[LLVMdev] Simple question |
12:03AM |
0 |
[LLVMdev] Expand action on FSUB with vector types causes both "Vector Unroll" and "Add+Negate" |
|
Friday March 15 2013 |
Time | Replies | Subject |
10:51PM |
0 |
[LLVMdev] Simple question |
10:36PM |
0 |
[LLVMdev] Simple question |
10:08PM |
6 |
[LLVMdev] Simple question |
6:51PM |
0 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
3:38PM |
0 |
[LLVMdev] Scheduling a custom pass to run after AlwaysInliner |
2:57PM |
2 |
[LLVMdev] Disable LNT tests individually |
12:41PM |
0 |
[LLVMdev] write a simple MachineFunctionPass |
12:30PM |
2 |
[LLVMdev] write a simple MachineFunctionPass |
12:15PM |
0 |
[LLVMdev] Can the FileCheck ignore spaces ? |
10:18AM |
2 |
[LLVMdev] Dependence Analysis on Machine code |
8:39AM |
0 |
[LLVMdev] Problems about developing LLVM pass on windows visual studio |
8:16AM |
3 |
[LLVMdev] Can the FileCheck ignore spaces ? |
6:51AM |
2 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
2:51AM |
1 |
[LLVMdev] Problems about developing LLVM pass on windows visual studio |
|
Thursday March 14 2013 |
Time | Replies | Subject |
9:36PM |
0 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
9:33PM |
0 |
[LLVMdev] Suggestion About Adding Target Dependent Decision in LSR Please |
9:21PM |
3 |
[LLVMdev] Suggestion About Adding Target Dependent Decision in LSR Please |
8:01PM |
0 |
[LLVMdev] Hexagon: removing support for Hexagon-v2 and Hexagon-v3 |
7:51PM |
2 |
[LLVMdev] Hexagon: removing support for Hexagon-v2 and Hexagon-v3 |
4:41PM |
0 |
[LLVMdev] Suggestion About Adding Target Dependent Decision in LSR Please |
4:36PM |
0 |
[LLVMdev] Get underlying object for Machine level memory operation |
1:46PM |
2 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
11:15AM |
2 |
[LLVMdev] Get underlying object for Machine level memory operation |
7:35AM |
0 |
[LLVMdev] initial putback for implementing mips16/nomips16 attributes - please review |
6:11AM |
0 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
1:06AM |
3 |
[LLVMdev] undefined reference to 'llvm_gcda_start_file', 'llvm_gcda_emit_arcs', etc |
|
Wednesday March 13 2013 |
Time | Replies | Subject |
11:50PM |
1 |
[LLVMdev] void TargetLoweringBase::computeRegisterProperties |
11:37PM |
2 |
[LLVMdev] Suggestion About Adding Target Dependent Decision in LSR Please |
11:03PM |
0 |
[LLVMdev] r176991 - Really fix the MIPS test. |
9:00PM |
1 |
[LLVMdev] [llvm-c] Copyright notice in language bindings |
8:49PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
8:31PM |
0 |
[LLVMdev] Disabling ExecutionEngine tests for Hexagon |
8:21PM |
2 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
8:14PM |
0 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
8:04PM |
3 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
7:17PM |
0 |
[LLVMdev] [llvm-c] Copyright notice in language bindings |
6:49PM |
0 |
[LLVMdev] Has something changed in LLVM BUG tracking system ? |
6:41PM |
0 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
6:37PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
6:26PM |
1 |
[LLVMdev] [llvm-c] Copyright notice in language bindings |
6:21PM |
2 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
6:07PM |
3 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
6:04PM |
0 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
6:01PM |
2 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
5:58PM |
1 |
[LLVMdev] changing register classes on a per function basis |
5:57PM |
0 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
5:56PM |
1 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA (should we use offset+size instead of path?) |
5:28PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
5:15PM |
3 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
5:03PM |
0 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
5:02PM |
0 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
4:38PM |
0 |
[LLVMdev] LNT BenchmarkGame |
4:23PM |
1 |
[LLVMdev] Different results using -emit-llvm and llc together than just using -S? |
4:14PM |
0 |
[LLVMdev] How to describe a pointer that points to All memory(include global memory, heap, stack)? |
2:41PM |
0 |
[LLVMdev] Linkage question |
1:43PM |
5 |
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM |
1:41PM |
0 |
[LLVMdev] guidance on backend writing; canonical example? |
1:40PM |
2 |
[LLVMdev] [llvm-c] Copyright notice in language bindings |
12:43PM |
0 |
[LLVMdev] Obtaining and using block frequencies in MachineScheduler.cpp |
9:53AM |
0 |
[LLVMdev] Different results using -emit-llvm and llc together than just using -S? |
9:28AM |
0 |
[LLVMdev] Different results using -emit-llvm and llc together than just using -S? |
9:27AM |
0 |
[LLVMdev] failure mode of invalid (debug info) metadata |
9:06AM |
2 |
[LLVMdev] How to describe a pointer that points to All memory(include global memory, heap, stack)? |
7:15AM |
2 |
[LLVMdev] Disabling ExecutionEngine tests for Hexagon |
6:59AM |
2 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
6:27AM |
0 |
[LLVMdev] attributes helper functions - please review |
6:09AM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
4:24AM |
1 |
[LLVMdev] Help needed on debugging llvm |
3:03AM |
2 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
3:01AM |
2 |
[LLVMdev] Linkage question |
2:59AM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
2:56AM |
3 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
2:48AM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
2:44AM |
0 |
[LLVMdev] Linkage question |
2:43AM |
3 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
2:21AM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
1:50AM |
3 |
[LLVMdev] guidance on backend writing; canonical example? |
1:07AM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
12:59AM |
3 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
12:56AM |
1 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
12:40AM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
12:31AM |
0 |
[LLVMdev] Generating IR bytecode files of httpd source code |
12:16AM |
2 |
[LLVMdev] Generating IR bytecode files of httpd source code |
12:13AM |
5 |
[LLVMdev] Different results using -emit-llvm and llc together than just using -S? |
|
Tuesday March 12 2013 |
Time | Replies | Subject |
10:46PM |
0 |
[LLVMdev] llvm.meta (was Rotated loop identification) |
10:44PM |
2 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
8:51PM |
0 |
[LLVMdev] Disabling ExecutionEngine tests for Hexagon |
8:39PM |
0 |
[LLVMdev] Are you interested in writing a LLVM blog post? |
8:38PM |
2 |
[LLVMdev] failure mode of invalid (debug info) metadata |
7:48PM |
2 |
[LLVMdev] LNT BenchmarkGame |
7:30PM |
0 |
[LLVMdev] Internship opportunities for grad students at Samsung Research America - Silicon Valley (San Jose, CA) |
7:21PM |
0 |
[LLVMdev] LNT BenchmarkGame |
7:20PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
6:17PM |
1 |
[LLVMdev] help decompiling x86 ASM to LLVM IR |
5:30PM |
5 |
[LLVMdev] LNT BenchmarkGame |
5:23PM |
0 |
[LLVMdev] LNT BenchmarkGame |
5:13PM |
3 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
5:10PM |
0 |
[LLVMdev] help decompiling x86 ASM to LLVM IR |
5:10PM |
2 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
5:01PM |
1 |
[LLVMdev] help decompiling x86 ASM to LLVM IR |
4:55PM |
4 |
[LLVMdev] help decompiling x86 ASM to LLVM IR |
4:48PM |
4 |
[LLVMdev] LNT BenchmarkGame |
4:48PM |
0 |
[LLVMdev] LNT BenchmarkGame |
4:45PM |
0 |
[LLVMdev] help decompiling x86 ASM to LLVM IR |
4:39PM |
0 |
[LLVMdev] help decompiling x86 ASM to LLVM IR |
4:33PM |
2 |
[LLVMdev] LNT BenchmarkGame |
4:21PM |
0 |
[LLVMdev] LNT BenchmarkGame |
4:20PM |
6 |
[LLVMdev] help decompiling x86 ASM to LLVM IR |
4:19PM |
0 |
[LLVMdev] LNT BenchmarkGame |
3:32PM |
0 |
[LLVMdev] applying a pass only on execution paths |
3:28PM |
2 |
[LLVMdev] LNT BenchmarkGame |
3:22PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
3:22PM |
0 |
[LLVMdev] LNT BenchmarkGame |
2:53PM |
2 |
[LLVMdev] LNT BenchmarkGame |
2:36PM |
0 |
[LLVMdev] LNT BenchmarkGame |
2:33PM |
5 |
[LLVMdev] LNT BenchmarkGame |
2:24PM |
0 |
[LLVMdev] LNT BenchmarkGame |
1:56PM |
4 |
[LLVMdev] LNT BenchmarkGame |
10:43AM |
1 |
[LLVMdev] hazard scheduling nodes |
7:34AM |
0 |
[LLVMdev] Help needed on debugging llvm |
5:28AM |
2 |
[LLVMdev] Disabling ExecutionEngine tests for Hexagon |
4:21AM |
2 |
[LLVMdev] Help needed on debugging llvm |
2:52AM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
12:56AM |
0 |
[LLVMdev] how to use SET_DEBUG_TYPE("foo") macro? |
|
Monday March 11 2013 |
Time | Replies | Subject |
11:56PM |
2 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
11:23PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
10:45PM |
4 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
9:37PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
9:21PM |
0 |
[LLVMdev] LNT usage |
9:06PM |
2 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
8:53PM |
2 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
8:17PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
8:15PM |
2 |
[LLVMdev] LNT usage |
7:52PM |
0 |
[LLVMdev] Disabling ExecutionEngine tests for Hexagon |
7:28PM |
2 |
[LLVMdev] Disabling ExecutionEngine tests for Hexagon |
7:14PM |
0 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
7:00PM |
0 |
[LLVMdev] Opt pass for collecting static memory allocations (allocas and globals) to one big memory area. |
6:41PM |
5 |
[LLVMdev] PROPOSAL: struct-access-path aware TBAA |
6:33PM |
0 |
[LLVMdev] How to unroll reduction loop with caching accumulator on register? |
6:27PM |
0 |
[LLVMdev] Bug in visitSIGN_EXTEND in DAGCombiner.cpp? |
5:25PM |
3 |
[LLVMdev] Bug in visitSIGN_EXTEND in DAGCombiner.cpp? |
4:41PM |
0 |
[LLVMdev] Bug in visitSIGN_EXTEND in DAGCombiner.cpp? |
3:49PM |
2 |
[LLVMdev] How to unroll reduction loop with caching accumulator on register? |
3:34PM |
2 |
[LLVMdev] Bug in visitSIGN_EXTEND in DAGCombiner.cpp? |
3:11PM |
0 |
[LLVMdev] symbol address: llvm-objdump vs. objdump |
1:45PM |
1 |
[LLVMdev] AESOP autoparallelizing compiler |
1:34PM |
1 |
[LLVMdev] regarding C++11 plugins |
12:59PM |
0 |
[LLVMdev] AESOP autoparallelizing compiler |
12:54PM |
0 |
[LLVMdev] Running cross compiled binaries for ARM on gem5 |
11:56AM |
1 |
[LLVMdev] Question about InlineAsm |
11:49AM |
0 |
[LLVMdev] Help needed on debugging llvm |
11:32AM |
2 |
[LLVMdev] Opt pass for collecting static memory allocations (allocas and globals) to one big memory area. |
11:30AM |
2 |
[LLVMdev] Help needed on debugging llvm |
11:28AM |
0 |
[LLVMdev] Help needed on debugging llvm |
10:43AM |
2 |
[LLVMdev] Help needed on debugging llvm |
6:58AM |
0 |
[LLVMdev] How to detect all free() calls |
5:56AM |
2 |
[LLVMdev] How to detect all free() calls |
5:40AM |
0 |
[LLVMdev] possible MachObjectWriter bug (powerpc-darwin8) |
4:42AM |
0 |
[LLVMdev] YAML IO problems |
4:36AM |
0 |
[LLVMdev] Help needed on debugging llvm |
4:17AM |
2 |
[LLVMdev] How to detect all free() calls |
|
Sunday March 10 2013 |
Time | Replies | Subject |
8:38PM |
0 |
[LLVMdev] [lld] Atom and its unwind information |
9:14AM |
0 |
[LLVMdev] LLVM IR Editor Plugin for Eclipse - First Release |
4:00AM |
0 |
[LLVMdev] removal of an empty loop optimization? |
1:58AM |
2 |
[LLVMdev] AESOP autoparallelizing compiler |
12:26AM |
2 |
[LLVMdev] Running cross compiled binaries for ARM on gem5 |
|
Saturday March 9 2013 |
Time | Replies | Subject |
8:46PM |
0 |
[LLVMdev] Fw: message |
4:59PM |
1 |
[LLVMdev] Code morphing pass |
3:45PM |
0 |
[LLVMdev] Code morphing pass. |
9:26AM |
0 |
[LLVMdev] MCJIT and Lazy Compilation |
4:57AM |
1 |
[LLVMdev] Vector splitting vs widening |
2:04AM |
0 |
[LLVMdev] hazard scheduling nodes |
1:49AM |
1 |
[LLVMdev] Question about abstract subprograms in debug info |
1:35AM |
1 |
[LLVMdev] Does a recursive call have side effects? |
|
Friday March 8 2013 |
Time | Replies | Subject |
11:26PM |
0 |
[LLVMdev] [cfe-dev] [RFC] TileGX, a new backend for Tilera's many core processor |
10:29PM |
0 |
[LLVMdev] Bug in visitSIGN_EXTEND in DAGCombiner.cpp? |
7:13PM |
2 |
[LLVMdev] [RFC] TileGX, a new backend for Tilera's many core processor |
6:53PM |
2 |
[LLVMdev] Bug in visitSIGN_EXTEND in DAGCombiner.cpp? |
6:50PM |
0 |
[LLVMdev] Tool to convert to backend assembly instruction file |
10:31AM |
0 |
[LLVMdev] [RFC] TileGX, a new backend for Tilera's many core processor |
9:48AM |
0 |
[LLVMdev] How to use dropAllReferences in dropAllReferences |
4:49AM |
1 |
[LLVMdev] [vmkit] Errors compiling vmkt |
4:48AM |
2 |
[LLVMdev] Memory clean for applications using LLVM for JIT compilation |
4:43AM |
0 |
[LLVMdev] ARM assembler's syntax in clang |
3:53AM |
1 |
[LLVMdev] Tool to convert to backend assembly instruction file "llc" |
3:39AM |
2 |
[LLVMdev] Tool to convert to backend assembly instruction file |
|
Thursday March 7 2013 |
Time | Replies | Subject |
11:38PM |
1 |
[LLVMdev] Function permutation at IR bytecode level |
8:59PM |
2 |
[LLVMdev] ARM assembler's syntax in clang |
8:48PM |
2 |
[LLVMdev] [RFC] TileGX, a new backend for Tilera's many core processor |
5:52PM |
1 |
[LLVMdev] [cfe-dev] [RFC] TileGX, a new backend for Tilera's many core processor |
4:33PM |
0 |
[LLVMdev] [RFC] TileGX, a new backend for Tilera's many core processor |
11:39AM |
0 |
[LLVMdev] ARM assembler's syntax in clang |
7:44AM |
1 |
[LLVMdev] array of pointers |
|
Wednesday March 6 2013 |
Time | Replies | Subject |
9:40PM |
0 |
[LLVMdev] Vector splitting vs widening |
8:10PM |
0 |
[LLVMdev] Standalone use of compiler-rt for ARM |
5:31PM |
0 |
[LLVMdev] tbaa metadata representation |
4:31PM |
0 |
[LLVMdev] embedding trace functions to generate variable values |
3:59PM |
3 |
[LLVMdev] ARM assembler's syntax in clang |
1:53PM |
1 |
[LLVMdev] LLVM load instruction query |
1:44PM |
0 |
[LLVMdev] how to create LNT server for LLVM test-results |
1:39PM |
0 |
[LLVMdev] how to create LNT server for LLVM test-results |
10:39AM |
3 |
[LLVMdev] embedding trace functions to generate variable values |
6:06AM |
0 |
[LLVMdev] get maximum alignment size needed? |
5:28AM |
1 |
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot |
2:31AM |
1 |
[LLVMdev] TargetLowering::isIntImmLegal(...) |
12:55AM |
0 |
[LLVMdev] LangRef/implementation inconsistency: What is the intended constraint on function return types? |
|
Tuesday March 5 2013 |
Time | Replies | Subject |
9:42PM |
1 |
[LLVMdev] Cross-Compiling libc++ using newlib/Clang based Toolchain. |
9:26PM |
0 |
[LLVMdev] Issue with PrintStackTrace (probably a bug?) |
7:55PM |
0 |
[LLVMdev] LLVM Bay Area social: March! |
7:15PM |
0 |
[LLVMdev] "opt" exit code from LLVM pass |
6:23PM |
0 |
[LLVMdev] Vector splitting vs widening |
5:52PM |
0 |
[LLVMdev] parallel loop metadata simplification |
5:50PM |
4 |
[LLVMdev] Vector splitting vs widening |
5:49PM |
1 |
[LLVMdev] parallel loop metadata simplification |
5:12PM |
2 |
[LLVMdev] parallel loop metadata simplification |
3:43PM |
2 |
[LLVMdev] Bad Instruction 4 with fastcc |
1:38PM |
0 |
[LLVMdev] LLVM load instruction query |
1:37PM |
0 |
[LLVMdev] Convert C variable to LLVM IR Variable |
1:15PM |
0 |
[LLVMdev] LLVM load instruction query |
11:39AM |
0 |
[LLVMdev] LLVM load instruction query |
8:33AM |
0 |
[LLVMdev] Convert C variable to LLVM IR Variable |
8:21AM |
4 |
[LLVMdev] Convert C variable to LLVM IR Variable |
7:12AM |
3 |
[LLVMdev] tbaa metadata representation |
6:02AM |
5 |
[LLVMdev] LLVM load instruction query |
4:53AM |
0 |
[LLVMdev] how does llvm decide when to put something in the literal pool |
4:27AM |
0 |
[LLVMdev] ARM assembler's syntax in clang |
1:58AM |
1 |
[LLVMdev] Profiling LLVM JIT code |
12:56AM |
0 |
[LLVMdev] modulo scheduling |
12:16AM |
0 |
[LLVMdev] constant islands and the first executable instruction of a function |
12:10AM |
0 |
[LLVMdev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE? |
|
Monday March 4 2013 |
Time | Replies | Subject |
9:44PM |
0 |
[LLVMdev] Unexpected DSAnalysis behavior |
9:14PM |
1 |
[LLVMdev] Custom Lowering of ARM zero-extending loads |
7:54PM |
0 |
[LLVMdev] Profiling LLVM JIT code |
2:05PM |
2 |
[LLVMdev] Unexpected DSAnalysis behavior |
10:23AM |
2 |
[LLVMdev] llvm cannot iterate a [3 x i8] |
8:48AM |
2 |
[LLVMdev] ARM assembler's syntax in clang |
7:01AM |
0 |
[LLVMdev] AESOP autoparallelizing compiler |
4:24AM |
0 |
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot |
2:02AM |
2 |
[LLVMdev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE? |
1:51AM |
0 |
[LLVMdev] helpful pointer |
|
Sunday March 3 2013 |
Time | Replies | Subject |
8:28PM |
1 |
[LLVMdev] Can a Function Pass require a Module Pass? |
8:06PM |
0 |
[LLVMdev] AESOP autoparallelizing compiler |
7:58PM |
0 |
[LLVMdev] parallel loop metadata simplification |
6:50PM |
0 |
[LLVMdev] trouble with AsmPrinter registration |
6:46PM |
0 |
[LLVMdev] Effect of weak symbols on llvm tools/clang startup time |
5:54PM |
2 |
[LLVMdev] trouble with AsmPrinter registration |
5:49PM |
2 |
[LLVMdev] parallel loop metadata simplification |
5:32PM |
3 |
[LLVMdev] AESOP autoparallelizing compiler |
4:43PM |
0 |
[LLVMdev] parallel loop metadata simplification |
2:34PM |
2 |
[LLVMdev] parallel loop metadata simplification |
1:15PM |
0 |
[LLVMdev] loop metdata instruction |
12:34PM |
0 |
[LLVMdev] parallel loop metadata simplification |
11:10AM |
2 |
[LLVMdev] Profiling LLVM JIT code |
10:29AM |
0 |
[LLVMdev] parallel loop metadata simplification |
8:18AM |
0 |
[LLVMdev] AESOP autoparallelizing compiler |
7:01AM |
0 |
[LLVMdev] AESOP autoparallelizing compiler |
6:09AM |
6 |
[LLVMdev] AESOP autoparallelizing compiler |
5:14AM |
0 |
[LLVMdev] Question about method CodeExtractor::severSplitPHINodes |
2:35AM |
2 |
[LLVMdev] Question about method CodeExtractor::severSplitPHINodes |
1:39AM |
0 |
[LLVMdev] Question about method CodeExtractor::severSplitPHINodes |
|
Saturday March 2 2013 |
Time | Replies | Subject |
11:22PM |
2 |
[LLVMdev] Question about method CodeExtractor::severSplitPHINodes |
6:44PM |
4 |
[LLVMdev] parallel loop metadata simplification |
6:09PM |
1 |
[LLVMdev] memory leaks at compiler termination |
5:56PM |
0 |
[LLVMdev] memory leaks at compiler termination |
5:48PM |
0 |
[LLVMdev] Clang Plugin |
4:51PM |
0 |
[LLVMdev] code for static taint analysis |
3:31PM |
0 |
[LLVMdev] dragon egg + llvm for fortran to c translation |
2:51PM |
2 |
[LLVMdev] dragon egg + llvm for fortran to c translation |
1:19AM |
3 |
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor |
|
Friday March 1 2013 |
Time | Replies | Subject |
11:40PM |
0 |
[LLVMdev] machine constant pool/arm constant pool |
11:16PM |
3 |
[LLVMdev] memory leaks at compiler termination |
11:16PM |
1 |
[LLVMdev] Interesting post increment situation in DAG combiner |
11:10PM |
2 |
[LLVMdev] loop metdata instruction |
10:52PM |
0 |
[LLVMdev] Interesting post increment situation in DAG combiner |
10:37PM |
1 |
[LLVMdev] -debug tracing for fast isel |
9:25PM |
0 |
[LLVMdev] Timing the IRReader |
9:18PM |
1 |
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU |
9:05PM |
0 |
[LLVMdev] parallel loop metadata simplification |
8:51PM |
0 |
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU |
8:50PM |
0 |
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor |
8:05PM |
0 |
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU |
7:51PM |
4 |
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU |
7:44PM |
0 |
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU |
7:31PM |
2 |
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU |
5:23PM |
3 |
[LLVMdev] parallel loop metadata simplification |
5:13PM |
0 |
[LLVMdev] parallel loop metadata simplification |
4:49PM |
2 |
[LLVMdev] parallel loop metadata simplification |
4:35PM |
0 |
[LLVMdev] parallel loop metadata simplification |
4:24PM |
2 |
[LLVMdev] Interesting post increment situation in DAG combiner |
4:06PM |
2 |
[LLVMdev] parallel loop metadata simplification |
4:02PM |
0 |
[LLVMdev] dragon egg + llvm for fortran to c translation |
2:52PM |
2 |
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor |
2:42PM |
0 |
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor |
2:23PM |
5 |
[LLVMdev] dragon egg + llvm for fortran to c translation |
1:46PM |
1 |
[LLVMdev] llvm get annotations |
12:41PM |
0 |
[LLVMdev] llvm get annotations |
9:43AM |
0 |
[LLVMdev] How to set linker in cmake of llvm project? |
8:37AM |
0 |
[LLVMdev] Euro-LLVM call for papers - last day! |
7:56AM |
0 |
[LLVMdev] Calling with register indirect reference instead of memory indirect reference. |
7:34AM |
3 |
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor |
6:57AM |
0 |
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor |
2:33AM |
0 |
[LLVMdev] parallel loop metadata simplification |
12:09AM |
2 |
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor |