llvm dev - Feb 2013 - [LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot

Hi All.

I'm writing storeRegToStackSlot and loadFromStackSlot function for my 
Target. This Target can store/load one byte (not all word) from 
FrameIndex. If I need to store 16 bit register I will must to split it 
to two instruction like this:

BuildMI(MBB, MI, dl, get(Z80::LD8xmr))
   .addFrameIndex(FrameIndex).addImm(0)
   .addReg(SrcReg, 0, Z80::subreg_lo);
BuildMI(MBB, MI, dl, get(Z80::LD8xmr))
   .addFrameIndex(FrameIndex).addImm(1)
   .addReg(SrcReg, getKillRegState(isKill), Z80::subreg_hi);

After this store I catch assertion failed: "Instruction not found in 
maps", because only last of this instruction added in Instruction maps.
How can I avoid assertion failed in this case?

Best regards, Dmitriy.

Hi Dmitriy,

As you've seen our current spill code assumes that spill/reloads are single
instructions. I think the best way to work around this is to introduce
load/store pseudo-instructions and expand these after register allocation.

Cheers,
Lang.


On Sat, Feb 23, 2013 at 12:15 AM, Dmitriy Limonov <earl at excluzive.ws>
wrote:
> Hi All.
>
> I'm writing storeRegToStackSlot and loadFromStackSlot function for my
> Target. This Target can store/load one byte (not all word) from FrameIndex.
> If I need to store 16 bit register I will must to split it to two
> instruction like this:
>
> BuildMI(MBB, MI, dl, get(Z80::LD8xmr))
>   .addFrameIndex(FrameIndex).**addImm(0)
>   .addReg(SrcReg, 0, Z80::subreg_lo);
> BuildMI(MBB, MI, dl, get(Z80::LD8xmr))
>   .addFrameIndex(FrameIndex).**addImm(1)
>   .addReg(SrcReg, getKillRegState(isKill), Z80::subreg_hi);
>
> After this store I catch assertion failed: "Instruction not found in
> maps", because only last of this instruction added in Instruction
maps.
> How can I avoid assertion failed in this case?
>
> Best regards, Dmitriy.
>
> ______________________________**_________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>
http://lists.cs.uiuc.edu/**mailman/listinfo/llvmdev<http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20130303/291d446a/attachment.html>

Hi Lang.

Thank you. I added pseudo-instructions for spill/reloads and expanded it 
in expandPostRAPseudo.

Regards,
Dmitriy.


04.03.2013 8:24, Lang Hames wrote:
> Hi Dmitriy,
>
> As you've seen our current spill code assumes that spill/reloads are 
> single instructions. I think the best way to work around this is to 
> introduce load/store pseudo-instructions and expand these after 
> register allocation.
>
> Cheers,
> Lang.
>
>
> On Sat, Feb 23, 2013 at 12:15 AM, Dmitriy Limonov <earl at excluzive.ws 
> <mailto:earl at excluzive.ws>> wrote:
>
>     Hi All.
>
>     I'm writing storeRegToStackSlot and loadFromStackSlot function for
>     my Target. This Target can store/load one byte (not all word) from
>     FrameIndex. If I need to store 16 bit register I will must to
>     split it to two instruction like this:
>
>     BuildMI(MBB, MI, dl, get(Z80::LD8xmr))
>       .addFrameIndex(FrameIndex).addImm(0)
>       .addReg(SrcReg, 0, Z80::subreg_lo);
>     BuildMI(MBB, MI, dl, get(Z80::LD8xmr))
>       .addFrameIndex(FrameIndex).addImm(1)
>       .addReg(SrcReg, getKillRegState(isKill), Z80::subreg_hi);
>
>     After this store I catch assertion failed: "Instruction not found
>     in maps", because only last of this instruction added in
>     Instruction maps.
>     How can I avoid assertion failed in this case?
>
>     Best regards, Dmitriy.
>
>     _______________________________________________
>     LLVM Developers mailing list
>     LLVMdev at cs.uiuc.edu <mailto:LLVMdev at cs.uiuc.edu>
>     http://llvm.cs.uiuc.edu
>     http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20130306/f4c491bc/attachment.html>