llvm dev - Jan 2011 - [LLVMdev] Trouble with virtual registers

I'm having trouble with virtual registers/register allocation in my
back-end. Basically the FastRegAlloc pass is generating calls to
storeToStackSlot and loadFromStackSlot, in which we build new machine
instructions, which are then _not_ processed by the reg allocator. I
understand that BuildMI is changing the list of MachInst. that the allocator
is iterating over, but we need to have a new virtual register as part of the
stack store process since we don't have indirect adressing. Should we be
creating a physical register directly somehow, or can we perhaps signal to
the allocator that the basic block's contents are updated?

Below is our storeRegToStackSlot, the ADDri instruction is transformed into
a copy-add pair in eliminateFrameIndex.

void OurTargetInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator MI,
                                          unsigned SrcReg, bool isKill, int
FrameIdx,
                                          const TargetRegisterClass *RC,
                                          const llvm::TargetRegisterInfo*)
const {
  DebugLoc DL;
  if (MI != MBB.end()) DL = MI->getDebugLoc();
  MachineFunction &MF = *MBB.getParent();
  MachineFrameInfo &MFI = *MF.getFrameInfo();

  MachineMemOperand *MMO    
MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FrameIdx),
                            MachineMemOperand::MOStore, 0,
                            MFI.getObjectSize(FrameIdx),
                            MFI.getObjectAlignment(FrameIdx));

  unsigned tmpVReg
MF.getRegInfo().createVirtualRegister(OURTARGET::IntRegsRegisterClass);
  MachineInstr* mi = BuildMI(MBB, MI, DL, get(OURTARGET::ADDri),
tmpVReg).addFrameIndex(FrameIdx).addImm(0);
  BuildMI(MBB, MI, DL,
get(OURTARGET::STORE)).addReg(tmpVReg).addReg(SrcReg).addMemOperand(MMO);
}

Thanks a lot!
Per
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On Jan 25, 2011, at 3:09 AM, Per Fagrell wrote:
> I'm having trouble with virtual registers/register allocation in my
back-end. Basically the FastRegAlloc pass is generating calls to
storeToStackSlot and loadFromStackSlot, in which we build new machine
instructions, which are then _not_ processed by the reg allocator. I understand
that BuildMI is changing the list of MachInst. that the allocator is iterating
over, but we need to have a new virtual register as part of the stack store
process since we don't have indirect adressing. Should we be creating a
physical register directly somehow, or can we perhaps signal to the allocator
that the basic block's contents are updated?
The fast allocator could be spilling because it has run out of registers, so
that is a really bad time to be creating new virtual registers.

You have two options:

1. Reserve a scratch register for use in spill code, or

2. Emit a pseudo-instruction for the spill, and get a register from the register
scavenger during eliminateFrameIndex().

Look at the Blackfin and ARM targets for how to use the register scavenger.

/jakob

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