search for: storeregtostackslot

Displaying 20 results from an estimated 87 matches for "storeregtostackslot".

2009 Jan 23
2
[LLVMdev] Can TargetInstrInfo::storeRegToStackSlot use temp/virtual regs?
Hi, I'm implementing storeRegToStackSlot() and, in order to store some specific registers (floating point regs and address regs) I've to copy them to more standard regs and copy these last ones to the slot. I tried to generate instructions that use physical registers, but by doing that I overwrote registers already assigned by the reg...
2019 Nov 05
2
InlineSpiller - hoists leave virtual registers without live intervals
...t; > wrote: > > > > /// Optimizations after all the reg selections and spills are done. > > void InlineSpiller::postOptimization() { HSpiller.hoistAllSpills(); > > } > > > > Seems a problematic function to me, as hoistAllSpills() uses > > TII.storeRegToStackSlot() to insert new spills. > > > > The problem is, TII.storeRegToStackSlot is allowed to create new virtual > > registers, which can not be allocated a range as this whole thing is > called > > _after_ all reg selection is complete. > > > > If I'm right in th...
2009 Jan 26
0
[LLVMdev] Can TargetInstrInfo::storeRegToStackSlot use temp/virtual regs?
On Jan 23, 2009, at 3:28 AM, Mondada Gabriele wrote: > Hi, > I'm implementing storeRegToStackSlot() and, in order to store some > specific registers (floating point regs and address regs) I've to > copy them to more standard regs and copy these last ones to the slot. > I tried to generate instructions that use physical registers, but by > doing that I overwrote registers a...
2009 Jan 27
2
[LLVMdev] Can TargetInstrInfo::storeRegToStackSlot use temp/virtual regs?
Dan Gohman a écrit : > On Jan 23, 2009, at 3:28 AM, Mondada Gabriele wrote: > > >> Hi, >> I'm implementing storeRegToStackSlot() and, in order to store some >> specific registers (floating point regs and address regs) I've to >> copy them to more standard regs and copy these last ones to the slot. >> I tried to generate instructions that use physical registers, but by >> doing that I overw...
2017 Feb 17
7
RFC: Setting MachineInstr flags through storeRegToStackSlot
...arfDebug::findPrologueEndLoc will return the wrong result if the flag isn't consistently set on frame setup code. The problem is that unless you override TargetFrameLowering::spillCalleeSavedRegisters, then PrologEpilogInserter will just spill callee saved registers through a series of calls to storeRegToStackSlot. This is fine, except storeRegToStackSlot won't set the FrameSetup flag. [1]: Actually X86 will only skip over PUSH instructions with the FrameSetup flag. Is this extra condition necessary? ## Potential solutions 1) Keep the status quo, but modify PrologEpilogInserter so it will mark the la...
2008 Oct 22
2
[LLVMdev] clobbering other physical registers in storeRegtoStackSlot.
In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some other physical register which may be holding a live value used somewhere else. How do I make regalloc aware so that it saves the value before storeRegToStackSlot and make it available again at the point of earlier use? TIA, Sanjiv -------------- next part ------...
2008 Oct 23
0
[LLVMdev] clobbering other physical registers in storeRegtoStackSlot.
On Oct 22, 2008, at 11:09 AM, Sanjiv.Gupta at microchip.com wrote: > In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some > other physical register which may be holding a live value used > somewhere else. How do I make regalloc aware so that it saves the > value before storeRegToStackSlot and make it available again at the > point of earlier use? > Typical so...
2008 Oct 28
1
[LLVMdev] clobbering other physical registers in storeRegtoStackSlot.
On Thu, 2008-10-23 at 11:17 -0700, Evan Cheng wrote: > > On Oct 22, 2008, at 11:09 AM, Sanjiv.Gupta at microchip.com wrote: > > > In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some > > other physical register which may be holding a live value used > > somewhere else. How do I make regalloc aware so that it saves the > > value before storeRegToStackSlot and make it available again at the > > point of earlier use? >...
2017 Feb 21
3
RFC: Setting MachineInstr flags through storeRegToStackSlot
...gt; -----Original Message----- > From: mbraun at apple.com [mailto:mbraun at apple.com] > Sent: Friday, February 17, 2017 3:15 PM > To: Alex Bradbury > Cc: llvm-dev; Adrian Prantl; Eric Christopher; Robinson, Paul > Subject: Re: [llvm-dev] RFC: Setting MachineInstr flags through > storeRegToStackSlot > > Can someone familiar with debug info comment on whether it matters to have > the FrameSetup flag on the callee save spills? We could have a smart spill > or shrink wrapping algorithm that delays the callee saves to a later point > in the program while executing non-prologue code...
2019 Nov 03
2
InlineSpiller - hoists leave virtual registers without live intervals
/// Optimizations after all the reg selections and spills are done. void InlineSpiller::postOptimization() { HSpiller.hoistAllSpills(); } Seems a problematic function to me, as hoistAllSpills() uses TII.storeRegToStackSlot() to insert new spills. The problem is, TII.storeRegToStackSlot is allowed to create new virtual registers, which can not be allocated a range as this whole thing is called _after_ all reg selection is complete. If I'm right in this, I do not see how the in-tree target AMDGPU::SI has not been...
2013 Mar 06
1
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot
...store pseudo-instructions and expand these after > register allocation. > > Cheers, > Lang. > > > On Sat, Feb 23, 2013 at 12:15 AM, Dmitriy Limonov <earl at excluzive.ws > <mailto:earl at excluzive.ws>> wrote: > > Hi All. > > I'm writing storeRegToStackSlot and loadFromStackSlot function for > my Target. This Target can store/load one byte (not all word) from > FrameIndex. If I need to store 16 bit register I will must to > split it to two instruction like this: > > BuildMI(MBB, MI, dl, get(Z80::LD8xmr)) > .addF...
2013 Feb 23
2
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot
Hi All. I'm writing storeRegToStackSlot and loadFromStackSlot function for my Target. This Target can store/load one byte (not all word) from FrameIndex. If I need to store 16 bit register I will must to split it to two instruction like this: BuildMI(MBB, MI, dl, get(Z80::LD8xmr)) .addFrameIndex(FrameIndex).addImm(0) .addReg(Sr...
2006 May 15
1
[LLVMdev] Re: MRegisterInfo::storeRegToStackSlot question
...9; >> parameter, that is not documented. >> >> Can somebody explain what does it mean? > > Basically, it gives the target more information about the spill. In > particular, it specifies the register class to use for the copy. I'm still missing something. The 'storeRegToStackSlot' saves 'SrcReg' (already specified) to stack (which is not a register). So, what does this register class applies to? Examining RegAllocLocal.cpp suggests that the argument actually specifies the register class of the spilled virtual register. Can you give some examples how that infor...
2013 Mar 04
0
[LLVMdev] Assertion failed after my storeRegToStackSlot/loadFromStackSlot
...are single instructions. I think the best way to work around this is to introduce load/store pseudo-instructions and expand these after register allocation. Cheers, Lang. On Sat, Feb 23, 2013 at 12:15 AM, Dmitriy Limonov <earl at excluzive.ws> wrote: > Hi All. > > I'm writing storeRegToStackSlot and loadFromStackSlot function for my > Target. This Target can store/load one byte (not all word) from FrameIndex. > If I need to store 16 bit register I will must to split it to two > instruction like this: > > BuildMI(MBB, MI, dl, get(Z80::LD8xmr)) > .addFrameIndex(FrameIndex...
2006 May 13
2
[LLVMdev] MRegisterInfo::storeRegToStackSlot question
Hi, in LLVM CVS the afore-mentioned function has 'const TargetRegisterClass*' parameter, that is not documented. Can somebody explain what does it mean? Thanks, Volodya
2006 May 14
0
[LLVMdev] MRegisterInfo::storeRegToStackSlot question
On Sat, 13 May 2006, Vladimir Prus wrote: > in LLVM CVS the afore-mentioned function has 'const TargetRegisterClass*' > parameter, that is not documented. > > Can somebody explain what does it mean? Basically, it gives the target more information about the spill. In particular, it specifies the register class to use for the copy. The target can choose to ignore this if it
2015 Mar 18
2
[LLVMdev] missing register spills?
Hi folks, I'm running into this weird issue where the register spills appear to be missing for an "if" block for some reason. For example, the original if/else blocks: --- if reg0 // storeRegToStackSlot for reg1 // do something - missing a load for reg1? else // storeRegToStackSlot for reg1 // do something // loadRegFromStackSlot for reg1 end ---- I tried looking in the LLVM spiller code but it looked like the load should have already been generated at that point. Any suggestions on what I shoul...
2018 Jan 30
3
Disable spilling sub-registers in LLVM
Right Matthias, I am aware that an implementation for storeRegToStackSlot()/loadRegFromStackSlot() is necessary. But these functions receive the physical register that need to be spilled, they might receive the sub-register. In this case, using the super-register naively is unsafe (e.g., one might overwrite parts of it). Thus, I think the register allocator/spillar n...
2006 May 23
4
[LLVMdev] Spilling register and frame indices
Hi, right now, LLVM does register spilling by: 1. Creating stack object 2. Passing index of that stack object to MRegisterInfo::storeRegToStackSlot 3. At later stage, frame indices are replaced by calling to MRegisterInfo::eliminateFrameIndex. This works for me, but there's slight problem. The target does not have "register + contant" addressing mode, so accessing frame index should be done like this: some_register = frame_p...
2018 Jan 30
0
Disable spilling sub-registers in LLVM
To make my point clear, I believe an implementation of storeRegToStackSlot()/loadRegFromStackSlot() is not sufficient (as it received the physical register already). Does this make sense? On 2018-01-30 13:33, ahmede wrote: > Right Matthias, I am aware that an implementation for > storeRegToStackSlot()/loadRegFromStackSlot() is necessary. But these > functions r...