Andrew Ruef
2012-Aug-13 16:02 UTC
[LLVMdev] x86 REP-prefixed instructions seem to be dropped by instruction decoder?
I think there's a bug somewhere in TableGen for the X86 disassembler emitter. The following test: $ echo "0xF3 0xA5" | ./bin/llvm-mc -disassemble .section __TEXT,__text,regular,pure_instructions movsd (from llvm trunk) 0xF3 is the REP prefix, so the printed instruction should be 'rep movsd', however all that is printed is 'movsd'. It seems that there is an instruction enum for REP_MOVSD, but it isn't emitted in the generated .inc file? Is this a bug/oversight, or is there something I don't understand about the instruction decoding infrastructure and the MCInst class?
Rafael EspĂndola
2012-Aug-14 21:34 UTC
[LLVMdev] x86 REP-prefixed instructions seem to be dropped by instruction decoder?
On 13 August 2012 12:02, Andrew Ruef <awruef at umd.edu> wrote:> I think there's a bug somewhere in TableGen for the X86 disassembler > emitter. The following test: > > $ echo "0xF3 0xA5" | ./bin/llvm-mc -disassemble > .section __TEXT,__text,regular,pure_instructions > movsd > > (from llvm trunk) > > 0xF3 is the REP prefix, so the printed instruction should be 'rep > movsd', however all that is printed is 'movsd'. It seems that there is > an instruction enum for REP_MOVSD, but it isn't emitted in the > generated .inc file? Is this a bug/oversight, or is there something I > don't understand about the instruction decoding infrastructure and the > MCInst class?It looks like a bug. Would you mind reporting it in llvm.org/bugs? Thanks. Cheers, Rafael
Craig Topper
2012-Aug-14 21:47 UTC
[LLVMdev] x86 REP-prefixed instructions seem to be dropped by instruction decoder?
It's an already filed bug. http://llvm.org/bugs/show_bug.cgi?id=7709 On Tue, Aug 14, 2012 at 2:34 PM, Rafael EspĂndola < rafael.espindola at gmail.com> wrote:> On 13 August 2012 12:02, Andrew Ruef <awruef at umd.edu> wrote: > > I think there's a bug somewhere in TableGen for the X86 disassembler > > emitter. The following test: > > > > $ echo "0xF3 0xA5" | ./bin/llvm-mc -disassemble > > .section __TEXT,__text,regular,pure_instructions > > movsd > > > > (from llvm trunk) > > > > 0xF3 is the REP prefix, so the printed instruction should be 'rep > > movsd', however all that is printed is 'movsd'. It seems that there is > > an instruction enum for REP_MOVSD, but it isn't emitted in the > > generated .inc file? Is this a bug/oversight, or is there something I > > don't understand about the instruction decoding infrastructure and the > > MCInst class? > > It looks like a bug. Would you mind reporting it in llvm.org/bugs? Thanks. > > Cheers, > Rafael > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >-- ~Craig -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120814/d6f46ae0/attachment.html>
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