Hi all, I was wondering what was promote element pass doing ? It seems that it has been turned on by default in llc since LLVM 3.1 and it exposes a lot of BUG for ARM target. Not sure those are ARM backend bugs or promote elements bugs. However ARM BUGS are not release blockers, it is a significant regression versus LLVM 3.0. Can this be disabled by default for ARM target ? Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120703/f13f6685/attachment.html>
Hi Sebastien,> I was wondering what was promote element pass doing ?maybe you mean the logic that tries to turn illegal vector types into legal vector types by turning (for example) <4 x i16> into <4 x i32> when <4 x i16> is an illegal type but <4 x i32> is legal? The logic used to be to turn <4 x i16> into <8 x i16> when <8 x i16> is legal, but on the whole making the element type bigger (i16 -> i32) results in better code than making the vector longer (4 x -> 8 x) which is why it is now the default. Ciao, Duncan.> It seems that it has been turned on by default in llc since LLVM 3.1 and it > exposes a lot of BUG for ARM target. > > Not sure those are ARM backend bugs or promote elements bugs. However ARM BUGS > are not release blockers, it is a significant regression versus LLVM 3.0. > > Can this be disabled by default for ARM target ? > > Best Regards > > Seb > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >
> It seems that it has been turned on by default in llc since LLVM 3.1 and it > exposes a lot of BUG for ARM target. > > Not sure those are ARM backend bugs or promote elements bugs. However ARM > BUGS are not release blockers, it is a significant regression versus LLVM > 3.0.I had the same feeling. Vector promotion was tested on x86 only, so the bugs on ARM are expected (regardless whether they are bugs exposed in ARM backend or in vector promotion itself). Unfortunately, the author of the pass has no interest in touching ARM at all...> Can this be disabled by default for ARM target ?Right now we do not have even a flag to disable it... I'd suggest start filling bugs for the problems, so, to make them known at least. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University