search for: i16

Displaying 20 results from an estimated 1550 matches for "i16".

Did you mean: 16
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
...ct.__sFILE*, %struct.__sFILE*, i32, [25 x i8], i32, i8*, i32, void (%struct._reent*)*, %struct._Bigint*, i32, %struct._Bigint*, %struct._Bigint**, i32, i8*, %union.anon.0, %struct._atexit*, %struct._atexit, void (i32)**, %struct._glue, [3 x %struct.__sFILE] } %struct.__sFILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (%struct._reent*, i8*, i8*, i32)*, i32 (%struct._reent*, i8*, i8*, i32)*, i32 (%struct._reent*, i8*, i32, i32)*, i32 (%struct._reent*, i8*)*, %struct.__sbuf, i8*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i32, %struct._reent*, i32, %struct._mbstate_t, i32 } %...
2012 Nov 26
2
[LLVMdev] LSR pass
...target. I wonder if there is any way to tell LSR to not duplicate the code in cases like this? Or could I perhaps run CSE after LSR again? What is the logic behind this transformation? It seems that a LSR pass should not insert a multiplication, generally..? Thanks, Jonas %_tmp44 = ptrtoint i16* par1 to i16 %_tmp51 = ptrtoint i16* par2 to i16 ... inside loop: *** IR Dump After Canonicalize natural loops *** bb7: (header) ; preds = %bb7.lr.ph, %bb11 %_tmp39 = sub i16 %_tmp35, %_tmp38 %2 = mul i16 %_tmp39, -10 %_tmp41 = add i16 %2, %subframe...
2016 Mar 30
2
Instruction selection pattern for intrinsic returning llvm_any_ty
...; On Mar 30, 2016, at 09:33, Mikael Holmén via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Hi, >> >> On my out-of-tree target I have an intrinsic >> >> def int_phx_divm_u16 : Intrinsic<[llvm_any_ty], >> [llvm_i16_ty, llvm_i16_ty], >> [IntrNoMem]>; >> >> that I want to translate to the following instruction during instruction selection: >> >> def divm16_pseudo : MyPseudoInst< >> (outs aNh_0_7:$dst, aNh_0_7:$dst2), >> (in...
2016 Mar 30
2
Instruction selection pattern for intrinsic returning llvm_any_ty
Hi, On my out-of-tree target I have an intrinsic def int_phx_divm_u16 : Intrinsic<[llvm_any_ty], [llvm_i16_ty, llvm_i16_ty], [IntrNoMem]>; that I want to translate to the following instruction during instruction selection: def divm16_pseudo : MyPseudoInst< (outs aNh_0_7:$dst, aNh_0_7:$dst2), (ins aNh_0_7:$src1, aNh_0_7:$src2)>; So I've done a...
2015 Jan 23
2
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
...isable LICM promotion, the tests pass. > > > > Find attached a reduced test case. > > > > clang -c --target=aarch64-linux-gnu -mcpu=cortex-a57 -Ofast -mllvm > -use-cfl-aa -S test2.c -o test2out -mllvm -debug-only=licm > > LICM: Promoting value stored to in loop: i16* getelementptr inbounds ([16 > x i16]* @pA, i64 0, i64 1) > > LICM: Promoting value stored to in loop: i16* getelementptr inbounds ([16 > x i16]* @pA, i64 0, i64 2) > > LICM: Promoting value stored to in loop: i16* getelementptr inbounds ([16 > x i16]* @pA, i64 0, i64 3) > &...
2015 Jan 24
2
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
No, i mean the actual store instruction looks like "store i16 %conv22, i16* getelementptr inbounds ([16 x i16]* @pA, i64 0, i64 12), align 2, !tbaa !1" Not that the pointer operand comes from a GEP, but it is a constantexpr, whose opcode is GEP. It sucks that there is such a complex thing to be handled as a store operand directly , but such is life .....
2008 Sep 08
2
[LLVMdev] Overzealous PromoteCastOfAllocation
...HO, a better policy is needed. Another problem that occurs here, is that this transformation can replace a struct alloca with a single integer alloca. This, in turn, can confuse other passes like scalarrepl, and produce but ugly code. I've assembled a small example of this. declare void @bar(i16, i16) define internal void @empty(i32* %X) { ret void } define void @foo(i16 %A, i16 %B) { entry: ;; Alloc a struct %V = alloca {i16, i16} ;; Save our arguments into it %V1 = getelementptr {i16, i16}* %V, i32 0, i32 0 %V2 = getelementptr {i16, i16}* %V, i32 0, i32 1 store i16 %A...
2011 May 03
3
[LLVMdev] GVN Infinite loop
...ached the output of one iteration. I cant seem to reduce the testcase either. Any pointers to how to reduce the test case. THanks, Arushi GVN iteration: 8 GVN WIDENED LOAD: %0 = load i8* getelementptr inbounds (%struct.CHESS_POSITION* @search, i64 0, i32 23), align 2, !dbg !875 TO: %1 = load i16* bitcast (i8* getelementptr inbounds (%struct.CHESS_POSITION* @search, i64 0, i32 23) to i16*), align 2 GVN COERCED INST: %0 = load i8* getelementptr inbounds (%struct.CHESS_POSITION* @search, i64 0, i32 23), align 2, !dbg !875 %1 = load i16* bitcast (i8* getelementptr inbounds (%struct.CHESS_P...
2016 Mar 30
0
Instruction selection pattern for intrinsic returning llvm_any_ty
> On Mar 30, 2016, at 09:33, Mikael Holmén via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > On my out-of-tree target I have an intrinsic > > def int_phx_divm_u16 : Intrinsic<[llvm_any_ty], > [llvm_i16_ty, llvm_i16_ty], > [IntrNoMem]>; > > that I want to translate to the following instruction during instruction selection: > > def divm16_pseudo : MyPseudoInst< > (outs aNh_0_7:$dst, aNh_0_7:$dst2), > (ins aNh_0_7:$src1, aNh_0_7:$src...
2013 Jan 18
2
[LLVMdev] Weird volatile propagation ?
...> struct R { uint16_t a; uint16_t b; }; volatile struct R * const addr = (volatile struct R *) 416; void test(uint16_t a) { struct R r = { a, 1 }; *addr = r; } $ clang -O2 -o - -emit-llvm -S -c test.c ; ModuleID = 'test.c' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.R = type { i16, i16 } @addr = constant %struct.R* inttoptr (i64 416 to %struct.R*), align 8 define void @test(i16...
2014 Sep 30
2
[LLVMdev] Behaviour of NVPTX intrinsic
I have written test.ll as below and ran 'opt' on it as " opt -std-compile-opts test.ll -S -o -" . But the output shows that there is code motion around the barrier intrinsics. test.ll ------- ; ModuleID = 'test.bc' define void @test(i16* %I_0, i16* %I_1, i16* %I_2, i16* %I_3, i16* %O_0) { entry: %T_0 = load volatile i16* %I_0 %T_1 = load volatile i16* %I_1 %T_2 = load volatile i16* %I_2 %T_3 = load volatile i16* %I_3 call void @llvm.nvvm.barrier0() %T_5 = add i16 %T_1, %T_3 call void @llvm.nvvm.barrier0() %T_7 = mu...
2016 Mar 30
2
Instruction selection pattern for intrinsic returning llvm_any_ty
Hi, On 03/30/2016 11:38 AM, Matt Arsenault wrote: > >> On Mar 30, 2016, at 11:35, Mikael Holmén <mikael.holmen at ericsson.com >> <mailto:mikael.holmen at ericsson.com>> wrote: >> >> i16 (divm16_pseudo …) >> >> stuff? >> >> I've tried >> (i16, i16 (divm16_pseudo i16:$src1, i16:$src2) >> and >> ((i16, i16) (divm16_pseudo i16:$src1, i16:$src2) >> and a few other variants without managing to get it through. >> >> Thanks a...
2015 Jan 23
2
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
...> >>> > > > Yeah, this was a mistake (Chandler had suggested it was right >>> > > > earlier, but we were both wrong :P) >>> > > > >>> > > > >>> > > > >>> > > > ; CHECK: PartialAlias: i16* %bigbase0, i8* %phi >>> > > > -define i8 @test0(i8* %base, i1 %x) { >>> > > > +define i8 @test0(i1 %x) { >>> > > > entry: >>> > > > + %base = alloca i8, align 4 >>> > > > %baseplusone = getelementptr i8*...
2015 Aug 07
2
load instruction erroneously removed by GVN
Hi, I'm having a problem with GVN removing a load instruction that I think is needed. Dump before GVN: *** IR Dump Before Global Value Numbering *** ; Function Attrs: minsize optsize define i16 @TEST__MAIN(i16 %argc.13.par, i16** %argv.14.par) #0 { %buf.17 = alloca [10 x i16], align 1 %_tmp30 = getelementptr inbounds [10 x i16], [10 x i16]* %buf.17, i16 0, i16 0, !dbg !22 call fastcc void @format_long(i16* %_tmp30, i16 10, i32 10), !dbg !22 %_tmp32 = getelementptr [10 x i16],...
2015 Jan 26
2
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
...gess IV" < > george.burgess.iv at gmail.com> > > Sent: Friday, January 23, 2015 7:14:24 PM > > Subject: Re: [LLVMdev] question about enabling cfl-aa and collecting a57 > numbers > > > > > > No, i mean the actual store instruction looks like "store i16 > > %conv22, i16* getelementptr inbounds ([16 x i16]* @pA, i64 0, i64 > > 12), align 2, !tbaa !1" > > > > > > Not that the pointer operand comes from a GEP, but it is a > > constantexpr, whose opcode is GEP. > > Ah, yep. We have ConstantExpr analogs fo...
2018 May 04
0
How to constraint instructions reordering from patterns?
Here is a last example to illustrate my concern. The problem is about the lowering of node t13. Initial selection DAG: BB#0 '_start:entry' SelectionDAG has 44 nodes: t11: i16 = Constant<0> t0: ch = EntryToken t3: ch = llvm.clp.set.rspa t0, TargetConstant:i16<392>, Constant:i32<64> t5: ch = llvm.clp.set.rspb t3, TargetConstant:i16<393>, Constant:i32<64> t8: ch = llvm.clp.set.rspsu t...
2011 May 04
0
[LLVMdev] GVN Infinite loop
...o file a bug with whatever you have. This is likely to be a recent regression. -Chris > > THanks, > Arushi > > GVN iteration: 8 > GVN WIDENED LOAD: %0 = load i8* getelementptr inbounds (%struct.CHESS_POSITION* @search, i64 0, i32 23), align 2, !dbg !875 > TO: %1 = load i16* bitcast (i8* getelementptr inbounds (%struct.CHESS_POSITION* @search, i64 0, i32 23) to i16*), align 2 > GVN COERCED INST: > %0 = load i8* getelementptr inbounds (%struct.CHESS_POSITION* @search, i64 0, i32 23), align 2, !dbg !875 > %1 = load i16* bitcast (i8* getelementptr inbounds (...
2016 Jul 20
2
load instruction erroneously removed by GVN v2
...ioned this as I saw identical title before. I'm compiling a clang project where I'm seeing GVN mess up and replace a load with a wrong def value. I am using LLVM-3.5, but the problem has been observed upto 3.8. To illustrate the problem, define i32 @main scalar.ph: <initialize [80 x i16] %dest> ... preheader: %index=0 br test, loop1, bb2 loop1: ... write to %dest in increasing index // ptr-based while loop %ptr++; br test, loop1, bb2 bb2: %lcssa = phi [%ptr, loop1], [%ptr, preheader] store i16 0, i16* %lcssa !dbg !20094 !tbaa 20030 // write null byte at end %76 = g...
2019 Jun 05
2
Strange behaviour of post-legalising optimisations(?)
...ar *tst( char *dest, const char *src, unsigned int len ) { for (int i=0 ; i<len ; i++) { dest[i] = src[i]; } return dest; } Clang generates this for the ‘for’ body: for.body: ; preds = %for.cond %arrayidx = getelementptr inbounds i8, i8* %src, i16 %i.0 %0 = load i8, i8* %arrayidx, align 1, !tbaa !2 %arrayidx1 = getelementptr inbounds i8, i8* %dest, i16 %i.0 store i8 %0, i8* %arrayidx1, align 1, !tbaa !2 %inc = add nuw nsw i16 %i.0, 1 br label %for.cond This gets converted into this by llc: Creating new node: t2: i16,ch = CopyFrom...
2018 May 04
2
How to constraint instructions reordering from patterns?
...zysztof On 5/4/2018 8:18 AM, Dominique Torette via llvm-dev wrote: > Here is a last example to illustrate my concern. > > The problem is about the lowering of node t13. > > Initial selection DAG: BB#0 '_start:entry' > > SelectionDAG has 44 nodes: > >   t11: i16 = Constant<0> > >                   t0: ch = EntryToken > >                 t3: ch = llvm.clp.set.rspa t0, TargetConstant:i16<392>, > Constant:i32<64> > > t5: ch = llvm.clp.set.rspb t3, TargetConstant:i16<393>, Constant:i32<64> > >   ...