search for: seb

Displaying 20 results from an estimated 426 matches for "seb".

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2007 Dec 29
1
[LLVMdev] svn broken on cygwin
Function.cpp:167: error: call of overloaded `AddInteger(uint32_t&)' is ambiguous /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:151: note: candidates are: void llv m::FoldingSetImpl::NodeID::AddInteger(int) /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:152: note: void llvm::FoldingSetIm pl::NodeID::AddInteger(unsigned int) /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:153: note: void llvm:...
2012 Mar 07
3
[LLVMdev] Problem with x86 32-bit debug information ?
...ing me some indication that it won't solve my problem and that we are failing into option (2). So to summarize, I would be nice if someone can confirm that debug informations generated on this specific case are correct for x86 32-bit and that I would have to deal with that. Thanks Best Regards Seb 2012/3/7 James Molloy <james.molloy at arm.com> > Hi Seb,**** > > ** ** > > I’m going to reiterate – Clang can decide when it wants to optimise away a > variable. You asked for that behaviour when you specified –O2. You can’t > expect deterministically the same behavio...
2004 Dec 19
1
Error indexing mbox file /var/mail/seb: LF not found where expected
Howdy all, Dec 19 14:24:53 dev imap(seb): Error indexing mbox file /var/mail/seb: LF not found where expected I just installed version dovecot-0.99.12.1 for the first time on FreeBSD 4.10 stable. This error occurs when I try to check my mail from a remote client and I have new messages. Here is my configuration: http://unf.be/dovecot.c...
2012 Feb 29
2
[LLVMdev] Is it an opt bug ?
Hi Seb, > Already done here : http://llvm.org/bugs/show_bug.cgi?id=12130 that doesn't describe the original issue (second store removed), it is talking about a different issue that appeared at -O1 (and it first seemed to explain your original problem; but now I think the -O1 transform was correct...
2012 Mar 08
0
[LLVMdev] Problem with x86 32-bit debug information ?
On Wed, Mar 7, 2012 at 6:50 AM, Seb <babslachem at gmail.com> wrote: > Hi James, > > I fully agree with you and understand your statement about -O2. > > Now some questions for you: > Did you try to reproduce experiments described in my previous e-mail ? > Did you look at debug informations generated for ...
2012 May 30
2
[LLVMdev] llc support for ARM predication ?
Hi James, Thanks for the answer, can you elaborate on difference between thumb, thumb2, ARM, thumbv7. I'm a bit lost right now. When specifying thumbv7 llc will generate thumb only code, not thumb2 ? Best Regards Seb > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of James Molloy > Sent: Tuesday, May 29, 2012 5:38 PM > To: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] llc support for ARM predication ? > > On 29/0...
2008 Aug 04
6
[Fwd: [networking-discuss] code-review: fine-grained privileges for datalink administration]
...changes also exist in the Crossbow gate, the delivery of this wad will result in fewer lines of changes for Crossbow''s delivery. If someone on Crossbow could participate in this review, that would be a bonus (Eric Cheng made original changes in the Crossbow gate at some point last year). -Seb -------- Forwarded Message -------- From: Sebastien Roy <Sebastien.Roy at Sun.COM> To: networking-discuss at opensolaris.org Subject: [networking-discuss] code-review: fine-grained privileges for datalink administration Date: Mon, 04 Aug 2008 11:09:47 -0400 Hi Folks, I''m looking f...
2012 Mar 07
1
[LLVMdev] Problem with x86 32-bit debug information ?
...e (local copy to an automatic variable). It seems that when llvm.declare is turned into a llvm.value for parameter there is something incorrect with respect to parameters debug informations that is generated by clang/llvm. I just would like confirmation of this. Thanks for your answer Best Regards Seb 2012/3/7 James Molloy <james.molloy at arm.com> > Hi Seb,**** > > ** ** > > Clang cannot generate debug information for something that it has > optimised away. You should reduce the optimisation level.**** > > ** ** > > In general debug information is only rea...
2012 Feb 29
2
[LLVMdev] Is it an opt bug ?
Hi Seb, > If I remove datalayout definition, code is not optimized and work as expected. > So my question is: > > What attribute/value/interpretation of data-layout would cause this type of bug? all kinds of optimizers use datalayout (and are disabled if there is none). For example, alias a...
2012 Jun 04
1
[LLVMdev] llc support for ARM predication ?
Hi James, Thanks for the answer, for Cortex-A9 would you recommend to generate thumb2 code or ARM code ? What would be the best performance wise ? Best Regards Seb > -----Original Message----- > From: James Molloy [mailto:james.molloy at arm.com] > Sent: Thursday, May 31, 2012 9:57 AM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] llc support for ARM predication ? > > Hi Seb, > > The ARM instr...
2011 Oct 28
1
[LLVMdev] target datalayout defintion
...or x86 64-bit target. Now If I add -march=arm or -march=x86-32 I've got following error message from clang: error: unknown target CPU 'arm' or error: unknown target CPU 'x86-32' Is there a way to build clang so that it support cross-compilation for ARM/x86-32 ? Best Regards Seb 2011/10/27 Carl-Philip Hänsch <cphaensch at googlemail.com> > You can compile an empty C source code with clang -S -emit-llvm and copy > the data layout from there. > > 2011/10/27 Seb <babslachem at gmail.com> > >> Hi all, >> >> Can someone give me a...
2012 May 31
0
[LLVMdev] llc support for ARM predication ?
Hi Seb, The ARM instruction set is a fixed-width 32-bit instruction set that has been around since the early days of ARM. Modern (armv4t onwards) cores mostly have another instruction set that can be used in tandem, the "thumb" instruction set. This is a variable width (16 or 32 bit) instructi...
2012 Feb 29
0
[LLVMdev] Is it an opt bug ?
Already done here : http://llvm.org/bugs/show_bug.cgi?id=12130 Thanks for your answers Best Regards Seb 2012/2/29 Duncan Sands <baldrick at free.fr> > Hi Seb, > > > If I remove datalayout definition, code is not optimized and work as >> expected. >> So my question is: >> >> What attribute/value/interpretation of data-layout would cause this type >> o...
2012 Mar 09
0
[LLVMdev] Problem with x86 32-bit debug information ?
...c -disable-fp-elim so that 'n' value can be inspected. My feeling is that LLVM debug info generation is based on LLVM code-style emitted by clang and might not deal when code is emitted by a different front-end. James, no need to apology we all make mistakes, including myself. Best Regards Seb 2012/3/9 James Molloy <james.molloy at arm.com> > Hi, > > > I do have to take exception to James Molloy's assessment of the variable > "n" > > as "optimized away" because the debug info clearly thought it wasn't. > > Mea culpa here, I m...
2012 May 29
2
[LLVMdev] llc support for ARM predication ?
Hi all, I was wondering if 'llc' is able to generate 'it' instruction for ARM Cortex-A9 target ? Thanks for your answers Seb
2012 Feb 29
0
[LLVMdev] Is it an opt bug ?
Hi Duncan, I included original email in BUG description which described original issue with store being removed. BR Seb 2012/2/29 Duncan Sands <baldrick at free.fr> > Hi Seb, > > > Already done here : http://llvm.org/bugs/show_bug.**cgi?id=12130<http://llvm.org/bugs/show_bug.cgi?id=12130> >> > > that doesn't describe the original issue (second store removed), it is > tal...
2011 Nov 07
2
[LLVMdev] ARM Neon intrinsics supported by LLVM
Hi all, I was wondering how I can get a list of ARM NEON intrinsics supported by LLVM. Is there any documentation about them or IntrinsicARM.td file is the only resource I can use ? Thanks for your answers Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111107/fade76cc/attachment.html>
2011 Oct 27
2
[LLVMdev] target datalayout defintion
Hi all, Can someone give me advice on what should be a good definition of target datalayout for an ARM cortex-A9 + neon target and x86 32-bit ? Shall I use a different definition for a cortex-A9 without neon ? Thanks for your advices Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111027/1fa5e645/attachment.html>
2011 Dec 16
2
[LLVMdev] LLVM 2.9 metadata
...d it seems that CLANG emits a NULL metadata node which is translated into 'i32 0'. The other problem is for 'isArtificial' field with is described as being of type i1 and CLANG emits i32. Looking at sources, it seems that it should be a i32 flag field. Hope this helps, Best Regards Seb 2011/12/15 Devang Patel <dpatel at apple.com> > > On Dec 15, 2011, at 2:32 AM, Seb wrote: > > Hi all, > > In LLVM documentation about source level debugging (http://www.llvm.org/releases/2.9/docs/SourceLevelDebugging.html) > > > Subprogram descriptor is defined...
2011 Oct 07
2
[LLVMdev] LLC ARM Backend maintainer
...Eli question, I wanted to know who is actively working on ARM because I submitted some bug report (#11029, #9905) and don't know if someone is working on them, if/when the will be fixed. Maybe I just need to better understand LLVM release process, I've seen a mail in this list about it. -- Seb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111007/73a5b174/attachment.html>