Arnaud,
another way to look at it, if the description of your
register sets includes "pairs",
is that your assembly language syntax for MPQD is redundant,
operand-2 is the second
half of the register-pair in operand-0, so an alternative is to let
llvm think this is a two
operand instruction (one of them being a pair) rather than a three
operand instruction.
even if you are not currently defining pairs in your register
definitions, it might be less work
to do that than to write and add an extra new pass. Many many target
machines have some
notion of register pairs, so it should not be too hard to find
examples of how to do this.
YMMV,
-Peter Lawrence.
On Jun 6, 2011, at 10:00 AM, llvmdev-request at cs.uiuc.edu wrote:
>
> Hi All,
>
> My target has some instructions requiring register pairs. I decided
> to give a try to the PBQP allocator : it is working fine in 99% of
> the cases, but I am stumbling on the following issue.
>
> Instruction 'MPQD' takes 3 register operands inputs, with the
> constraint that operands 0 and 2 must be consecutive registers.
> Operand 1 has no particular constraint. It has no output register.
> So we have something like MPQD R_n, R_x, R_n+1.
>
> I have derived from PBQPBuilder to add the MPQD constraint.
>
> It happens sometimes that the code for register allocation looks
> like this :
> ...
> MPQD %vreg80, %vreg79, %vreg80; GR16:%vreg80,%vreg79
> ...
> Operands 0 & 2 have been coalesced and I can no longer set the
> constraint.
>
> I tried to add a pass right before register allocation, to catch
> those case and insert a copy for operand 2, but the copy gets
> coalesced away.
>
> What would be the appropriate way to handle this case ?
>
> Thanks,
> --
> Arnaud de Grandmaison
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On Jun 6, 2011, at 12:14 PM, Peter Lawrence wrote:> Arnaud, > another way to look at it, if the description of your register sets includes "pairs", > is that your assembly language syntax for MPQD is redundant, operand-2 is the second > half of the register-pair in operand-0, so an alternative is to let llvm think this is a two > operand instruction (one of them being a pair) rather than a three operand instruction. > > even if you are not currently defining pairs in your register definitions, it might be less work > to do that than to write and add an extra new pass. Many many target machines have some > notion of register pairs, so it should not be too hard to find examples of how to do this.ARM's QQ and QQQQ register classes are examples. It is currently a bit tedious to specify these constraints; cleaning that up is on my todo list. /jakob
I also considered this approach, but did not want to dive in the constraint handling for now. The PBQP path seemed easier at first sight --- and was easy to setup. And I always wanted to give a try to the pbqp :) I will add the hook to the pbqp and propose a patch if this looks clean enough. Thanks, -- Arnaud de Grandmaison -----Original Message----- From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk] Sent: Monday, June 06, 2011 9:28 PM To: Peter Lawrence Cc: Arnaud Allard de Grandmaison; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] PBQP & register pairing On Jun 6, 2011, at 12:14 PM, Peter Lawrence wrote:> Arnaud, > another way to look at it, if the description of your register sets includes "pairs", > is that your assembly language syntax for MPQD is redundant, operand-2 is the second > half of the register-pair in operand-0, so an alternative is to let llvm think this is a two > operand instruction (one of them being a pair) rather than a three operand instruction. > > even if you are not currently defining pairs in your register definitions, it might be less work > to do that than to write and add an extra new pass. Many many target machines have some > notion of register pairs, so it should not be too hard to find examples of how to do this.ARM's QQ and QQQQ register classes are examples. It is currently a bit tedious to specify these constraints; cleaning that up is on my todo list. /jakob CONFIDENTIAL NOTICE: The contents of this message, including any attachments, are confidential and are intended solely for the use of the person or entity to whom the message was addressed. If you are not the intended recipient of this message, please be advised that any dissemination, distribution, or use of the contents of this message is strictly prohibited. If you received this message in error, please notify the sender. Please also permanently delete all copies of the original message and any attached documentation. Thank you.