Attached is a small patch to allow users of the PBQP allocator to optionally insert a custom pass. I believe it can be usefull to other users of the pbqp. I used it to undo some of the coalescer work, and make sure that I have different virtual registers, inserting a copy if necessary, to build a pair. I noticed an unexpected --- to me at least --- behaviour of the allocator. I have some instructions using 2 pairs of registers, say "mpra R_x, R_x+1, R_y, R_y+1", and setting the pairing constraints R_x -> R_x+1 and R_y -> R_y+1 could silently produce wrong code like "mpra %R0, %R2, %R1, %R3". I add to explicitly add another constraint to describe that y must differ from x, x-1 and x+1 to make the allocator build valid pairs, i.e "mpra %R0, %R1, %R2, %R3". Is there anything I missed ? Now, 99% of my users' codebase is compiling. :) The last issue I have is an assert during regalloc in LiveIntervalAnalysis : "attempt to spill already spilled interval!", and I do not know where to start looking. Any hint would be welcome. Regards, -- Arnaud de Grandmaison ________________________________ From: Lang Hames [mailto:lhames at gmail.com] Sent: Tuesday, June 07, 2011 11:20 AM To: Arnaud Allard de Grandmaison Cc: Jakob Stoklund Olesen; Peter Lawrence; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] PBQP & register pairing Hi Arnaud, That sounds great. I look forward to seeing a patch. You may also look forward to big performance improvements in the PBQP allocator: I'm working on updates which will improve compile speeds and massively reduce memory use. Regards, Lang. On Tue, Jun 7, 2011 at 7:02 PM, Arnaud Allard de Grandmaison <Arnaud.AllardDeGrandMaison at dibcom.com<mailto:Arnaud.AllardDeGrandMaison at dibcom.com>> wrote: I also considered this approach, but did not want to dive in the constraint handling for now. The PBQP path seemed easier at first sight --- and was easy to setup. And I always wanted to give a try to the pbqp :) I will add the hook to the pbqp and propose a patch if this looks clean enough. Thanks, -- Arnaud de Grandmaison -----Original Message----- From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk<mailto:stoklund at 2pi.dk>] Sent: Monday, June 06, 2011 9:28 PM To: Peter Lawrence Cc: Arnaud Allard de Grandmaison; llvmdev at cs.uiuc.edu<mailto:llvmdev at cs.uiuc.edu> Subject: Re: [LLVMdev] PBQP & register pairing On Jun 6, 2011, at 12:14 PM, Peter Lawrence wrote:> Arnaud, > another way to look at it, if the description of your register sets includes "pairs", > is that your assembly language syntax for MPQD is redundant, operand-2 is the second > half of the register-pair in operand-0, so an alternative is to let llvm think this is a two > operand instruction (one of them being a pair) rather than a three operand instruction. > > even if you are not currently defining pairs in your register definitions, it might be less work > to do that than to write and add an extra new pass. Many many target machines have some > notion of register pairs, so it should not be too hard to find examples of how to do this.ARM's QQ and QQQQ register classes are examples. It is currently a bit tedious to specify these constraints; cleaning that up is on my todo list. /jakob CONFIDENTIAL NOTICE: The contents of this message, including any attachments, are confidential and are intended solely for the use of the person or entity to whom the message was addressed. If you are not the intended recipient of this message, please be advised that any dissemination, distribution, or use of the contents of this message is strictly prohibited. If you received this message in error, please notify the sender. Please also permanently delete all copies of the original message and any attached documentation. Thank you. _______________________________________________ LLVM Developers mailing list LLVMdev at cs.uiuc.edu<mailto:LLVMdev at cs.uiuc.edu> http://llvm.cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev ________________________________ CONFIDENTIAL NOTICE: The contents of this message, including any attachments, are confidential and are intended solely for the use of the person or entity to whom the message was addressed. If you are not the intended recipient of this message, please be advised that any dissemination, distribution, or use of the contents of this message is strictly prohibited. If you received this message in error, please notify the sender. Please also permanently delete all copies of the original message and any attached documentation. Thank you. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110615/8d480d32/attachment.html> -------------- next part -------------- A non-text attachment was scrubbed... Name: PBQP-customPass.patch Type: application/octet-stream Size: 2251 bytes Desc: PBQP-customPass.patch URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110615/8d480d32/attachment.obj>
Hi Arnaud, The patch looks good. I've committed it in r133249.> > > I noticed an unexpected --- to me at least --- behaviour of the allocator. > > I have some instructions using 2 pairs of registers, say “mpra R_x, R_x+1, > R_y, R_y+1”, and setting the pairing constraints R_x -> R_x+1 and R_y -> > R_y+1 could silently produce wrong code like “mpra %R0, %R2, %R1, %R3”. I > add to explicitly add another constraint to describe that y must differ > from x, x-1 and x+1 to make the allocator build valid pairs, i.e “mpra %R0, > %R1, %R2, %R3”. Is there anything I missed ? > >Hmm. Let me make sure I'm reading this right. The constraints are that: a) All four operands have distinct registers. b) The first two are in a consecutive pair (second > first) c) The second two are in a consecutive pair (fourth > third) If that's accurate then you will need four constraints to represent it. Two to enforce the pairing, which you've already described, and two to enforce the distinction. Without constraint enforcing the R_x != R_y distinction the PBQP allocator is free to allocate mpra %R0, %R1, %R0, %R1. You'll also need (R_x+1 != R_y) to ensure that you don't get something like mpra %R0, %R1, %R1, %R2.>That said my understanding of your pairing constraints would definitely prohibit mpra %R0, %R2, %R1, %R3 under any circumstances, even with out the distinction constraint. Either I've misunderstood your constraints, or there is a bug somewhere.> Now, 99% of my users’ codebase is compiling. J > > The last issue I have is an assert during regalloc in LiveIntervalAnalysis > : “attempt to spill already spilled interval!”, and I do not know where to > start looking. Any hint would be welcome. > >The data structure you want to keep your eye on is the set vregsToAlloc to RegAllocPBQP. This set holds the virtual registers which PBQP must allocate for on its next round. Once a virtual register has been spilled it should be erased from this set (see RegAllocPBQP::mapPBQPToRegAlloc), and it should never re-enter it, and thus never be considered again by the PBQP allocator. At a guess it sounds like one of your vregs may be being added to this set a 2nd time, but I'm not sure how that could be happening. Is your backend public? Are you able to share a test case with me? I'm very busy with my PhD write-up at the moment, but I will try to find time for a quick look at this. Regards, Lang. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110617/9dd89d14/attachment.html>
Hi Lang,> Hmm. Let me make sure I'm reading this right. The constraints are that: > a) All four operands have distinct registers. > b) The first two are in a consecutive pair (second > first) > c) The second two are in a consecutive pair (fourth > third)Constraints b & c are OK, but a is too strict : "mpra %R0, %R1, %R0, %R1" is OK. But I though, may be wrongly, that "mpra %vreg1, %vreg2, %vreg3, %vreg4" meant %vreg1 and %vreg3 will be allocated to different physical registers, or they would have been coalesced. For example, the pass I added after the coalescer ensures that instructions like "mpra %vreg1, %vreg2, %vreg1, %vreg4" (impossible for pbqp to solve) is transformed to "mpra %vreg1, %vreg2, %vreg3, %vreg4" with the proper copy of %vreg1 to %vreg3 inserted.>That said my understanding of your pairing constraints would definitely prohibit mpra %R0, %R2, %R1, %R3 under any circumstances, even with out the > distinction constraint. Either I've misunderstood your constraints, or there is a bug somewhere.You got the contraints right. I was surprised to have to add a "safety net" to prevent the impossible case; at first I though pbqp could "backtrack" once it discovers it gets to an impossible case... My backend is private, so I can not share it. I will trace what's happening with vregsToAlloc and keep you updated. Regards, -- Arnaud de Grandmaison ________________________________ From: Lang Hames [mailto:lhames at gmail.com] Sent: Friday, June 17, 2011 9:37 AM To: Arnaud Allard de Grandmaison Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] PBQP & register pairing Hi Arnaud, The patch looks good. I've committed it in r133249. I noticed an unexpected --- to me at least --- behaviour of the allocator. I have some instructions using 2 pairs of registers, say "mpra R_x, R_x+1, R_y, R_y+1", and setting the pairing constraints R_x -> R_x+1 and R_y -> R_y+1 could silently produce wrong code like "mpra %R0, %R2, %R1, %R3". I add to explicitly add another constraint to describe that y must differ from x, x-1 and x+1 to make the allocator build valid pairs, i.e "mpra %R0, %R1, %R2, %R3". Is there anything I missed ? Hmm. Let me make sure I'm reading this right. The constraints are that: a) All four operands have distinct registers. b) The first two are in a consecutive pair (second > first) c) The second two are in a consecutive pair (fourth > third) If that's accurate then you will need four constraints to represent it. Two to enforce the pairing, which you've already described, and two to enforce the distinction. Without constraint enforcing the R_x != R_y distinction the PBQP allocator is free to allocate mpra %R0, %R1, %R0, %R1. You'll also need (R_x+1 != R_y) to ensure that you don't get something like mpra %R0, %R1, %R1, %R2. That said my understanding of your pairing constraints would definitely prohibit mpra %R0, %R2, %R1, %R3 under any circumstances, even with out the distinction constraint. Either I've misunderstood your constraints, or there is a bug somewhere. Now, 99% of my users' codebase is compiling. :) The last issue I have is an assert during regalloc in LiveIntervalAnalysis : "attempt to spill already spilled interval!", and I do not know where to start looking. Any hint would be welcome. The data structure you want to keep your eye on is the set vregsToAlloc to RegAllocPBQP. This set holds the virtual registers which PBQP must allocate for on its next round. Once a virtual register has been spilled it should be erased from this set (see RegAllocPBQP::mapPBQPToRegAlloc), and it should never re-enter it, and thus never be considered again by the PBQP allocator. At a guess it sounds like one of your vregs may be being added to this set a 2nd time, but I'm not sure how that could be happening. Is your backend public? Are you able to share a test case with me? I'm very busy with my PhD write-up at the moment, but I will try to find time for a quick look at this. Regards, Lang. ________________________________ CONFIDENTIAL NOTICE: The contents of this message, including any attachments, are confidential and are intended solely for the use of the person or entity to whom the message was addressed. If you are not the intended recipient of this message, please be advised that any dissemination, distribution, or use of the contents of this message is strictly prohibited. If you received this message in error, please notify the sender. Please also permanently delete all copies of the original message and any attached documentation. Thank you. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110620/f5c56d42/attachment.html>